Commit | Line | Data |
---|---|---|
1a0bb679 LD |
1 | /* |
2 | * tps80031-regulator.c -- TI TPS80031 regulator driver. | |
3 | * | |
1a7ae58e | 4 | * Regulator driver for TI TPS80031/TPS80032 Fully Integrated Power |
1a0bb679 LD |
5 | * Management with Power Path and Battery Charger. |
6 | * | |
7 | * Copyright (c) 2012, NVIDIA Corporation. | |
8 | * | |
9 | * Author: Laxman Dewangan <ldewangan@nvidia.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation version 2. | |
14 | * | |
15 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, | |
16 | * whether express or implied; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
23 | * 02111-1307, USA | |
24 | */ | |
25 | ||
26 | #include <linux/delay.h> | |
27 | #include <linux/err.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/mfd/tps80031.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/regulator/driver.h> | |
34 | #include <linux/regulator/machine.h> | |
35 | #include <linux/slab.h> | |
36 | ||
37 | /* Flags for DCDC Voltage reading */ | |
38 | #define DCDC_OFFSET_EN BIT(0) | |
39 | #define DCDC_EXTENDED_EN BIT(1) | |
40 | #define TRACK_MODE_ENABLE BIT(2) | |
41 | ||
42 | #define SMPS_MULTOFFSET_VIO BIT(1) | |
43 | #define SMPS_MULTOFFSET_SMPS1 BIT(3) | |
44 | #define SMPS_MULTOFFSET_SMPS2 BIT(4) | |
45 | #define SMPS_MULTOFFSET_SMPS3 BIT(6) | |
46 | #define SMPS_MULTOFFSET_SMPS4 BIT(0) | |
47 | ||
48 | #define SMPS_CMD_MASK 0xC0 | |
49 | #define SMPS_VSEL_MASK 0x3F | |
50 | #define LDO_VSEL_MASK 0x1F | |
51 | #define LDO_TRACK_VSEL_MASK 0x3F | |
52 | ||
53 | #define MISC2_LDOUSB_IN_VSYS BIT(4) | |
54 | #define MISC2_LDOUSB_IN_PMID BIT(3) | |
55 | #define MISC2_LDOUSB_IN_MASK 0x18 | |
56 | ||
57 | #define MISC2_LDO3_SEL_VIB_VAL BIT(0) | |
58 | #define MISC2_LDO3_SEL_VIB_MASK 0x1 | |
59 | ||
60 | #define BOOST_HW_PWR_EN BIT(5) | |
61 | #define BOOST_HW_PWR_EN_MASK BIT(5) | |
62 | ||
63 | #define OPA_MODE_EN BIT(6) | |
64 | #define OPA_MODE_EN_MASK BIT(6) | |
65 | ||
66 | #define USB_VBUS_CTRL_SET 0x04 | |
67 | #define USB_VBUS_CTRL_CLR 0x05 | |
68 | #define VBUS_DISCHRG 0x20 | |
69 | ||
70 | struct tps80031_regulator_info { | |
71 | /* Regulator register address.*/ | |
72 | u8 trans_reg; | |
73 | u8 state_reg; | |
74 | u8 force_reg; | |
75 | u8 volt_reg; | |
76 | u8 volt_id; | |
77 | ||
78 | /*Power request bits */ | |
79 | int preq_bit; | |
80 | ||
81 | /* used by regulator core */ | |
82 | struct regulator_desc desc; | |
83 | ||
84 | }; | |
85 | ||
86 | struct tps80031_regulator { | |
87 | struct device *dev; | |
88 | struct regulator_dev *rdev; | |
89 | struct tps80031_regulator_info *rinfo; | |
90 | ||
91 | u8 device_flags; | |
92 | unsigned int config_flags; | |
93 | unsigned int ext_ctrl_flag; | |
94 | }; | |
95 | ||
96 | static inline struct device *to_tps80031_dev(struct regulator_dev *rdev) | |
97 | { | |
98 | return rdev_get_dev(rdev)->parent->parent; | |
99 | } | |
100 | ||
101 | static int tps80031_reg_is_enabled(struct regulator_dev *rdev) | |
102 | { | |
103 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
104 | struct device *parent = to_tps80031_dev(rdev); | |
105 | u8 reg_val; | |
106 | int ret; | |
107 | ||
b92f787d | 108 | if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ) |
1a0bb679 LD |
109 | return true; |
110 | ||
b92f787d LD |
111 | ret = tps80031_read(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg, |
112 | ®_val); | |
1a0bb679 LD |
113 | if (ret < 0) { |
114 | dev_err(&rdev->dev, "Reg 0x%02x read failed, err = %d\n", | |
115 | ri->rinfo->state_reg, ret); | |
116 | return ret; | |
117 | } | |
b92f787d | 118 | return ((reg_val & TPS80031_STATE_MASK) == TPS80031_STATE_ON); |
1a0bb679 LD |
119 | } |
120 | ||
121 | static int tps80031_reg_enable(struct regulator_dev *rdev) | |
122 | { | |
123 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
124 | struct device *parent = to_tps80031_dev(rdev); | |
125 | int ret; | |
126 | ||
b92f787d | 127 | if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ) |
1a0bb679 LD |
128 | return 0; |
129 | ||
b92f787d LD |
130 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg, |
131 | TPS80031_STATE_ON, TPS80031_STATE_MASK); | |
1a0bb679 LD |
132 | if (ret < 0) { |
133 | dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n", | |
134 | ri->rinfo->state_reg, ret); | |
135 | return ret; | |
136 | } | |
137 | return ret; | |
138 | } | |
139 | ||
140 | static int tps80031_reg_disable(struct regulator_dev *rdev) | |
141 | { | |
142 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
143 | struct device *parent = to_tps80031_dev(rdev); | |
144 | int ret; | |
145 | ||
b92f787d | 146 | if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ) |
1a0bb679 LD |
147 | return 0; |
148 | ||
b92f787d LD |
149 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg, |
150 | TPS80031_STATE_OFF, TPS80031_STATE_MASK); | |
1a0bb679 LD |
151 | if (ret < 0) |
152 | dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n", | |
153 | ri->rinfo->state_reg, ret); | |
154 | return ret; | |
155 | } | |
156 | ||
157 | /* DCDC voltages for the selector of 58 to 63 */ | |
158 | static int tps80031_dcdc_voltages[4][5] = { | |
159 | { 1350, 1500, 1800, 1900, 2100}, | |
160 | { 1350, 1500, 1800, 1900, 2100}, | |
161 | { 2084, 2315, 2778, 2932, 3241}, | |
162 | { 4167, 2315, 2778, 2932, 3241}, | |
163 | }; | |
164 | ||
165 | static int tps80031_dcdc_list_voltage(struct regulator_dev *rdev, unsigned sel) | |
166 | { | |
167 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
168 | int volt_index = ri->device_flags & 0x3; | |
169 | ||
170 | if (sel == 0) | |
171 | return 0; | |
172 | else if (sel < 58) | |
173 | return regulator_list_voltage_linear(rdev, sel - 1); | |
174 | else | |
175 | return tps80031_dcdc_voltages[volt_index][sel - 58] * 1000; | |
176 | } | |
177 | ||
178 | static int tps80031_dcdc_set_voltage_sel(struct regulator_dev *rdev, | |
179 | unsigned vsel) | |
180 | { | |
181 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
182 | struct device *parent = to_tps80031_dev(rdev); | |
183 | int ret; | |
184 | u8 reg_val; | |
185 | ||
186 | if (ri->rinfo->force_reg) { | |
187 | ret = tps80031_read(parent, ri->rinfo->volt_id, | |
188 | ri->rinfo->force_reg, ®_val); | |
189 | if (ret < 0) { | |
190 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
191 | ri->rinfo->force_reg, ret); | |
192 | return ret; | |
193 | } | |
194 | if (!(reg_val & SMPS_CMD_MASK)) { | |
195 | ret = tps80031_update(parent, ri->rinfo->volt_id, | |
196 | ri->rinfo->force_reg, vsel, SMPS_VSEL_MASK); | |
197 | if (ret < 0) | |
198 | dev_err(ri->dev, | |
199 | "reg 0x%02x update failed, e = %d\n", | |
200 | ri->rinfo->force_reg, ret); | |
201 | return ret; | |
202 | } | |
203 | } | |
204 | ret = tps80031_update(parent, ri->rinfo->volt_id, | |
205 | ri->rinfo->volt_reg, vsel, SMPS_VSEL_MASK); | |
206 | if (ret < 0) | |
207 | dev_err(ri->dev, "reg 0x%02x update failed, e = %d\n", | |
208 | ri->rinfo->volt_reg, ret); | |
209 | return ret; | |
210 | } | |
211 | ||
212 | static int tps80031_dcdc_get_voltage_sel(struct regulator_dev *rdev) | |
213 | { | |
214 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
215 | struct device *parent = to_tps80031_dev(rdev); | |
216 | uint8_t vsel = 0; | |
217 | int ret; | |
218 | ||
219 | if (ri->rinfo->force_reg) { | |
220 | ret = tps80031_read(parent, ri->rinfo->volt_id, | |
221 | ri->rinfo->force_reg, &vsel); | |
222 | if (ret < 0) { | |
223 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
224 | ri->rinfo->force_reg, ret); | |
225 | return ret; | |
226 | } | |
227 | ||
228 | if (!(vsel & SMPS_CMD_MASK)) | |
229 | return vsel & SMPS_VSEL_MASK; | |
230 | } | |
231 | ret = tps80031_read(parent, ri->rinfo->volt_id, | |
232 | ri->rinfo->volt_reg, &vsel); | |
233 | if (ret < 0) { | |
234 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
235 | ri->rinfo->volt_reg, ret); | |
236 | return ret; | |
237 | } | |
238 | return vsel & SMPS_VSEL_MASK; | |
239 | } | |
240 | ||
241 | static int tps80031_ldo_set_voltage_sel(struct regulator_dev *rdev, | |
242 | unsigned sel) | |
243 | { | |
244 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
245 | struct device *parent = to_tps80031_dev(rdev); | |
246 | int ret; | |
247 | ||
248 | /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */ | |
249 | if ((ri->rinfo->desc.id == TPS80031_REGULATOR_LDO2) && | |
250 | (ri->device_flags & TRACK_MODE_ENABLE)) { | |
251 | unsigned nvsel = (sel) & 0x1F; | |
252 | if (((tps80031_get_chip_info(parent) == TPS80031) || | |
253 | ((tps80031_get_chip_info(parent) == TPS80032) && | |
254 | (tps80031_get_pmu_version(parent) == 0x0))) && | |
255 | ((nvsel == 0x0) || (nvsel >= 0x19 && nvsel <= 0x1F))) { | |
256 | dev_err(ri->dev, | |
257 | "Invalid sel %d in track mode LDO2\n", | |
258 | nvsel); | |
259 | return -EINVAL; | |
260 | } | |
261 | } | |
262 | ||
263 | ret = tps80031_write(parent, ri->rinfo->volt_id, | |
264 | ri->rinfo->volt_reg, sel); | |
265 | if (ret < 0) | |
266 | dev_err(ri->dev, "Error in writing reg 0x%02x, e = %d\n", | |
267 | ri->rinfo->volt_reg, ret); | |
268 | return ret; | |
269 | } | |
270 | ||
271 | static int tps80031_ldo_get_voltage_sel(struct regulator_dev *rdev) | |
272 | { | |
273 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
274 | struct device *parent = to_tps80031_dev(rdev); | |
275 | uint8_t vsel; | |
276 | int ret; | |
277 | ||
278 | ret = tps80031_read(parent, ri->rinfo->volt_id, | |
279 | ri->rinfo->volt_reg, &vsel); | |
280 | if (ret < 0) { | |
281 | dev_err(ri->dev, "Error in writing the Voltage register\n"); | |
282 | return ret; | |
283 | } | |
284 | return vsel & rdev->desc->vsel_mask; | |
285 | } | |
286 | ||
1a0bb679 LD |
287 | static int tps80031_vbus_is_enabled(struct regulator_dev *rdev) |
288 | { | |
289 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
290 | struct device *parent = to_tps80031_dev(rdev); | |
291 | int ret = -EIO; | |
292 | uint8_t ctrl1 = 0; | |
293 | uint8_t ctrl3 = 0; | |
294 | ||
b92f787d | 295 | ret = tps80031_read(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
296 | TPS80031_CHARGERUSB_CTRL1, &ctrl1); |
297 | if (ret < 0) { | |
298 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
299 | TPS80031_CHARGERUSB_CTRL1, ret); | |
300 | return ret; | |
301 | } | |
b92f787d | 302 | ret = tps80031_read(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
303 | TPS80031_CHARGERUSB_CTRL3, &ctrl3); |
304 | if (ret < 0) { | |
305 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
1a7ae58e | 306 | TPS80031_CHARGERUSB_CTRL3, ret); |
1a0bb679 LD |
307 | return ret; |
308 | } | |
309 | if ((ctrl1 & OPA_MODE_EN) && (ctrl3 & BOOST_HW_PWR_EN)) | |
310 | return 1; | |
311 | return ret; | |
312 | } | |
313 | ||
314 | static int tps80031_vbus_enable(struct regulator_dev *rdev) | |
315 | { | |
316 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
317 | struct device *parent = to_tps80031_dev(rdev); | |
318 | int ret; | |
319 | ||
b92f787d | 320 | ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
321 | TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN); |
322 | if (ret < 0) { | |
323 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
324 | TPS80031_CHARGERUSB_CTRL1, ret); | |
325 | return ret; | |
326 | } | |
327 | ||
b92f787d | 328 | ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
329 | TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN); |
330 | if (ret < 0) { | |
331 | dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n", | |
332 | TPS80031_CHARGERUSB_CTRL3, ret); | |
333 | return ret; | |
334 | } | |
335 | return ret; | |
336 | } | |
337 | ||
338 | static int tps80031_vbus_disable(struct regulator_dev *rdev) | |
339 | { | |
340 | struct tps80031_regulator *ri = rdev_get_drvdata(rdev); | |
341 | struct device *parent = to_tps80031_dev(rdev); | |
342 | int ret = 0; | |
343 | ||
b92f787d LD |
344 | if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) { |
345 | ret = tps80031_write(parent, TPS80031_SLAVE_ID2, | |
1a0bb679 LD |
346 | USB_VBUS_CTRL_SET, VBUS_DISCHRG); |
347 | if (ret < 0) { | |
348 | dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n", | |
349 | USB_VBUS_CTRL_SET, ret); | |
350 | return ret; | |
351 | } | |
352 | } | |
353 | ||
b92f787d | 354 | ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
355 | TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN); |
356 | if (ret < 0) { | |
357 | dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n", | |
358 | TPS80031_CHARGERUSB_CTRL1, ret); | |
359 | return ret; | |
360 | } | |
361 | ||
b92f787d | 362 | ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2, |
1a0bb679 LD |
363 | TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN); |
364 | if (ret < 0) { | |
365 | dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n", | |
366 | TPS80031_CHARGERUSB_CTRL3, ret); | |
367 | return ret; | |
368 | } | |
369 | ||
370 | mdelay(DIV_ROUND_UP(ri->rinfo->desc.enable_time, 1000)); | |
b92f787d LD |
371 | if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) { |
372 | ret = tps80031_write(parent, TPS80031_SLAVE_ID2, | |
1a0bb679 LD |
373 | USB_VBUS_CTRL_CLR, VBUS_DISCHRG); |
374 | if (ret < 0) { | |
375 | dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n", | |
376 | USB_VBUS_CTRL_CLR, ret); | |
377 | return ret; | |
378 | } | |
379 | } | |
380 | return ret; | |
381 | } | |
382 | ||
383 | static struct regulator_ops tps80031_dcdc_ops = { | |
384 | .list_voltage = tps80031_dcdc_list_voltage, | |
385 | .set_voltage_sel = tps80031_dcdc_set_voltage_sel, | |
386 | .get_voltage_sel = tps80031_dcdc_get_voltage_sel, | |
387 | .enable = tps80031_reg_enable, | |
388 | .disable = tps80031_reg_disable, | |
389 | .is_enabled = tps80031_reg_is_enabled, | |
390 | }; | |
391 | ||
392 | static struct regulator_ops tps80031_ldo_ops = { | |
7fa8a597 | 393 | .list_voltage = regulator_list_voltage_linear, |
1a0bb679 LD |
394 | .set_voltage_sel = tps80031_ldo_set_voltage_sel, |
395 | .get_voltage_sel = tps80031_ldo_get_voltage_sel, | |
396 | .enable = tps80031_reg_enable, | |
397 | .disable = tps80031_reg_disable, | |
398 | .is_enabled = tps80031_reg_is_enabled, | |
399 | }; | |
400 | ||
401 | static struct regulator_ops tps80031_vbus_sw_ops = { | |
bf0caae3 | 402 | .list_voltage = regulator_list_voltage_linear, |
1a0bb679 LD |
403 | .enable = tps80031_vbus_enable, |
404 | .disable = tps80031_vbus_disable, | |
405 | .is_enabled = tps80031_vbus_is_enabled, | |
406 | }; | |
407 | ||
408 | static struct regulator_ops tps80031_vbus_hw_ops = { | |
bf0caae3 | 409 | .list_voltage = regulator_list_voltage_linear, |
1a0bb679 LD |
410 | }; |
411 | ||
412 | static struct regulator_ops tps80031_ext_reg_ops = { | |
bf0caae3 | 413 | .list_voltage = regulator_list_voltage_linear, |
1a0bb679 LD |
414 | .enable = tps80031_reg_enable, |
415 | .disable = tps80031_reg_disable, | |
416 | .is_enabled = tps80031_reg_is_enabled, | |
417 | }; | |
418 | ||
419 | /* Non-exiting default definition for some register */ | |
420 | #define TPS80031_SMPS3_CFG_FORCE 0 | |
421 | #define TPS80031_SMPS4_CFG_FORCE 0 | |
422 | ||
423 | #define TPS80031_VBUS_CFG_TRANS 0 | |
424 | #define TPS80031_VBUS_CFG_STATE 0 | |
425 | ||
426 | #define TPS80031_REG_SMPS(_id, _volt_id, _pbit) \ | |
427 | { \ | |
428 | .trans_reg = TPS80031_##_id##_CFG_TRANS, \ | |
429 | .state_reg = TPS80031_##_id##_CFG_STATE, \ | |
430 | .force_reg = TPS80031_##_id##_CFG_FORCE, \ | |
431 | .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \ | |
b92f787d | 432 | .volt_id = TPS80031_SLAVE_##_volt_id, \ |
1a0bb679 LD |
433 | .preq_bit = _pbit, \ |
434 | .desc = { \ | |
435 | .name = "tps80031_"#_id, \ | |
436 | .id = TPS80031_REGULATOR_##_id, \ | |
437 | .n_voltages = 63, \ | |
438 | .ops = &tps80031_dcdc_ops, \ | |
439 | .type = REGULATOR_VOLTAGE, \ | |
440 | .owner = THIS_MODULE, \ | |
441 | .enable_time = 500, \ | |
442 | }, \ | |
443 | } | |
444 | ||
445 | #define TPS80031_REG_LDO(_id, _preq_bit) \ | |
446 | { \ | |
447 | .trans_reg = TPS80031_##_id##_CFG_TRANS, \ | |
448 | .state_reg = TPS80031_##_id##_CFG_STATE, \ | |
449 | .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \ | |
b92f787d | 450 | .volt_id = TPS80031_SLAVE_ID1, \ |
1a0bb679 LD |
451 | .preq_bit = _preq_bit, \ |
452 | .desc = { \ | |
453 | .owner = THIS_MODULE, \ | |
454 | .name = "tps80031_"#_id, \ | |
455 | .id = TPS80031_REGULATOR_##_id, \ | |
456 | .ops = &tps80031_ldo_ops, \ | |
457 | .type = REGULATOR_VOLTAGE, \ | |
458 | .min_uV = 1000000, \ | |
459 | .uV_step = 100000, \ | |
7fa8a597 | 460 | .linear_min_sel = 1, \ |
1a0bb679 LD |
461 | .n_voltages = 25, \ |
462 | .vsel_mask = LDO_VSEL_MASK, \ | |
463 | .enable_time = 500, \ | |
464 | }, \ | |
465 | } | |
466 | ||
467 | #define TPS80031_REG_FIXED(_id, max_mV, _ops, _delay, _pbit) \ | |
468 | { \ | |
469 | .trans_reg = TPS80031_##_id##_CFG_TRANS, \ | |
470 | .state_reg = TPS80031_##_id##_CFG_STATE, \ | |
b92f787d | 471 | .volt_id = TPS80031_SLAVE_ID1, \ |
1a0bb679 LD |
472 | .preq_bit = _pbit, \ |
473 | .desc = { \ | |
474 | .name = "tps80031_"#_id, \ | |
475 | .id = TPS80031_REGULATOR_##_id, \ | |
bf0caae3 AL |
476 | .min_uV = max_mV * 1000, \ |
477 | .n_voltages = 1, \ | |
1a0bb679 LD |
478 | .ops = &_ops, \ |
479 | .type = REGULATOR_VOLTAGE, \ | |
480 | .owner = THIS_MODULE, \ | |
481 | .enable_time = _delay, \ | |
482 | }, \ | |
483 | } | |
484 | ||
485 | static struct tps80031_regulator_info tps80031_rinfo[TPS80031_REGULATOR_MAX] = { | |
486 | TPS80031_REG_SMPS(VIO, ID0, 4), | |
487 | TPS80031_REG_SMPS(SMPS1, ID0, 0), | |
488 | TPS80031_REG_SMPS(SMPS2, ID0, 1), | |
489 | TPS80031_REG_SMPS(SMPS3, ID1, 2), | |
490 | TPS80031_REG_SMPS(SMPS4, ID1, 3), | |
491 | TPS80031_REG_LDO(VANA, -1), | |
492 | TPS80031_REG_LDO(LDO1, 8), | |
493 | TPS80031_REG_LDO(LDO2, 9), | |
494 | TPS80031_REG_LDO(LDO3, 10), | |
495 | TPS80031_REG_LDO(LDO4, 11), | |
496 | TPS80031_REG_LDO(LDO5, 12), | |
497 | TPS80031_REG_LDO(LDO6, 13), | |
498 | TPS80031_REG_LDO(LDO7, 14), | |
499 | TPS80031_REG_LDO(LDOLN, 15), | |
500 | TPS80031_REG_LDO(LDOUSB, 5), | |
501 | TPS80031_REG_FIXED(VBUS, 5000, tps80031_vbus_hw_ops, 100000, -1), | |
502 | TPS80031_REG_FIXED(REGEN1, 3300, tps80031_ext_reg_ops, 0, 16), | |
503 | TPS80031_REG_FIXED(REGEN2, 3300, tps80031_ext_reg_ops, 0, 17), | |
504 | TPS80031_REG_FIXED(SYSEN, 3300, tps80031_ext_reg_ops, 0, 18), | |
505 | }; | |
506 | ||
507 | static int tps80031_power_req_config(struct device *parent, | |
508 | struct tps80031_regulator *ri, | |
509 | struct tps80031_regulator_platform_data *tps80031_pdata) | |
510 | { | |
511 | int ret = 0; | |
512 | ||
513 | if (ri->rinfo->preq_bit < 0) | |
514 | goto skip_pwr_req_config; | |
515 | ||
516 | ret = tps80031_ext_power_req_config(parent, ri->ext_ctrl_flag, | |
517 | ri->rinfo->preq_bit, ri->rinfo->state_reg, | |
518 | ri->rinfo->trans_reg); | |
519 | if (ret < 0) { | |
520 | dev_err(ri->dev, "ext powerreq config failed, err = %d\n", ret); | |
521 | return ret; | |
522 | } | |
523 | ||
524 | skip_pwr_req_config: | |
b92f787d LD |
525 | if (tps80031_pdata->ext_ctrl_flag & TPS80031_PWR_ON_ON_SLEEP) { |
526 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, | |
527 | ri->rinfo->trans_reg, TPS80031_TRANS_SLEEP_ON, | |
528 | TPS80031_TRANS_SLEEP_MASK); | |
1a0bb679 LD |
529 | if (ret < 0) { |
530 | dev_err(ri->dev, "Reg 0x%02x update failed, e %d\n", | |
531 | ri->rinfo->trans_reg, ret); | |
532 | return ret; | |
533 | } | |
534 | } | |
535 | return ret; | |
536 | } | |
537 | ||
538 | static int tps80031_regulator_config(struct device *parent, | |
539 | struct tps80031_regulator *ri, | |
540 | struct tps80031_regulator_platform_data *tps80031_pdata) | |
541 | { | |
542 | int ret = 0; | |
543 | ||
544 | switch (ri->rinfo->desc.id) { | |
545 | case TPS80031_REGULATOR_LDOUSB: | |
b92f787d LD |
546 | if (ri->config_flags & (TPS80031_USBLDO_INPUT_VSYS | |
547 | TPS80031_USBLDO_INPUT_PMID)) { | |
1a0bb679 | 548 | unsigned val = 0; |
b92f787d | 549 | if (ri->config_flags & TPS80031_USBLDO_INPUT_VSYS) |
1a0bb679 LD |
550 | val = MISC2_LDOUSB_IN_VSYS; |
551 | else | |
552 | val = MISC2_LDOUSB_IN_PMID; | |
553 | ||
b92f787d LD |
554 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, |
555 | TPS80031_MISC2, val, | |
556 | MISC2_LDOUSB_IN_MASK); | |
1a0bb679 LD |
557 | if (ret < 0) { |
558 | dev_err(ri->dev, | |
559 | "LDOUSB config failed, e= %d\n", ret); | |
560 | return ret; | |
561 | } | |
562 | } | |
563 | break; | |
564 | ||
565 | case TPS80031_REGULATOR_LDO3: | |
b92f787d LD |
566 | if (ri->config_flags & TPS80031_LDO3_OUTPUT_VIB) { |
567 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, | |
1a0bb679 LD |
568 | TPS80031_MISC2, MISC2_LDO3_SEL_VIB_VAL, |
569 | MISC2_LDO3_SEL_VIB_MASK); | |
570 | if (ret < 0) { | |
571 | dev_err(ri->dev, | |
572 | "LDO3 config failed, e = %d\n", ret); | |
573 | return ret; | |
574 | } | |
575 | } | |
576 | break; | |
577 | ||
578 | case TPS80031_REGULATOR_VBUS: | |
579 | /* Provide SW control Ops if VBUS is SW control */ | |
b92f787d | 580 | if (!(ri->config_flags & TPS80031_VBUS_SW_ONLY)) |
1a0bb679 LD |
581 | ri->rinfo->desc.ops = &tps80031_vbus_sw_ops; |
582 | break; | |
583 | default: | |
584 | break; | |
585 | } | |
586 | ||
587 | /* Configure Active state to ON, SLEEP to OFF and OFF_state to OFF */ | |
b92f787d LD |
588 | ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->trans_reg, |
589 | TPS80031_TRANS_ACTIVE_ON | TPS80031_TRANS_SLEEP_OFF | | |
590 | TPS80031_TRANS_OFF_OFF, TPS80031_TRANS_ACTIVE_MASK | | |
591 | TPS80031_TRANS_SLEEP_MASK | TPS80031_TRANS_OFF_MASK); | |
1a0bb679 LD |
592 | if (ret < 0) { |
593 | dev_err(ri->dev, "trans reg update failed, e %d\n", ret); | |
594 | return ret; | |
595 | } | |
596 | ||
597 | return ret; | |
598 | } | |
599 | ||
600 | static int check_smps_mode_mult(struct device *parent, | |
601 | struct tps80031_regulator *ri) | |
602 | { | |
603 | int mult_offset; | |
604 | int ret; | |
605 | u8 smps_offset; | |
606 | u8 smps_mult; | |
607 | ||
b92f787d | 608 | ret = tps80031_read(parent, TPS80031_SLAVE_ID1, |
1a0bb679 LD |
609 | TPS80031_SMPS_OFFSET, &smps_offset); |
610 | if (ret < 0) { | |
611 | dev_err(parent, "Error in reading smps offset register\n"); | |
612 | return ret; | |
613 | } | |
614 | ||
b92f787d | 615 | ret = tps80031_read(parent, TPS80031_SLAVE_ID1, |
1a0bb679 LD |
616 | TPS80031_SMPS_MULT, &smps_mult); |
617 | if (ret < 0) { | |
618 | dev_err(parent, "Error in reading smps mult register\n"); | |
619 | return ret; | |
620 | } | |
621 | ||
622 | switch (ri->rinfo->desc.id) { | |
623 | case TPS80031_REGULATOR_VIO: | |
624 | mult_offset = SMPS_MULTOFFSET_VIO; | |
625 | break; | |
626 | case TPS80031_REGULATOR_SMPS1: | |
627 | mult_offset = SMPS_MULTOFFSET_SMPS1; | |
628 | break; | |
629 | case TPS80031_REGULATOR_SMPS2: | |
630 | mult_offset = SMPS_MULTOFFSET_SMPS2; | |
631 | break; | |
632 | case TPS80031_REGULATOR_SMPS3: | |
633 | mult_offset = SMPS_MULTOFFSET_SMPS3; | |
634 | break; | |
635 | case TPS80031_REGULATOR_SMPS4: | |
636 | mult_offset = SMPS_MULTOFFSET_SMPS4; | |
637 | break; | |
638 | case TPS80031_REGULATOR_LDO2: | |
639 | ri->device_flags = smps_mult & BIT(5) ? TRACK_MODE_ENABLE : 0; | |
640 | /* TRACK mode the ldo2 varies from 600mV to 1300mV */ | |
641 | if (ri->device_flags & TRACK_MODE_ENABLE) { | |
642 | ri->rinfo->desc.min_uV = 600000; | |
643 | ri->rinfo->desc.uV_step = 12500; | |
644 | ri->rinfo->desc.n_voltages = 57; | |
645 | ri->rinfo->desc.vsel_mask = LDO_TRACK_VSEL_MASK; | |
646 | } | |
647 | return 0; | |
648 | default: | |
649 | return 0; | |
650 | } | |
651 | ||
652 | ri->device_flags = (smps_offset & mult_offset) ? DCDC_OFFSET_EN : 0; | |
653 | ri->device_flags |= (smps_mult & mult_offset) ? DCDC_EXTENDED_EN : 0; | |
654 | switch (ri->device_flags) { | |
655 | case 0: | |
656 | ri->rinfo->desc.min_uV = 607700; | |
657 | ri->rinfo->desc.uV_step = 12660; | |
658 | break; | |
659 | case DCDC_OFFSET_EN: | |
660 | ri->rinfo->desc.min_uV = 700000; | |
661 | ri->rinfo->desc.uV_step = 12500; | |
662 | break; | |
663 | case DCDC_EXTENDED_EN: | |
664 | ri->rinfo->desc.min_uV = 1852000; | |
665 | ri->rinfo->desc.uV_step = 38600; | |
666 | break; | |
667 | case DCDC_OFFSET_EN | DCDC_EXTENDED_EN: | |
668 | ri->rinfo->desc.min_uV = 2161000; | |
669 | ri->rinfo->desc.uV_step = 38600; | |
670 | break; | |
671 | } | |
672 | return 0; | |
673 | } | |
674 | ||
a5023574 | 675 | static int tps80031_regulator_probe(struct platform_device *pdev) |
1a0bb679 LD |
676 | { |
677 | struct tps80031_platform_data *pdata; | |
678 | struct tps80031_regulator_platform_data *tps_pdata; | |
1a0bb679 LD |
679 | struct tps80031_regulator *ri; |
680 | struct tps80031_regulator *pmic; | |
681 | struct regulator_dev *rdev; | |
682 | struct regulator_config config = { }; | |
683 | int ret; | |
684 | int num; | |
685 | ||
686 | pdata = dev_get_platdata(pdev->dev.parent); | |
687 | ||
688 | if (!pdata) { | |
689 | dev_err(&pdev->dev, "No platform data\n"); | |
690 | return -EINVAL; | |
691 | } | |
692 | ||
693 | pmic = devm_kzalloc(&pdev->dev, | |
694 | TPS80031_REGULATOR_MAX * sizeof(*pmic), GFP_KERNEL); | |
695 | if (!pmic) { | |
696 | dev_err(&pdev->dev, "mem alloc for pmic failed\n"); | |
697 | return -ENOMEM; | |
698 | } | |
699 | ||
700 | for (num = 0; num < TPS80031_REGULATOR_MAX; ++num) { | |
701 | tps_pdata = pdata->regulator_pdata[num]; | |
1a0bb679 | 702 | ri = &pmic[num]; |
1a7ae58e | 703 | ri->rinfo = &tps80031_rinfo[num]; |
1a0bb679 LD |
704 | ri->dev = &pdev->dev; |
705 | ||
706 | check_smps_mode_mult(pdev->dev.parent, ri); | |
707 | config.dev = &pdev->dev; | |
708 | config.init_data = NULL; | |
709 | config.driver_data = ri; | |
710 | if (tps_pdata) { | |
711 | config.init_data = tps_pdata->reg_init_data; | |
712 | ri->config_flags = tps_pdata->config_flags; | |
713 | ri->ext_ctrl_flag = tps_pdata->ext_ctrl_flag; | |
714 | ret = tps80031_regulator_config(pdev->dev.parent, | |
715 | ri, tps_pdata); | |
716 | if (ret < 0) { | |
717 | dev_err(&pdev->dev, | |
718 | "regulator config failed, e %d\n", ret); | |
719 | goto fail; | |
720 | } | |
721 | ||
722 | ret = tps80031_power_req_config(pdev->dev.parent, | |
723 | ri, tps_pdata); | |
724 | if (ret < 0) { | |
725 | dev_err(&pdev->dev, | |
726 | "pwr_req config failed, err %d\n", ret); | |
727 | goto fail; | |
728 | } | |
729 | } | |
730 | rdev = regulator_register(&ri->rinfo->desc, &config); | |
d4cbca9e | 731 | if (IS_ERR(rdev)) { |
1a0bb679 LD |
732 | dev_err(&pdev->dev, |
733 | "register regulator failed %s\n", | |
734 | ri->rinfo->desc.name); | |
735 | ret = PTR_ERR(rdev); | |
736 | goto fail; | |
737 | } | |
738 | ri->rdev = rdev; | |
739 | } | |
740 | ||
741 | platform_set_drvdata(pdev, pmic); | |
742 | return 0; | |
743 | fail: | |
744 | while (--num >= 0) { | |
745 | ri = &pmic[num]; | |
746 | regulator_unregister(ri->rdev); | |
747 | } | |
748 | return ret; | |
749 | } | |
750 | ||
8dc995f5 | 751 | static int tps80031_regulator_remove(struct platform_device *pdev) |
1a0bb679 LD |
752 | { |
753 | struct tps80031_regulator *pmic = platform_get_drvdata(pdev); | |
754 | struct tps80031_regulator *ri = NULL; | |
755 | int num; | |
756 | ||
757 | for (num = 0; num < TPS80031_REGULATOR_MAX; ++num) { | |
758 | ri = &pmic[num]; | |
759 | regulator_unregister(ri->rdev); | |
760 | } | |
761 | return 0; | |
762 | } | |
763 | ||
764 | static struct platform_driver tps80031_regulator_driver = { | |
765 | .driver = { | |
766 | .name = "tps80031-pmic", | |
767 | .owner = THIS_MODULE, | |
768 | }, | |
769 | .probe = tps80031_regulator_probe, | |
5eb9f2b9 | 770 | .remove = tps80031_regulator_remove, |
1a0bb679 LD |
771 | }; |
772 | ||
773 | static int __init tps80031_regulator_init(void) | |
774 | { | |
775 | return platform_driver_register(&tps80031_regulator_driver); | |
776 | } | |
777 | subsys_initcall(tps80031_regulator_init); | |
778 | ||
779 | static void __exit tps80031_regulator_exit(void) | |
780 | { | |
781 | platform_driver_unregister(&tps80031_regulator_driver); | |
782 | } | |
783 | module_exit(tps80031_regulator_exit); | |
784 | ||
785 | MODULE_ALIAS("platform:tps80031-regulator"); | |
1a7ae58e | 786 | MODULE_DESCRIPTION("Regulator Driver for TI TPS80031/TPS80032 PMIC"); |
1a0bb679 LD |
787 | MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); |
788 | MODULE_LICENSE("GPL v2"); |