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518fb721 GG |
1 | /* |
2 | * tps65910.c -- TI tps65910 | |
3 | * | |
4 | * Copyright 2010 Texas Instruments Inc. | |
5 | * | |
6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> | |
7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/gpio.h> | |
26 | #include <linux/mfd/tps65910.h> | |
27 | ||
518fb721 | 28 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
1e0c66f4 LD |
29 | #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ |
30 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ | |
f30b0716 LD |
31 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ |
32 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) | |
518fb721 GG |
33 | |
34 | /* supported VIO voltages in milivolts */ | |
35 | static const u16 VIO_VSEL_table[] = { | |
36 | 1500, 1800, 2500, 3300, | |
37 | }; | |
38 | ||
a320e3c3 JEC |
39 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
40 | ||
41 | /* supported VDD3 voltages in milivolts */ | |
518fb721 GG |
42 | static const u16 VDD3_VSEL_table[] = { |
43 | 5000, | |
44 | }; | |
45 | ||
46 | /* supported VDIG1 voltages in milivolts */ | |
47 | static const u16 VDIG1_VSEL_table[] = { | |
48 | 1200, 1500, 1800, 2700, | |
49 | }; | |
50 | ||
51 | /* supported VDIG2 voltages in milivolts */ | |
52 | static const u16 VDIG2_VSEL_table[] = { | |
53 | 1000, 1100, 1200, 1800, | |
54 | }; | |
55 | ||
56 | /* supported VPLL voltages in milivolts */ | |
57 | static const u16 VPLL_VSEL_table[] = { | |
58 | 1000, 1100, 1800, 2500, | |
59 | }; | |
60 | ||
61 | /* supported VDAC voltages in milivolts */ | |
62 | static const u16 VDAC_VSEL_table[] = { | |
63 | 1800, 2600, 2800, 2850, | |
64 | }; | |
65 | ||
66 | /* supported VAUX1 voltages in milivolts */ | |
67 | static const u16 VAUX1_VSEL_table[] = { | |
68 | 1800, 2500, 2800, 2850, | |
69 | }; | |
70 | ||
71 | /* supported VAUX2 voltages in milivolts */ | |
72 | static const u16 VAUX2_VSEL_table[] = { | |
73 | 1800, 2800, 2900, 3300, | |
74 | }; | |
75 | ||
76 | /* supported VAUX33 voltages in milivolts */ | |
77 | static const u16 VAUX33_VSEL_table[] = { | |
78 | 1800, 2000, 2800, 3300, | |
79 | }; | |
80 | ||
81 | /* supported VMMC voltages in milivolts */ | |
82 | static const u16 VMMC_VSEL_table[] = { | |
83 | 1800, 2800, 3000, 3300, | |
84 | }; | |
85 | ||
86 | struct tps_info { | |
87 | const char *name; | |
88 | unsigned min_uV; | |
89 | unsigned max_uV; | |
7d38a3cb LD |
90 | u8 n_voltages; |
91 | const u16 *voltage_table; | |
0651eed5 | 92 | int enable_time_us; |
518fb721 GG |
93 | }; |
94 | ||
95 | static struct tps_info tps65910_regs[] = { | |
96 | { | |
97 | .name = "VRTC", | |
0651eed5 | 98 | .enable_time_us = 2200, |
518fb721 GG |
99 | }, |
100 | { | |
101 | .name = "VIO", | |
102 | .min_uV = 1500000, | |
103 | .max_uV = 3300000, | |
7d38a3cb LD |
104 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
105 | .voltage_table = VIO_VSEL_table, | |
0651eed5 | 106 | .enable_time_us = 350, |
518fb721 GG |
107 | }, |
108 | { | |
109 | .name = "VDD1", | |
110 | .min_uV = 600000, | |
111 | .max_uV = 4500000, | |
0651eed5 | 112 | .enable_time_us = 350, |
518fb721 GG |
113 | }, |
114 | { | |
115 | .name = "VDD2", | |
116 | .min_uV = 600000, | |
117 | .max_uV = 4500000, | |
0651eed5 | 118 | .enable_time_us = 350, |
518fb721 GG |
119 | }, |
120 | { | |
121 | .name = "VDD3", | |
122 | .min_uV = 5000000, | |
123 | .max_uV = 5000000, | |
7d38a3cb LD |
124 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
125 | .voltage_table = VDD3_VSEL_table, | |
0651eed5 | 126 | .enable_time_us = 200, |
518fb721 GG |
127 | }, |
128 | { | |
129 | .name = "VDIG1", | |
130 | .min_uV = 1200000, | |
131 | .max_uV = 2700000, | |
7d38a3cb LD |
132 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
133 | .voltage_table = VDIG1_VSEL_table, | |
0651eed5 | 134 | .enable_time_us = 100, |
518fb721 GG |
135 | }, |
136 | { | |
137 | .name = "VDIG2", | |
138 | .min_uV = 1000000, | |
139 | .max_uV = 1800000, | |
7d38a3cb LD |
140 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
141 | .voltage_table = VDIG2_VSEL_table, | |
0651eed5 | 142 | .enable_time_us = 100, |
518fb721 GG |
143 | }, |
144 | { | |
145 | .name = "VPLL", | |
146 | .min_uV = 1000000, | |
147 | .max_uV = 2500000, | |
7d38a3cb LD |
148 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
149 | .voltage_table = VPLL_VSEL_table, | |
0651eed5 | 150 | .enable_time_us = 100, |
518fb721 GG |
151 | }, |
152 | { | |
153 | .name = "VDAC", | |
154 | .min_uV = 1800000, | |
155 | .max_uV = 2850000, | |
7d38a3cb LD |
156 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
157 | .voltage_table = VDAC_VSEL_table, | |
0651eed5 | 158 | .enable_time_us = 100, |
518fb721 GG |
159 | }, |
160 | { | |
161 | .name = "VAUX1", | |
162 | .min_uV = 1800000, | |
163 | .max_uV = 2850000, | |
7d38a3cb LD |
164 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
165 | .voltage_table = VAUX1_VSEL_table, | |
0651eed5 | 166 | .enable_time_us = 100, |
518fb721 GG |
167 | }, |
168 | { | |
169 | .name = "VAUX2", | |
170 | .min_uV = 1800000, | |
171 | .max_uV = 3300000, | |
7d38a3cb LD |
172 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
173 | .voltage_table = VAUX2_VSEL_table, | |
0651eed5 | 174 | .enable_time_us = 100, |
518fb721 GG |
175 | }, |
176 | { | |
177 | .name = "VAUX33", | |
178 | .min_uV = 1800000, | |
179 | .max_uV = 3300000, | |
7d38a3cb LD |
180 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
181 | .voltage_table = VAUX33_VSEL_table, | |
0651eed5 | 182 | .enable_time_us = 100, |
518fb721 GG |
183 | }, |
184 | { | |
185 | .name = "VMMC", | |
186 | .min_uV = 1800000, | |
187 | .max_uV = 3300000, | |
7d38a3cb LD |
188 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
189 | .voltage_table = VMMC_VSEL_table, | |
0651eed5 | 190 | .enable_time_us = 100, |
518fb721 GG |
191 | }, |
192 | }; | |
193 | ||
a320e3c3 | 194 | static struct tps_info tps65911_regs[] = { |
c2f8efd7 LD |
195 | { |
196 | .name = "VRTC", | |
0651eed5 | 197 | .enable_time_us = 2200, |
c2f8efd7 | 198 | }, |
a320e3c3 JEC |
199 | { |
200 | .name = "VIO", | |
201 | .min_uV = 1500000, | |
202 | .max_uV = 3300000, | |
7d38a3cb LD |
203 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
204 | .voltage_table = VIO_VSEL_table, | |
0651eed5 | 205 | .enable_time_us = 350, |
a320e3c3 JEC |
206 | }, |
207 | { | |
208 | .name = "VDD1", | |
209 | .min_uV = 600000, | |
210 | .max_uV = 4500000, | |
7d38a3cb | 211 | .n_voltages = 73, |
0651eed5 | 212 | .enable_time_us = 350, |
a320e3c3 JEC |
213 | }, |
214 | { | |
215 | .name = "VDD2", | |
216 | .min_uV = 600000, | |
217 | .max_uV = 4500000, | |
7d38a3cb | 218 | .n_voltages = 73, |
0651eed5 | 219 | .enable_time_us = 350, |
a320e3c3 JEC |
220 | }, |
221 | { | |
222 | .name = "VDDCTRL", | |
223 | .min_uV = 600000, | |
224 | .max_uV = 1400000, | |
7d38a3cb | 225 | .n_voltages = 65, |
0651eed5 | 226 | .enable_time_us = 900, |
a320e3c3 JEC |
227 | }, |
228 | { | |
229 | .name = "LDO1", | |
230 | .min_uV = 1000000, | |
231 | .max_uV = 3300000, | |
7d38a3cb | 232 | .n_voltages = 47, |
0651eed5 | 233 | .enable_time_us = 420, |
a320e3c3 JEC |
234 | }, |
235 | { | |
236 | .name = "LDO2", | |
237 | .min_uV = 1000000, | |
238 | .max_uV = 3300000, | |
7d38a3cb | 239 | .n_voltages = 47, |
0651eed5 | 240 | .enable_time_us = 420, |
a320e3c3 JEC |
241 | }, |
242 | { | |
243 | .name = "LDO3", | |
244 | .min_uV = 1000000, | |
245 | .max_uV = 3300000, | |
7d38a3cb | 246 | .n_voltages = 24, |
0651eed5 | 247 | .enable_time_us = 230, |
a320e3c3 JEC |
248 | }, |
249 | { | |
250 | .name = "LDO4", | |
251 | .min_uV = 1000000, | |
252 | .max_uV = 3300000, | |
7d38a3cb | 253 | .n_voltages = 47, |
0651eed5 | 254 | .enable_time_us = 230, |
a320e3c3 JEC |
255 | }, |
256 | { | |
257 | .name = "LDO5", | |
258 | .min_uV = 1000000, | |
259 | .max_uV = 3300000, | |
7d38a3cb | 260 | .n_voltages = 24, |
0651eed5 | 261 | .enable_time_us = 230, |
a320e3c3 JEC |
262 | }, |
263 | { | |
264 | .name = "LDO6", | |
265 | .min_uV = 1000000, | |
266 | .max_uV = 3300000, | |
7d38a3cb | 267 | .n_voltages = 24, |
0651eed5 | 268 | .enable_time_us = 230, |
a320e3c3 JEC |
269 | }, |
270 | { | |
271 | .name = "LDO7", | |
272 | .min_uV = 1000000, | |
273 | .max_uV = 3300000, | |
7d38a3cb | 274 | .n_voltages = 24, |
0651eed5 | 275 | .enable_time_us = 230, |
a320e3c3 JEC |
276 | }, |
277 | { | |
278 | .name = "LDO8", | |
279 | .min_uV = 1000000, | |
280 | .max_uV = 3300000, | |
7d38a3cb | 281 | .n_voltages = 24, |
0651eed5 | 282 | .enable_time_us = 230, |
a320e3c3 JEC |
283 | }, |
284 | }; | |
285 | ||
1e0c66f4 LD |
286 | #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) |
287 | static unsigned int tps65910_ext_sleep_control[] = { | |
288 | 0, | |
289 | EXT_CONTROL_REG_BITS(VIO, 1, 0), | |
290 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), | |
291 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), | |
292 | EXT_CONTROL_REG_BITS(VDD3, 1, 3), | |
293 | EXT_CONTROL_REG_BITS(VDIG1, 0, 1), | |
294 | EXT_CONTROL_REG_BITS(VDIG2, 0, 2), | |
295 | EXT_CONTROL_REG_BITS(VPLL, 0, 6), | |
296 | EXT_CONTROL_REG_BITS(VDAC, 0, 7), | |
297 | EXT_CONTROL_REG_BITS(VAUX1, 0, 3), | |
298 | EXT_CONTROL_REG_BITS(VAUX2, 0, 4), | |
299 | EXT_CONTROL_REG_BITS(VAUX33, 0, 5), | |
300 | EXT_CONTROL_REG_BITS(VMMC, 0, 0), | |
301 | }; | |
302 | ||
303 | static unsigned int tps65911_ext_sleep_control[] = { | |
304 | 0, | |
305 | EXT_CONTROL_REG_BITS(VIO, 1, 0), | |
306 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), | |
307 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), | |
308 | EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), | |
309 | EXT_CONTROL_REG_BITS(LDO1, 0, 1), | |
310 | EXT_CONTROL_REG_BITS(LDO2, 0, 2), | |
311 | EXT_CONTROL_REG_BITS(LDO3, 0, 7), | |
312 | EXT_CONTROL_REG_BITS(LDO4, 0, 6), | |
313 | EXT_CONTROL_REG_BITS(LDO5, 0, 3), | |
314 | EXT_CONTROL_REG_BITS(LDO6, 0, 0), | |
315 | EXT_CONTROL_REG_BITS(LDO7, 0, 5), | |
316 | EXT_CONTROL_REG_BITS(LDO8, 0, 4), | |
317 | }; | |
318 | ||
518fb721 | 319 | struct tps65910_reg { |
39aa9b6e | 320 | struct regulator_desc *desc; |
518fb721 | 321 | struct tps65910 *mfd; |
39aa9b6e AL |
322 | struct regulator_dev **rdev; |
323 | struct tps_info **info; | |
518fb721 | 324 | struct mutex mutex; |
39aa9b6e | 325 | int num_regulators; |
518fb721 | 326 | int mode; |
a320e3c3 | 327 | int (*get_ctrl_reg)(int); |
1e0c66f4 LD |
328 | unsigned int *ext_sleep_control; |
329 | unsigned int board_ext_control[TPS65910_NUM_REGS]; | |
518fb721 GG |
330 | }; |
331 | ||
332 | static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) | |
333 | { | |
334 | u8 val; | |
335 | int err; | |
336 | ||
337 | err = pmic->mfd->read(pmic->mfd, reg, 1, &val); | |
338 | if (err) | |
339 | return err; | |
340 | ||
341 | return val; | |
342 | } | |
343 | ||
344 | static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val) | |
345 | { | |
346 | return pmic->mfd->write(pmic->mfd, reg, 1, &val); | |
347 | } | |
348 | ||
349 | static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, | |
350 | u8 set_mask, u8 clear_mask) | |
351 | { | |
352 | int err, data; | |
353 | ||
354 | mutex_lock(&pmic->mutex); | |
355 | ||
356 | data = tps65910_read(pmic, reg); | |
357 | if (data < 0) { | |
358 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); | |
359 | err = data; | |
360 | goto out; | |
361 | } | |
362 | ||
363 | data &= ~clear_mask; | |
364 | data |= set_mask; | |
365 | err = tps65910_write(pmic, reg, data); | |
366 | if (err) | |
367 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); | |
368 | ||
369 | out: | |
370 | mutex_unlock(&pmic->mutex); | |
371 | return err; | |
372 | } | |
373 | ||
374 | static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) | |
375 | { | |
376 | int data; | |
377 | ||
378 | mutex_lock(&pmic->mutex); | |
379 | ||
380 | data = tps65910_read(pmic, reg); | |
381 | if (data < 0) | |
382 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); | |
383 | ||
384 | mutex_unlock(&pmic->mutex); | |
385 | return data; | |
386 | } | |
387 | ||
388 | static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val) | |
389 | { | |
390 | int err; | |
391 | ||
392 | mutex_lock(&pmic->mutex); | |
393 | ||
394 | err = tps65910_write(pmic, reg, val); | |
395 | if (err < 0) | |
396 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); | |
397 | ||
398 | mutex_unlock(&pmic->mutex); | |
399 | return err; | |
400 | } | |
401 | ||
402 | static int tps65910_get_ctrl_register(int id) | |
403 | { | |
404 | switch (id) { | |
405 | case TPS65910_REG_VRTC: | |
406 | return TPS65910_VRTC; | |
407 | case TPS65910_REG_VIO: | |
408 | return TPS65910_VIO; | |
409 | case TPS65910_REG_VDD1: | |
410 | return TPS65910_VDD1; | |
411 | case TPS65910_REG_VDD2: | |
412 | return TPS65910_VDD2; | |
413 | case TPS65910_REG_VDD3: | |
414 | return TPS65910_VDD3; | |
415 | case TPS65910_REG_VDIG1: | |
416 | return TPS65910_VDIG1; | |
417 | case TPS65910_REG_VDIG2: | |
418 | return TPS65910_VDIG2; | |
419 | case TPS65910_REG_VPLL: | |
420 | return TPS65910_VPLL; | |
421 | case TPS65910_REG_VDAC: | |
422 | return TPS65910_VDAC; | |
423 | case TPS65910_REG_VAUX1: | |
424 | return TPS65910_VAUX1; | |
425 | case TPS65910_REG_VAUX2: | |
426 | return TPS65910_VAUX2; | |
427 | case TPS65910_REG_VAUX33: | |
428 | return TPS65910_VAUX33; | |
429 | case TPS65910_REG_VMMC: | |
430 | return TPS65910_VMMC; | |
431 | default: | |
432 | return -EINVAL; | |
433 | } | |
434 | } | |
435 | ||
a320e3c3 JEC |
436 | static int tps65911_get_ctrl_register(int id) |
437 | { | |
438 | switch (id) { | |
439 | case TPS65910_REG_VRTC: | |
440 | return TPS65910_VRTC; | |
441 | case TPS65910_REG_VIO: | |
442 | return TPS65910_VIO; | |
443 | case TPS65910_REG_VDD1: | |
444 | return TPS65910_VDD1; | |
445 | case TPS65910_REG_VDD2: | |
446 | return TPS65910_VDD2; | |
447 | case TPS65911_REG_VDDCTRL: | |
448 | return TPS65911_VDDCTRL; | |
449 | case TPS65911_REG_LDO1: | |
450 | return TPS65911_LDO1; | |
451 | case TPS65911_REG_LDO2: | |
452 | return TPS65911_LDO2; | |
453 | case TPS65911_REG_LDO3: | |
454 | return TPS65911_LDO3; | |
455 | case TPS65911_REG_LDO4: | |
456 | return TPS65911_LDO4; | |
457 | case TPS65911_REG_LDO5: | |
458 | return TPS65911_LDO5; | |
459 | case TPS65911_REG_LDO6: | |
460 | return TPS65911_LDO6; | |
461 | case TPS65911_REG_LDO7: | |
462 | return TPS65911_LDO7; | |
463 | case TPS65911_REG_LDO8: | |
464 | return TPS65911_LDO8; | |
465 | default: | |
466 | return -EINVAL; | |
467 | } | |
468 | } | |
469 | ||
518fb721 GG |
470 | static int tps65910_is_enabled(struct regulator_dev *dev) |
471 | { | |
472 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
473 | int reg, value, id = rdev_get_id(dev); | |
474 | ||
a320e3c3 | 475 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
476 | if (reg < 0) |
477 | return reg; | |
478 | ||
479 | value = tps65910_reg_read(pmic, reg); | |
480 | if (value < 0) | |
481 | return value; | |
482 | ||
483 | return value & TPS65910_SUPPLY_STATE_ENABLED; | |
484 | } | |
485 | ||
486 | static int tps65910_enable(struct regulator_dev *dev) | |
487 | { | |
488 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
489 | struct tps65910 *mfd = pmic->mfd; | |
490 | int reg, id = rdev_get_id(dev); | |
491 | ||
a320e3c3 | 492 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
493 | if (reg < 0) |
494 | return reg; | |
495 | ||
496 | return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); | |
497 | } | |
498 | ||
499 | static int tps65910_disable(struct regulator_dev *dev) | |
500 | { | |
501 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
502 | struct tps65910 *mfd = pmic->mfd; | |
503 | int reg, id = rdev_get_id(dev); | |
504 | ||
a320e3c3 | 505 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
506 | if (reg < 0) |
507 | return reg; | |
508 | ||
509 | return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); | |
510 | } | |
511 | ||
0651eed5 LD |
512 | static int tps65910_enable_time(struct regulator_dev *dev) |
513 | { | |
514 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
515 | int id = rdev_get_id(dev); | |
516 | return pmic->info[id]->enable_time_us; | |
517 | } | |
518fb721 GG |
518 | |
519 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) | |
520 | { | |
521 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
522 | struct tps65910 *mfd = pmic->mfd; | |
523 | int reg, value, id = rdev_get_id(dev); | |
a320e3c3 JEC |
524 | |
525 | reg = pmic->get_ctrl_reg(id); | |
518fb721 GG |
526 | if (reg < 0) |
527 | return reg; | |
528 | ||
529 | switch (mode) { | |
530 | case REGULATOR_MODE_NORMAL: | |
531 | return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT, | |
532 | LDO_ST_MODE_BIT); | |
533 | case REGULATOR_MODE_IDLE: | |
534 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; | |
535 | return tps65910_set_bits(mfd, reg, value); | |
536 | case REGULATOR_MODE_STANDBY: | |
537 | return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT); | |
538 | } | |
539 | ||
540 | return -EINVAL; | |
541 | } | |
542 | ||
543 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) | |
544 | { | |
545 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
546 | int reg, value, id = rdev_get_id(dev); | |
547 | ||
a320e3c3 | 548 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
549 | if (reg < 0) |
550 | return reg; | |
551 | ||
552 | value = tps65910_reg_read(pmic, reg); | |
553 | if (value < 0) | |
554 | return value; | |
555 | ||
58599393 | 556 | if (!(value & LDO_ST_ON_BIT)) |
518fb721 GG |
557 | return REGULATOR_MODE_STANDBY; |
558 | else if (value & LDO_ST_MODE_BIT) | |
559 | return REGULATOR_MODE_IDLE; | |
560 | else | |
561 | return REGULATOR_MODE_NORMAL; | |
562 | } | |
563 | ||
18039e0f | 564 | static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) |
518fb721 GG |
565 | { |
566 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
18039e0f | 567 | int id = rdev_get_id(dev); |
a320e3c3 | 568 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
518fb721 GG |
569 | |
570 | switch (id) { | |
571 | case TPS65910_REG_VDD1: | |
572 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP); | |
573 | mult = tps65910_reg_read(pmic, TPS65910_VDD1); | |
574 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; | |
575 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR); | |
576 | sr = opvsel & VDD1_OP_CMD_MASK; | |
577 | opvsel &= VDD1_OP_SEL_MASK; | |
578 | srvsel &= VDD1_SR_SEL_MASK; | |
a320e3c3 | 579 | vselmax = 75; |
518fb721 GG |
580 | break; |
581 | case TPS65910_REG_VDD2: | |
582 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP); | |
583 | mult = tps65910_reg_read(pmic, TPS65910_VDD2); | |
584 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; | |
585 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR); | |
586 | sr = opvsel & VDD2_OP_CMD_MASK; | |
587 | opvsel &= VDD2_OP_SEL_MASK; | |
588 | srvsel &= VDD2_SR_SEL_MASK; | |
a320e3c3 JEC |
589 | vselmax = 75; |
590 | break; | |
591 | case TPS65911_REG_VDDCTRL: | |
592 | opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP); | |
593 | srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR); | |
594 | sr = opvsel & VDDCTRL_OP_CMD_MASK; | |
595 | opvsel &= VDDCTRL_OP_SEL_MASK; | |
596 | srvsel &= VDDCTRL_SR_SEL_MASK; | |
597 | vselmax = 64; | |
518fb721 GG |
598 | break; |
599 | } | |
600 | ||
601 | /* multiplier 0 == 1 but 2,3 normal */ | |
602 | if (!mult) | |
603 | mult=1; | |
604 | ||
605 | if (sr) { | |
a320e3c3 JEC |
606 | /* normalise to valid range */ |
607 | if (srvsel < 3) | |
608 | srvsel = 3; | |
609 | if (srvsel > vselmax) | |
610 | srvsel = vselmax; | |
18039e0f | 611 | return srvsel - 3; |
518fb721 GG |
612 | } else { |
613 | ||
a320e3c3 JEC |
614 | /* normalise to valid range*/ |
615 | if (opvsel < 3) | |
616 | opvsel = 3; | |
617 | if (opvsel > vselmax) | |
618 | opvsel = vselmax; | |
18039e0f | 619 | return opvsel - 3; |
518fb721 | 620 | } |
18039e0f | 621 | return -EINVAL; |
518fb721 GG |
622 | } |
623 | ||
624 | static int tps65910_get_voltage(struct regulator_dev *dev) | |
625 | { | |
626 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
627 | int reg, value, id = rdev_get_id(dev), voltage = 0; | |
628 | ||
a320e3c3 | 629 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
630 | if (reg < 0) |
631 | return reg; | |
632 | ||
633 | value = tps65910_reg_read(pmic, reg); | |
634 | if (value < 0) | |
635 | return value; | |
636 | ||
637 | switch (id) { | |
638 | case TPS65910_REG_VIO: | |
639 | case TPS65910_REG_VDIG1: | |
640 | case TPS65910_REG_VDIG2: | |
641 | case TPS65910_REG_VPLL: | |
642 | case TPS65910_REG_VDAC: | |
643 | case TPS65910_REG_VAUX1: | |
644 | case TPS65910_REG_VAUX2: | |
645 | case TPS65910_REG_VAUX33: | |
646 | case TPS65910_REG_VMMC: | |
647 | value &= LDO_SEL_MASK; | |
648 | value >>= LDO_SEL_SHIFT; | |
649 | break; | |
650 | default: | |
651 | return -EINVAL; | |
652 | } | |
653 | ||
7d38a3cb | 654 | voltage = pmic->info[id]->voltage_table[value] * 1000; |
518fb721 GG |
655 | |
656 | return voltage; | |
657 | } | |
658 | ||
659 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) | |
660 | { | |
661 | return 5 * 1000 * 1000; | |
662 | } | |
663 | ||
a320e3c3 JEC |
664 | static int tps65911_get_voltage(struct regulator_dev *dev) |
665 | { | |
666 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
667 | int step_mv, id = rdev_get_id(dev); | |
668 | u8 value, reg; | |
669 | ||
670 | reg = pmic->get_ctrl_reg(id); | |
671 | ||
672 | value = tps65910_reg_read(pmic, reg); | |
673 | ||
674 | switch (id) { | |
675 | case TPS65911_REG_LDO1: | |
676 | case TPS65911_REG_LDO2: | |
677 | case TPS65911_REG_LDO4: | |
678 | value &= LDO1_SEL_MASK; | |
679 | value >>= LDO_SEL_SHIFT; | |
680 | /* The first 5 values of the selector correspond to 1V */ | |
681 | if (value < 5) | |
682 | value = 0; | |
683 | else | |
684 | value -= 4; | |
685 | ||
686 | step_mv = 50; | |
687 | break; | |
688 | case TPS65911_REG_LDO3: | |
689 | case TPS65911_REG_LDO5: | |
690 | case TPS65911_REG_LDO6: | |
691 | case TPS65911_REG_LDO7: | |
692 | case TPS65911_REG_LDO8: | |
693 | value &= LDO3_SEL_MASK; | |
694 | value >>= LDO_SEL_SHIFT; | |
695 | /* The first 3 values of the selector correspond to 1V */ | |
696 | if (value < 3) | |
697 | value = 0; | |
698 | else | |
699 | value -= 2; | |
700 | ||
701 | step_mv = 100; | |
702 | break; | |
703 | case TPS65910_REG_VIO: | |
e882eae8 LD |
704 | value &= LDO_SEL_MASK; |
705 | value >>= LDO_SEL_SHIFT; | |
7d38a3cb | 706 | return pmic->info[id]->voltage_table[value] * 1000; |
a320e3c3 JEC |
707 | default: |
708 | return -EINVAL; | |
709 | } | |
710 | ||
711 | return (LDO_MIN_VOLT + value * step_mv) * 1000; | |
712 | } | |
713 | ||
94732b97 AL |
714 | static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, |
715 | unsigned selector) | |
518fb721 GG |
716 | { |
717 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
718 | int id = rdev_get_id(dev), vsel; | |
a320e3c3 | 719 | int dcdc_mult = 0; |
518fb721 | 720 | |
a320e3c3 JEC |
721 | switch (id) { |
722 | case TPS65910_REG_VDD1: | |
780dc9ba | 723 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 JEC |
724 | if (dcdc_mult == 1) |
725 | dcdc_mult--; | |
780dc9ba | 726 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
518fb721 | 727 | |
518fb721 GG |
728 | tps65910_modify_bits(pmic, TPS65910_VDD1, |
729 | (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), | |
730 | VDD1_VGAIN_SEL_MASK); | |
731 | tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel); | |
a320e3c3 JEC |
732 | break; |
733 | case TPS65910_REG_VDD2: | |
780dc9ba | 734 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 JEC |
735 | if (dcdc_mult == 1) |
736 | dcdc_mult--; | |
780dc9ba | 737 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
a320e3c3 | 738 | |
518fb721 GG |
739 | tps65910_modify_bits(pmic, TPS65910_VDD2, |
740 | (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), | |
741 | VDD1_VGAIN_SEL_MASK); | |
742 | tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel); | |
a320e3c3 JEC |
743 | break; |
744 | case TPS65911_REG_VDDCTRL: | |
c4632aed | 745 | vsel = selector + 3; |
a320e3c3 | 746 | tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel); |
518fb721 GG |
747 | } |
748 | ||
749 | return 0; | |
750 | } | |
751 | ||
94732b97 AL |
752 | static int tps65910_set_voltage_sel(struct regulator_dev *dev, |
753 | unsigned selector) | |
518fb721 GG |
754 | { |
755 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
756 | int reg, id = rdev_get_id(dev); | |
757 | ||
a320e3c3 | 758 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
759 | if (reg < 0) |
760 | return reg; | |
761 | ||
762 | switch (id) { | |
763 | case TPS65910_REG_VIO: | |
764 | case TPS65910_REG_VDIG1: | |
765 | case TPS65910_REG_VDIG2: | |
766 | case TPS65910_REG_VPLL: | |
767 | case TPS65910_REG_VDAC: | |
768 | case TPS65910_REG_VAUX1: | |
769 | case TPS65910_REG_VAUX2: | |
770 | case TPS65910_REG_VAUX33: | |
771 | case TPS65910_REG_VMMC: | |
772 | return tps65910_modify_bits(pmic, reg, | |
773 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); | |
774 | } | |
775 | ||
776 | return -EINVAL; | |
777 | } | |
778 | ||
94732b97 AL |
779 | static int tps65911_set_voltage_sel(struct regulator_dev *dev, |
780 | unsigned selector) | |
a320e3c3 JEC |
781 | { |
782 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
783 | int reg, id = rdev_get_id(dev); | |
784 | ||
785 | reg = pmic->get_ctrl_reg(id); | |
786 | if (reg < 0) | |
787 | return reg; | |
788 | ||
789 | switch (id) { | |
790 | case TPS65911_REG_LDO1: | |
791 | case TPS65911_REG_LDO2: | |
792 | case TPS65911_REG_LDO4: | |
793 | return tps65910_modify_bits(pmic, reg, | |
794 | (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK); | |
795 | case TPS65911_REG_LDO3: | |
796 | case TPS65911_REG_LDO5: | |
797 | case TPS65911_REG_LDO6: | |
798 | case TPS65911_REG_LDO7: | |
799 | case TPS65911_REG_LDO8: | |
a320e3c3 JEC |
800 | return tps65910_modify_bits(pmic, reg, |
801 | (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK); | |
e882eae8 LD |
802 | case TPS65910_REG_VIO: |
803 | return tps65910_modify_bits(pmic, reg, | |
804 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); | |
a320e3c3 JEC |
805 | } |
806 | ||
807 | return -EINVAL; | |
808 | } | |
809 | ||
810 | ||
518fb721 GG |
811 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
812 | unsigned selector) | |
813 | { | |
a320e3c3 | 814 | int volt, mult = 1, id = rdev_get_id(dev); |
518fb721 | 815 | |
a320e3c3 JEC |
816 | switch (id) { |
817 | case TPS65910_REG_VDD1: | |
818 | case TPS65910_REG_VDD2: | |
780dc9ba | 819 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 | 820 | volt = VDD1_2_MIN_VOLT + |
780dc9ba | 821 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
d04156bc | 822 | break; |
a320e3c3 JEC |
823 | case TPS65911_REG_VDDCTRL: |
824 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); | |
d04156bc AL |
825 | break; |
826 | default: | |
827 | BUG(); | |
828 | return -EINVAL; | |
a320e3c3 | 829 | } |
518fb721 GG |
830 | |
831 | return volt * 100 * mult; | |
832 | } | |
833 | ||
834 | static int tps65910_list_voltage(struct regulator_dev *dev, | |
835 | unsigned selector) | |
836 | { | |
837 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
838 | int id = rdev_get_id(dev), voltage; | |
839 | ||
840 | if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC) | |
841 | return -EINVAL; | |
842 | ||
7d38a3cb | 843 | if (selector >= pmic->info[id]->n_voltages) |
518fb721 GG |
844 | return -EINVAL; |
845 | else | |
7d38a3cb | 846 | voltage = pmic->info[id]->voltage_table[selector] * 1000; |
518fb721 GG |
847 | |
848 | return voltage; | |
849 | } | |
850 | ||
a320e3c3 JEC |
851 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
852 | { | |
853 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
854 | int step_mv = 0, id = rdev_get_id(dev); | |
855 | ||
856 | switch(id) { | |
857 | case TPS65911_REG_LDO1: | |
858 | case TPS65911_REG_LDO2: | |
859 | case TPS65911_REG_LDO4: | |
860 | /* The first 5 values of the selector correspond to 1V */ | |
861 | if (selector < 5) | |
862 | selector = 0; | |
863 | else | |
864 | selector -= 4; | |
865 | ||
866 | step_mv = 50; | |
867 | break; | |
868 | case TPS65911_REG_LDO3: | |
869 | case TPS65911_REG_LDO5: | |
870 | case TPS65911_REG_LDO6: | |
871 | case TPS65911_REG_LDO7: | |
872 | case TPS65911_REG_LDO8: | |
873 | /* The first 3 values of the selector correspond to 1V */ | |
874 | if (selector < 3) | |
875 | selector = 0; | |
876 | else | |
877 | selector -= 2; | |
878 | ||
879 | step_mv = 100; | |
880 | break; | |
881 | case TPS65910_REG_VIO: | |
7d38a3cb | 882 | return pmic->info[id]->voltage_table[selector] * 1000; |
a320e3c3 JEC |
883 | default: |
884 | return -EINVAL; | |
885 | } | |
886 | ||
887 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; | |
888 | } | |
889 | ||
18039e0f LD |
890 | static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev, |
891 | unsigned int old_selector, unsigned int new_selector) | |
892 | { | |
893 | int id = rdev_get_id(dev); | |
894 | int old_volt, new_volt; | |
895 | ||
896 | old_volt = tps65910_list_voltage_dcdc(dev, old_selector); | |
897 | if (old_volt < 0) | |
898 | return old_volt; | |
899 | ||
900 | new_volt = tps65910_list_voltage_dcdc(dev, new_selector); | |
901 | if (new_volt < 0) | |
902 | return new_volt; | |
903 | ||
904 | /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */ | |
905 | switch (id) { | |
906 | case TPS65910_REG_VDD1: | |
907 | case TPS65910_REG_VDD2: | |
908 | return DIV_ROUND_UP(abs(old_volt - new_volt), 12500); | |
909 | case TPS65911_REG_VDDCTRL: | |
910 | return DIV_ROUND_UP(abs(old_volt - new_volt), 5000); | |
911 | } | |
912 | return -EINVAL; | |
913 | } | |
914 | ||
518fb721 GG |
915 | /* Regulator ops (except VRTC) */ |
916 | static struct regulator_ops tps65910_ops_dcdc = { | |
917 | .is_enabled = tps65910_is_enabled, | |
918 | .enable = tps65910_enable, | |
919 | .disable = tps65910_disable, | |
0651eed5 | 920 | .enable_time = tps65910_enable_time, |
518fb721 GG |
921 | .set_mode = tps65910_set_mode, |
922 | .get_mode = tps65910_get_mode, | |
18039e0f | 923 | .get_voltage_sel = tps65910_get_voltage_dcdc_sel, |
94732b97 | 924 | .set_voltage_sel = tps65910_set_voltage_dcdc_sel, |
18039e0f | 925 | .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel, |
518fb721 GG |
926 | .list_voltage = tps65910_list_voltage_dcdc, |
927 | }; | |
928 | ||
929 | static struct regulator_ops tps65910_ops_vdd3 = { | |
930 | .is_enabled = tps65910_is_enabled, | |
931 | .enable = tps65910_enable, | |
932 | .disable = tps65910_disable, | |
0651eed5 | 933 | .enable_time = tps65910_enable_time, |
518fb721 GG |
934 | .set_mode = tps65910_set_mode, |
935 | .get_mode = tps65910_get_mode, | |
936 | .get_voltage = tps65910_get_voltage_vdd3, | |
937 | .list_voltage = tps65910_list_voltage, | |
938 | }; | |
939 | ||
940 | static struct regulator_ops tps65910_ops = { | |
941 | .is_enabled = tps65910_is_enabled, | |
942 | .enable = tps65910_enable, | |
943 | .disable = tps65910_disable, | |
0651eed5 | 944 | .enable_time = tps65910_enable_time, |
518fb721 GG |
945 | .set_mode = tps65910_set_mode, |
946 | .get_mode = tps65910_get_mode, | |
947 | .get_voltage = tps65910_get_voltage, | |
94732b97 | 948 | .set_voltage_sel = tps65910_set_voltage_sel, |
518fb721 GG |
949 | .list_voltage = tps65910_list_voltage, |
950 | }; | |
951 | ||
a320e3c3 JEC |
952 | static struct regulator_ops tps65911_ops = { |
953 | .is_enabled = tps65910_is_enabled, | |
954 | .enable = tps65910_enable, | |
955 | .disable = tps65910_disable, | |
0651eed5 | 956 | .enable_time = tps65910_enable_time, |
a320e3c3 JEC |
957 | .set_mode = tps65910_set_mode, |
958 | .get_mode = tps65910_get_mode, | |
959 | .get_voltage = tps65911_get_voltage, | |
94732b97 | 960 | .set_voltage_sel = tps65911_set_voltage_sel, |
a320e3c3 JEC |
961 | .list_voltage = tps65911_list_voltage, |
962 | }; | |
963 | ||
1e0c66f4 LD |
964 | static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, |
965 | int id, int ext_sleep_config) | |
966 | { | |
967 | struct tps65910 *mfd = pmic->mfd; | |
968 | u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; | |
969 | u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); | |
970 | int ret; | |
971 | ||
972 | /* | |
973 | * Regulator can not be control from multiple external input EN1, EN2 | |
974 | * and EN3 together. | |
975 | */ | |
976 | if (ext_sleep_config & EXT_SLEEP_CONTROL) { | |
977 | int en_count; | |
978 | en_count = ((ext_sleep_config & | |
979 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); | |
980 | en_count += ((ext_sleep_config & | |
981 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); | |
982 | en_count += ((ext_sleep_config & | |
983 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); | |
f30b0716 LD |
984 | en_count += ((ext_sleep_config & |
985 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); | |
1e0c66f4 LD |
986 | if (en_count > 1) { |
987 | dev_err(mfd->dev, | |
988 | "External sleep control flag is not proper\n"); | |
989 | return -EINVAL; | |
990 | } | |
991 | } | |
992 | ||
993 | pmic->board_ext_control[id] = ext_sleep_config; | |
994 | ||
995 | /* External EN1 control */ | |
996 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) | |
997 | ret = tps65910_set_bits(mfd, | |
998 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); | |
999 | else | |
1000 | ret = tps65910_clear_bits(mfd, | |
1001 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); | |
1002 | if (ret < 0) { | |
1003 | dev_err(mfd->dev, | |
1004 | "Error in configuring external control EN1\n"); | |
1005 | return ret; | |
1006 | } | |
1007 | ||
1008 | /* External EN2 control */ | |
1009 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) | |
1010 | ret = tps65910_set_bits(mfd, | |
1011 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); | |
1012 | else | |
1013 | ret = tps65910_clear_bits(mfd, | |
1014 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); | |
1015 | if (ret < 0) { | |
1016 | dev_err(mfd->dev, | |
1017 | "Error in configuring external control EN2\n"); | |
1018 | return ret; | |
1019 | } | |
1020 | ||
1021 | /* External EN3 control for TPS65910 LDO only */ | |
1022 | if ((tps65910_chip_id(mfd) == TPS65910) && | |
1023 | (id >= TPS65910_REG_VDIG1)) { | |
1024 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) | |
1025 | ret = tps65910_set_bits(mfd, | |
1026 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); | |
1027 | else | |
1028 | ret = tps65910_clear_bits(mfd, | |
1029 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); | |
1030 | if (ret < 0) { | |
1031 | dev_err(mfd->dev, | |
1032 | "Error in configuring external control EN3\n"); | |
1033 | return ret; | |
1034 | } | |
1035 | } | |
1036 | ||
1037 | /* Return if no external control is selected */ | |
1038 | if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { | |
1039 | /* Clear all sleep controls */ | |
1040 | ret = tps65910_clear_bits(mfd, | |
1041 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); | |
1042 | if (!ret) | |
1043 | ret = tps65910_clear_bits(mfd, | |
1044 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); | |
1045 | if (ret < 0) | |
1046 | dev_err(mfd->dev, | |
1047 | "Error in configuring SLEEP register\n"); | |
1048 | return ret; | |
1049 | } | |
1050 | ||
1051 | /* | |
1052 | * For regulator that has separate operational and sleep register make | |
1053 | * sure that operational is used and clear sleep register to turn | |
1054 | * regulator off when external control is inactive | |
1055 | */ | |
1056 | if ((id == TPS65910_REG_VDD1) || | |
1057 | (id == TPS65910_REG_VDD2) || | |
1058 | ((id == TPS65911_REG_VDDCTRL) && | |
1059 | (tps65910_chip_id(mfd) == TPS65911))) { | |
1060 | int op_reg_add = pmic->get_ctrl_reg(id) + 1; | |
1061 | int sr_reg_add = pmic->get_ctrl_reg(id) + 2; | |
1062 | int opvsel = tps65910_reg_read(pmic, op_reg_add); | |
1063 | int srvsel = tps65910_reg_read(pmic, sr_reg_add); | |
1064 | if (opvsel & VDD1_OP_CMD_MASK) { | |
1065 | u8 reg_val = srvsel & VDD1_OP_SEL_MASK; | |
1066 | ret = tps65910_reg_write(pmic, op_reg_add, reg_val); | |
1067 | if (ret < 0) { | |
1068 | dev_err(mfd->dev, | |
1069 | "Error in configuring op register\n"); | |
1070 | return ret; | |
1071 | } | |
1072 | } | |
1073 | ret = tps65910_reg_write(pmic, sr_reg_add, 0); | |
1074 | if (ret < 0) { | |
1075 | dev_err(mfd->dev, "Error in settting sr register\n"); | |
1076 | return ret; | |
1077 | } | |
1078 | } | |
1079 | ||
1080 | ret = tps65910_clear_bits(mfd, | |
1081 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); | |
f30b0716 LD |
1082 | if (!ret) { |
1083 | if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) | |
1084 | ret = tps65910_set_bits(mfd, | |
1085 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); | |
1086 | else | |
1087 | ret = tps65910_clear_bits(mfd, | |
1088 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); | |
1089 | } | |
1e0c66f4 LD |
1090 | if (ret < 0) |
1091 | dev_err(mfd->dev, | |
1092 | "Error in configuring SLEEP register\n"); | |
f30b0716 | 1093 | |
1e0c66f4 LD |
1094 | return ret; |
1095 | } | |
1096 | ||
518fb721 GG |
1097 | static __devinit int tps65910_probe(struct platform_device *pdev) |
1098 | { | |
1099 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); | |
c172708d | 1100 | struct regulator_config config = { }; |
a320e3c3 | 1101 | struct tps_info *info; |
518fb721 GG |
1102 | struct regulator_init_data *reg_data; |
1103 | struct regulator_dev *rdev; | |
1104 | struct tps65910_reg *pmic; | |
1105 | struct tps65910_board *pmic_plat_data; | |
518fb721 GG |
1106 | int i, err; |
1107 | ||
1108 | pmic_plat_data = dev_get_platdata(tps65910->dev); | |
1109 | if (!pmic_plat_data) | |
1110 | return -EINVAL; | |
1111 | ||
518fb721 GG |
1112 | pmic = kzalloc(sizeof(*pmic), GFP_KERNEL); |
1113 | if (!pmic) | |
1114 | return -ENOMEM; | |
1115 | ||
1116 | mutex_init(&pmic->mutex); | |
1117 | pmic->mfd = tps65910; | |
1118 | platform_set_drvdata(pdev, pmic); | |
1119 | ||
1120 | /* Give control of all register to control port */ | |
1121 | tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL, | |
1122 | DEVCTRL_SR_CTL_I2C_SEL_MASK); | |
1123 | ||
a320e3c3 JEC |
1124 | switch(tps65910_chip_id(tps65910)) { |
1125 | case TPS65910: | |
1126 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; | |
39aa9b6e | 1127 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
1e0c66f4 | 1128 | pmic->ext_sleep_control = tps65910_ext_sleep_control; |
a320e3c3 | 1129 | info = tps65910_regs; |
d04156bc | 1130 | break; |
a320e3c3 JEC |
1131 | case TPS65911: |
1132 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; | |
39aa9b6e | 1133 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
1e0c66f4 | 1134 | pmic->ext_sleep_control = tps65911_ext_sleep_control; |
a320e3c3 | 1135 | info = tps65911_regs; |
d04156bc | 1136 | break; |
a320e3c3 JEC |
1137 | default: |
1138 | pr_err("Invalid tps chip version\n"); | |
a3ee13ee | 1139 | kfree(pmic); |
a320e3c3 JEC |
1140 | return -ENODEV; |
1141 | } | |
1142 | ||
39aa9b6e AL |
1143 | pmic->desc = kcalloc(pmic->num_regulators, |
1144 | sizeof(struct regulator_desc), GFP_KERNEL); | |
1145 | if (!pmic->desc) { | |
1146 | err = -ENOMEM; | |
1147 | goto err_free_pmic; | |
1148 | } | |
1149 | ||
1150 | pmic->info = kcalloc(pmic->num_regulators, | |
1151 | sizeof(struct tps_info *), GFP_KERNEL); | |
1152 | if (!pmic->info) { | |
1153 | err = -ENOMEM; | |
1154 | goto err_free_desc; | |
1155 | } | |
1156 | ||
1157 | pmic->rdev = kcalloc(pmic->num_regulators, | |
1158 | sizeof(struct regulator_dev *), GFP_KERNEL); | |
1159 | if (!pmic->rdev) { | |
1160 | err = -ENOMEM; | |
1161 | goto err_free_info; | |
1162 | } | |
1163 | ||
c1fc1480 KM |
1164 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
1165 | i++, info++) { | |
1166 | ||
1167 | reg_data = pmic_plat_data->tps65910_pmic_init_data[i]; | |
1168 | ||
1169 | /* Regulator API handles empty constraints but not NULL | |
1170 | * constraints */ | |
1171 | if (!reg_data) | |
1172 | continue; | |
1173 | ||
518fb721 GG |
1174 | /* Register the regulators */ |
1175 | pmic->info[i] = info; | |
1176 | ||
1177 | pmic->desc[i].name = info->name; | |
77fa44d0 | 1178 | pmic->desc[i].id = i; |
7d38a3cb | 1179 | pmic->desc[i].n_voltages = info->n_voltages; |
518fb721 | 1180 | |
a320e3c3 | 1181 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
518fb721 | 1182 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
780dc9ba AM |
1183 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
1184 | VDD1_2_NUM_VOLT_COARSE; | |
a320e3c3 JEC |
1185 | } else if (i == TPS65910_REG_VDD3) { |
1186 | if (tps65910_chip_id(tps65910) == TPS65910) | |
1187 | pmic->desc[i].ops = &tps65910_ops_vdd3; | |
1188 | else | |
1189 | pmic->desc[i].ops = &tps65910_ops_dcdc; | |
1190 | } else { | |
1191 | if (tps65910_chip_id(tps65910) == TPS65910) | |
1192 | pmic->desc[i].ops = &tps65910_ops; | |
1193 | else | |
1194 | pmic->desc[i].ops = &tps65911_ops; | |
1195 | } | |
518fb721 | 1196 | |
1e0c66f4 LD |
1197 | err = tps65910_set_ext_sleep_config(pmic, i, |
1198 | pmic_plat_data->regulator_ext_sleep_control[i]); | |
1199 | /* | |
1200 | * Failing on regulator for configuring externally control | |
1201 | * is not a serious issue, just throw warning. | |
1202 | */ | |
1203 | if (err < 0) | |
1204 | dev_warn(tps65910->dev, | |
1205 | "Failed to initialise ext control config\n"); | |
1206 | ||
518fb721 GG |
1207 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
1208 | pmic->desc[i].owner = THIS_MODULE; | |
1209 | ||
c172708d MB |
1210 | config.dev = tps65910->dev; |
1211 | config.init_data = reg_data; | |
1212 | config.driver_data = pmic; | |
1213 | ||
1214 | rdev = regulator_register(&pmic->desc[i], &config); | |
518fb721 GG |
1215 | if (IS_ERR(rdev)) { |
1216 | dev_err(tps65910->dev, | |
1217 | "failed to register %s regulator\n", | |
1218 | pdev->name); | |
1219 | err = PTR_ERR(rdev); | |
39aa9b6e | 1220 | goto err_unregister_regulator; |
518fb721 GG |
1221 | } |
1222 | ||
1223 | /* Save regulator for cleanup */ | |
1224 | pmic->rdev[i] = rdev; | |
1225 | } | |
1226 | return 0; | |
1227 | ||
39aa9b6e | 1228 | err_unregister_regulator: |
518fb721 GG |
1229 | while (--i >= 0) |
1230 | regulator_unregister(pmic->rdev[i]); | |
39aa9b6e AL |
1231 | kfree(pmic->rdev); |
1232 | err_free_info: | |
1233 | kfree(pmic->info); | |
1234 | err_free_desc: | |
1235 | kfree(pmic->desc); | |
1236 | err_free_pmic: | |
518fb721 GG |
1237 | kfree(pmic); |
1238 | return err; | |
1239 | } | |
1240 | ||
1241 | static int __devexit tps65910_remove(struct platform_device *pdev) | |
1242 | { | |
39aa9b6e | 1243 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
518fb721 GG |
1244 | int i; |
1245 | ||
39aa9b6e AL |
1246 | for (i = 0; i < pmic->num_regulators; i++) |
1247 | regulator_unregister(pmic->rdev[i]); | |
518fb721 | 1248 | |
39aa9b6e AL |
1249 | kfree(pmic->rdev); |
1250 | kfree(pmic->info); | |
1251 | kfree(pmic->desc); | |
1252 | kfree(pmic); | |
518fb721 GG |
1253 | return 0; |
1254 | } | |
1255 | ||
1e0c66f4 LD |
1256 | static void tps65910_shutdown(struct platform_device *pdev) |
1257 | { | |
1258 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); | |
1259 | int i; | |
1260 | ||
1261 | /* | |
1262 | * Before bootloader jumps to kernel, it makes sure that required | |
1263 | * external control signals are in desired state so that given rails | |
1264 | * can be configure accordingly. | |
1265 | * If rails are configured to be controlled from external control | |
1266 | * then before shutting down/rebooting the system, the external | |
1267 | * control configuration need to be remove from the rails so that | |
1268 | * its output will be available as per register programming even | |
1269 | * if external controls are removed. This is require when the POR | |
1270 | * value of the control signals are not in active state and before | |
1271 | * bootloader initializes it, the system requires the rail output | |
1272 | * to be active for booting. | |
1273 | */ | |
1274 | for (i = 0; i < pmic->num_regulators; i++) { | |
1275 | int err; | |
1276 | if (!pmic->rdev[i]) | |
1277 | continue; | |
1278 | ||
1279 | err = tps65910_set_ext_sleep_config(pmic, i, 0); | |
1280 | if (err < 0) | |
1281 | dev_err(&pdev->dev, | |
1282 | "Error in clearing external control\n"); | |
1283 | } | |
1284 | } | |
1285 | ||
518fb721 GG |
1286 | static struct platform_driver tps65910_driver = { |
1287 | .driver = { | |
1288 | .name = "tps65910-pmic", | |
1289 | .owner = THIS_MODULE, | |
1290 | }, | |
1291 | .probe = tps65910_probe, | |
1292 | .remove = __devexit_p(tps65910_remove), | |
1e0c66f4 | 1293 | .shutdown = tps65910_shutdown, |
518fb721 GG |
1294 | }; |
1295 | ||
1296 | static int __init tps65910_init(void) | |
1297 | { | |
1298 | return platform_driver_register(&tps65910_driver); | |
1299 | } | |
1300 | subsys_initcall(tps65910_init); | |
1301 | ||
1302 | static void __exit tps65910_cleanup(void) | |
1303 | { | |
1304 | platform_driver_unregister(&tps65910_driver); | |
1305 | } | |
1306 | module_exit(tps65910_cleanup); | |
1307 | ||
1308 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); | |
ae0e6544 | 1309 | MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); |
518fb721 GG |
1310 | MODULE_LICENSE("GPL v2"); |
1311 | MODULE_ALIAS("platform:tps65910-pmic"); |