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518fb721 GG |
1 | /* |
2 | * tps65910.c -- TI tps65910 | |
3 | * | |
4 | * Copyright 2010 Texas Instruments Inc. | |
5 | * | |
6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> | |
7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/gpio.h> | |
26 | #include <linux/mfd/tps65910.h> | |
27 | ||
518fb721 GG |
28 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
29 | ||
30 | /* supported VIO voltages in milivolts */ | |
31 | static const u16 VIO_VSEL_table[] = { | |
32 | 1500, 1800, 2500, 3300, | |
33 | }; | |
34 | ||
a320e3c3 JEC |
35 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
36 | ||
37 | /* supported VDD3 voltages in milivolts */ | |
518fb721 GG |
38 | static const u16 VDD3_VSEL_table[] = { |
39 | 5000, | |
40 | }; | |
41 | ||
42 | /* supported VDIG1 voltages in milivolts */ | |
43 | static const u16 VDIG1_VSEL_table[] = { | |
44 | 1200, 1500, 1800, 2700, | |
45 | }; | |
46 | ||
47 | /* supported VDIG2 voltages in milivolts */ | |
48 | static const u16 VDIG2_VSEL_table[] = { | |
49 | 1000, 1100, 1200, 1800, | |
50 | }; | |
51 | ||
52 | /* supported VPLL voltages in milivolts */ | |
53 | static const u16 VPLL_VSEL_table[] = { | |
54 | 1000, 1100, 1800, 2500, | |
55 | }; | |
56 | ||
57 | /* supported VDAC voltages in milivolts */ | |
58 | static const u16 VDAC_VSEL_table[] = { | |
59 | 1800, 2600, 2800, 2850, | |
60 | }; | |
61 | ||
62 | /* supported VAUX1 voltages in milivolts */ | |
63 | static const u16 VAUX1_VSEL_table[] = { | |
64 | 1800, 2500, 2800, 2850, | |
65 | }; | |
66 | ||
67 | /* supported VAUX2 voltages in milivolts */ | |
68 | static const u16 VAUX2_VSEL_table[] = { | |
69 | 1800, 2800, 2900, 3300, | |
70 | }; | |
71 | ||
72 | /* supported VAUX33 voltages in milivolts */ | |
73 | static const u16 VAUX33_VSEL_table[] = { | |
74 | 1800, 2000, 2800, 3300, | |
75 | }; | |
76 | ||
77 | /* supported VMMC voltages in milivolts */ | |
78 | static const u16 VMMC_VSEL_table[] = { | |
79 | 1800, 2800, 3000, 3300, | |
80 | }; | |
81 | ||
82 | struct tps_info { | |
83 | const char *name; | |
84 | unsigned min_uV; | |
85 | unsigned max_uV; | |
7d38a3cb LD |
86 | u8 n_voltages; |
87 | const u16 *voltage_table; | |
518fb721 GG |
88 | }; |
89 | ||
90 | static struct tps_info tps65910_regs[] = { | |
91 | { | |
92 | .name = "VRTC", | |
93 | }, | |
94 | { | |
95 | .name = "VIO", | |
96 | .min_uV = 1500000, | |
97 | .max_uV = 3300000, | |
7d38a3cb LD |
98 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
99 | .voltage_table = VIO_VSEL_table, | |
518fb721 GG |
100 | }, |
101 | { | |
102 | .name = "VDD1", | |
103 | .min_uV = 600000, | |
104 | .max_uV = 4500000, | |
105 | }, | |
106 | { | |
107 | .name = "VDD2", | |
108 | .min_uV = 600000, | |
109 | .max_uV = 4500000, | |
110 | }, | |
111 | { | |
112 | .name = "VDD3", | |
113 | .min_uV = 5000000, | |
114 | .max_uV = 5000000, | |
7d38a3cb LD |
115 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
116 | .voltage_table = VDD3_VSEL_table, | |
518fb721 GG |
117 | }, |
118 | { | |
119 | .name = "VDIG1", | |
120 | .min_uV = 1200000, | |
121 | .max_uV = 2700000, | |
7d38a3cb LD |
122 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
123 | .voltage_table = VDIG1_VSEL_table, | |
518fb721 GG |
124 | }, |
125 | { | |
126 | .name = "VDIG2", | |
127 | .min_uV = 1000000, | |
128 | .max_uV = 1800000, | |
7d38a3cb LD |
129 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
130 | .voltage_table = VDIG2_VSEL_table, | |
518fb721 GG |
131 | }, |
132 | { | |
133 | .name = "VPLL", | |
134 | .min_uV = 1000000, | |
135 | .max_uV = 2500000, | |
7d38a3cb LD |
136 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
137 | .voltage_table = VPLL_VSEL_table, | |
518fb721 GG |
138 | }, |
139 | { | |
140 | .name = "VDAC", | |
141 | .min_uV = 1800000, | |
142 | .max_uV = 2850000, | |
7d38a3cb LD |
143 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
144 | .voltage_table = VDAC_VSEL_table, | |
518fb721 GG |
145 | }, |
146 | { | |
147 | .name = "VAUX1", | |
148 | .min_uV = 1800000, | |
149 | .max_uV = 2850000, | |
7d38a3cb LD |
150 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
151 | .voltage_table = VAUX1_VSEL_table, | |
518fb721 GG |
152 | }, |
153 | { | |
154 | .name = "VAUX2", | |
155 | .min_uV = 1800000, | |
156 | .max_uV = 3300000, | |
7d38a3cb LD |
157 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
158 | .voltage_table = VAUX2_VSEL_table, | |
518fb721 GG |
159 | }, |
160 | { | |
161 | .name = "VAUX33", | |
162 | .min_uV = 1800000, | |
163 | .max_uV = 3300000, | |
7d38a3cb LD |
164 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
165 | .voltage_table = VAUX33_VSEL_table, | |
518fb721 GG |
166 | }, |
167 | { | |
168 | .name = "VMMC", | |
169 | .min_uV = 1800000, | |
170 | .max_uV = 3300000, | |
7d38a3cb LD |
171 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
172 | .voltage_table = VMMC_VSEL_table, | |
518fb721 GG |
173 | }, |
174 | }; | |
175 | ||
a320e3c3 | 176 | static struct tps_info tps65911_regs[] = { |
c2f8efd7 LD |
177 | { |
178 | .name = "VRTC", | |
179 | }, | |
a320e3c3 JEC |
180 | { |
181 | .name = "VIO", | |
182 | .min_uV = 1500000, | |
183 | .max_uV = 3300000, | |
7d38a3cb LD |
184 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
185 | .voltage_table = VIO_VSEL_table, | |
a320e3c3 JEC |
186 | }, |
187 | { | |
188 | .name = "VDD1", | |
189 | .min_uV = 600000, | |
190 | .max_uV = 4500000, | |
7d38a3cb | 191 | .n_voltages = 73, |
a320e3c3 JEC |
192 | }, |
193 | { | |
194 | .name = "VDD2", | |
195 | .min_uV = 600000, | |
196 | .max_uV = 4500000, | |
7d38a3cb | 197 | .n_voltages = 73, |
a320e3c3 JEC |
198 | }, |
199 | { | |
200 | .name = "VDDCTRL", | |
201 | .min_uV = 600000, | |
202 | .max_uV = 1400000, | |
7d38a3cb | 203 | .n_voltages = 65, |
a320e3c3 JEC |
204 | }, |
205 | { | |
206 | .name = "LDO1", | |
207 | .min_uV = 1000000, | |
208 | .max_uV = 3300000, | |
7d38a3cb | 209 | .n_voltages = 47, |
a320e3c3 JEC |
210 | }, |
211 | { | |
212 | .name = "LDO2", | |
213 | .min_uV = 1000000, | |
214 | .max_uV = 3300000, | |
7d38a3cb | 215 | .n_voltages = 47, |
a320e3c3 JEC |
216 | }, |
217 | { | |
218 | .name = "LDO3", | |
219 | .min_uV = 1000000, | |
220 | .max_uV = 3300000, | |
7d38a3cb | 221 | .n_voltages = 24, |
a320e3c3 JEC |
222 | }, |
223 | { | |
224 | .name = "LDO4", | |
225 | .min_uV = 1000000, | |
226 | .max_uV = 3300000, | |
7d38a3cb | 227 | .n_voltages = 47, |
a320e3c3 JEC |
228 | }, |
229 | { | |
230 | .name = "LDO5", | |
231 | .min_uV = 1000000, | |
232 | .max_uV = 3300000, | |
7d38a3cb | 233 | .n_voltages = 24, |
a320e3c3 JEC |
234 | }, |
235 | { | |
236 | .name = "LDO6", | |
237 | .min_uV = 1000000, | |
238 | .max_uV = 3300000, | |
7d38a3cb | 239 | .n_voltages = 24, |
a320e3c3 JEC |
240 | }, |
241 | { | |
242 | .name = "LDO7", | |
243 | .min_uV = 1000000, | |
244 | .max_uV = 3300000, | |
7d38a3cb | 245 | .n_voltages = 24, |
a320e3c3 JEC |
246 | }, |
247 | { | |
248 | .name = "LDO8", | |
249 | .min_uV = 1000000, | |
250 | .max_uV = 3300000, | |
7d38a3cb | 251 | .n_voltages = 24, |
a320e3c3 JEC |
252 | }, |
253 | }; | |
254 | ||
518fb721 | 255 | struct tps65910_reg { |
39aa9b6e | 256 | struct regulator_desc *desc; |
518fb721 | 257 | struct tps65910 *mfd; |
39aa9b6e AL |
258 | struct regulator_dev **rdev; |
259 | struct tps_info **info; | |
518fb721 | 260 | struct mutex mutex; |
39aa9b6e | 261 | int num_regulators; |
518fb721 | 262 | int mode; |
a320e3c3 | 263 | int (*get_ctrl_reg)(int); |
518fb721 GG |
264 | }; |
265 | ||
266 | static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) | |
267 | { | |
268 | u8 val; | |
269 | int err; | |
270 | ||
271 | err = pmic->mfd->read(pmic->mfd, reg, 1, &val); | |
272 | if (err) | |
273 | return err; | |
274 | ||
275 | return val; | |
276 | } | |
277 | ||
278 | static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val) | |
279 | { | |
280 | return pmic->mfd->write(pmic->mfd, reg, 1, &val); | |
281 | } | |
282 | ||
283 | static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, | |
284 | u8 set_mask, u8 clear_mask) | |
285 | { | |
286 | int err, data; | |
287 | ||
288 | mutex_lock(&pmic->mutex); | |
289 | ||
290 | data = tps65910_read(pmic, reg); | |
291 | if (data < 0) { | |
292 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); | |
293 | err = data; | |
294 | goto out; | |
295 | } | |
296 | ||
297 | data &= ~clear_mask; | |
298 | data |= set_mask; | |
299 | err = tps65910_write(pmic, reg, data); | |
300 | if (err) | |
301 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); | |
302 | ||
303 | out: | |
304 | mutex_unlock(&pmic->mutex); | |
305 | return err; | |
306 | } | |
307 | ||
308 | static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) | |
309 | { | |
310 | int data; | |
311 | ||
312 | mutex_lock(&pmic->mutex); | |
313 | ||
314 | data = tps65910_read(pmic, reg); | |
315 | if (data < 0) | |
316 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); | |
317 | ||
318 | mutex_unlock(&pmic->mutex); | |
319 | return data; | |
320 | } | |
321 | ||
322 | static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val) | |
323 | { | |
324 | int err; | |
325 | ||
326 | mutex_lock(&pmic->mutex); | |
327 | ||
328 | err = tps65910_write(pmic, reg, val); | |
329 | if (err < 0) | |
330 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); | |
331 | ||
332 | mutex_unlock(&pmic->mutex); | |
333 | return err; | |
334 | } | |
335 | ||
336 | static int tps65910_get_ctrl_register(int id) | |
337 | { | |
338 | switch (id) { | |
339 | case TPS65910_REG_VRTC: | |
340 | return TPS65910_VRTC; | |
341 | case TPS65910_REG_VIO: | |
342 | return TPS65910_VIO; | |
343 | case TPS65910_REG_VDD1: | |
344 | return TPS65910_VDD1; | |
345 | case TPS65910_REG_VDD2: | |
346 | return TPS65910_VDD2; | |
347 | case TPS65910_REG_VDD3: | |
348 | return TPS65910_VDD3; | |
349 | case TPS65910_REG_VDIG1: | |
350 | return TPS65910_VDIG1; | |
351 | case TPS65910_REG_VDIG2: | |
352 | return TPS65910_VDIG2; | |
353 | case TPS65910_REG_VPLL: | |
354 | return TPS65910_VPLL; | |
355 | case TPS65910_REG_VDAC: | |
356 | return TPS65910_VDAC; | |
357 | case TPS65910_REG_VAUX1: | |
358 | return TPS65910_VAUX1; | |
359 | case TPS65910_REG_VAUX2: | |
360 | return TPS65910_VAUX2; | |
361 | case TPS65910_REG_VAUX33: | |
362 | return TPS65910_VAUX33; | |
363 | case TPS65910_REG_VMMC: | |
364 | return TPS65910_VMMC; | |
365 | default: | |
366 | return -EINVAL; | |
367 | } | |
368 | } | |
369 | ||
a320e3c3 JEC |
370 | static int tps65911_get_ctrl_register(int id) |
371 | { | |
372 | switch (id) { | |
373 | case TPS65910_REG_VRTC: | |
374 | return TPS65910_VRTC; | |
375 | case TPS65910_REG_VIO: | |
376 | return TPS65910_VIO; | |
377 | case TPS65910_REG_VDD1: | |
378 | return TPS65910_VDD1; | |
379 | case TPS65910_REG_VDD2: | |
380 | return TPS65910_VDD2; | |
381 | case TPS65911_REG_VDDCTRL: | |
382 | return TPS65911_VDDCTRL; | |
383 | case TPS65911_REG_LDO1: | |
384 | return TPS65911_LDO1; | |
385 | case TPS65911_REG_LDO2: | |
386 | return TPS65911_LDO2; | |
387 | case TPS65911_REG_LDO3: | |
388 | return TPS65911_LDO3; | |
389 | case TPS65911_REG_LDO4: | |
390 | return TPS65911_LDO4; | |
391 | case TPS65911_REG_LDO5: | |
392 | return TPS65911_LDO5; | |
393 | case TPS65911_REG_LDO6: | |
394 | return TPS65911_LDO6; | |
395 | case TPS65911_REG_LDO7: | |
396 | return TPS65911_LDO7; | |
397 | case TPS65911_REG_LDO8: | |
398 | return TPS65911_LDO8; | |
399 | default: | |
400 | return -EINVAL; | |
401 | } | |
402 | } | |
403 | ||
518fb721 GG |
404 | static int tps65910_is_enabled(struct regulator_dev *dev) |
405 | { | |
406 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
407 | int reg, value, id = rdev_get_id(dev); | |
408 | ||
a320e3c3 | 409 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
410 | if (reg < 0) |
411 | return reg; | |
412 | ||
413 | value = tps65910_reg_read(pmic, reg); | |
414 | if (value < 0) | |
415 | return value; | |
416 | ||
417 | return value & TPS65910_SUPPLY_STATE_ENABLED; | |
418 | } | |
419 | ||
420 | static int tps65910_enable(struct regulator_dev *dev) | |
421 | { | |
422 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
423 | struct tps65910 *mfd = pmic->mfd; | |
424 | int reg, id = rdev_get_id(dev); | |
425 | ||
a320e3c3 | 426 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
427 | if (reg < 0) |
428 | return reg; | |
429 | ||
430 | return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); | |
431 | } | |
432 | ||
433 | static int tps65910_disable(struct regulator_dev *dev) | |
434 | { | |
435 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
436 | struct tps65910 *mfd = pmic->mfd; | |
437 | int reg, id = rdev_get_id(dev); | |
438 | ||
a320e3c3 | 439 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
440 | if (reg < 0) |
441 | return reg; | |
442 | ||
443 | return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); | |
444 | } | |
445 | ||
446 | ||
447 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) | |
448 | { | |
449 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
450 | struct tps65910 *mfd = pmic->mfd; | |
451 | int reg, value, id = rdev_get_id(dev); | |
a320e3c3 JEC |
452 | |
453 | reg = pmic->get_ctrl_reg(id); | |
518fb721 GG |
454 | if (reg < 0) |
455 | return reg; | |
456 | ||
457 | switch (mode) { | |
458 | case REGULATOR_MODE_NORMAL: | |
459 | return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT, | |
460 | LDO_ST_MODE_BIT); | |
461 | case REGULATOR_MODE_IDLE: | |
462 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; | |
463 | return tps65910_set_bits(mfd, reg, value); | |
464 | case REGULATOR_MODE_STANDBY: | |
465 | return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT); | |
466 | } | |
467 | ||
468 | return -EINVAL; | |
469 | } | |
470 | ||
471 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) | |
472 | { | |
473 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
474 | int reg, value, id = rdev_get_id(dev); | |
475 | ||
a320e3c3 | 476 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
477 | if (reg < 0) |
478 | return reg; | |
479 | ||
480 | value = tps65910_reg_read(pmic, reg); | |
481 | if (value < 0) | |
482 | return value; | |
483 | ||
484 | if (value & LDO_ST_ON_BIT) | |
485 | return REGULATOR_MODE_STANDBY; | |
486 | else if (value & LDO_ST_MODE_BIT) | |
487 | return REGULATOR_MODE_IDLE; | |
488 | else | |
489 | return REGULATOR_MODE_NORMAL; | |
490 | } | |
491 | ||
492 | static int tps65910_get_voltage_dcdc(struct regulator_dev *dev) | |
493 | { | |
494 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
495 | int id = rdev_get_id(dev), voltage = 0; | |
a320e3c3 | 496 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
518fb721 GG |
497 | |
498 | switch (id) { | |
499 | case TPS65910_REG_VDD1: | |
500 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP); | |
501 | mult = tps65910_reg_read(pmic, TPS65910_VDD1); | |
502 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; | |
503 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR); | |
504 | sr = opvsel & VDD1_OP_CMD_MASK; | |
505 | opvsel &= VDD1_OP_SEL_MASK; | |
506 | srvsel &= VDD1_SR_SEL_MASK; | |
a320e3c3 | 507 | vselmax = 75; |
518fb721 GG |
508 | break; |
509 | case TPS65910_REG_VDD2: | |
510 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP); | |
511 | mult = tps65910_reg_read(pmic, TPS65910_VDD2); | |
512 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; | |
513 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR); | |
514 | sr = opvsel & VDD2_OP_CMD_MASK; | |
515 | opvsel &= VDD2_OP_SEL_MASK; | |
516 | srvsel &= VDD2_SR_SEL_MASK; | |
a320e3c3 JEC |
517 | vselmax = 75; |
518 | break; | |
519 | case TPS65911_REG_VDDCTRL: | |
520 | opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP); | |
521 | srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR); | |
522 | sr = opvsel & VDDCTRL_OP_CMD_MASK; | |
523 | opvsel &= VDDCTRL_OP_SEL_MASK; | |
524 | srvsel &= VDDCTRL_SR_SEL_MASK; | |
525 | vselmax = 64; | |
518fb721 GG |
526 | break; |
527 | } | |
528 | ||
529 | /* multiplier 0 == 1 but 2,3 normal */ | |
530 | if (!mult) | |
531 | mult=1; | |
532 | ||
533 | if (sr) { | |
a320e3c3 JEC |
534 | /* normalise to valid range */ |
535 | if (srvsel < 3) | |
536 | srvsel = 3; | |
537 | if (srvsel > vselmax) | |
538 | srvsel = vselmax; | |
518fb721 GG |
539 | srvsel -= 3; |
540 | ||
541 | voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100; | |
542 | } else { | |
543 | ||
a320e3c3 JEC |
544 | /* normalise to valid range*/ |
545 | if (opvsel < 3) | |
546 | opvsel = 3; | |
547 | if (opvsel > vselmax) | |
548 | opvsel = vselmax; | |
518fb721 GG |
549 | opvsel -= 3; |
550 | ||
551 | voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100; | |
552 | } | |
553 | ||
554 | voltage *= mult; | |
555 | ||
556 | return voltage; | |
557 | } | |
558 | ||
559 | static int tps65910_get_voltage(struct regulator_dev *dev) | |
560 | { | |
561 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
562 | int reg, value, id = rdev_get_id(dev), voltage = 0; | |
563 | ||
a320e3c3 | 564 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
565 | if (reg < 0) |
566 | return reg; | |
567 | ||
568 | value = tps65910_reg_read(pmic, reg); | |
569 | if (value < 0) | |
570 | return value; | |
571 | ||
572 | switch (id) { | |
573 | case TPS65910_REG_VIO: | |
574 | case TPS65910_REG_VDIG1: | |
575 | case TPS65910_REG_VDIG2: | |
576 | case TPS65910_REG_VPLL: | |
577 | case TPS65910_REG_VDAC: | |
578 | case TPS65910_REG_VAUX1: | |
579 | case TPS65910_REG_VAUX2: | |
580 | case TPS65910_REG_VAUX33: | |
581 | case TPS65910_REG_VMMC: | |
582 | value &= LDO_SEL_MASK; | |
583 | value >>= LDO_SEL_SHIFT; | |
584 | break; | |
585 | default: | |
586 | return -EINVAL; | |
587 | } | |
588 | ||
7d38a3cb | 589 | voltage = pmic->info[id]->voltage_table[value] * 1000; |
518fb721 GG |
590 | |
591 | return voltage; | |
592 | } | |
593 | ||
594 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) | |
595 | { | |
596 | return 5 * 1000 * 1000; | |
597 | } | |
598 | ||
a320e3c3 JEC |
599 | static int tps65911_get_voltage(struct regulator_dev *dev) |
600 | { | |
601 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
602 | int step_mv, id = rdev_get_id(dev); | |
603 | u8 value, reg; | |
604 | ||
605 | reg = pmic->get_ctrl_reg(id); | |
606 | ||
607 | value = tps65910_reg_read(pmic, reg); | |
608 | ||
609 | switch (id) { | |
610 | case TPS65911_REG_LDO1: | |
611 | case TPS65911_REG_LDO2: | |
612 | case TPS65911_REG_LDO4: | |
613 | value &= LDO1_SEL_MASK; | |
614 | value >>= LDO_SEL_SHIFT; | |
615 | /* The first 5 values of the selector correspond to 1V */ | |
616 | if (value < 5) | |
617 | value = 0; | |
618 | else | |
619 | value -= 4; | |
620 | ||
621 | step_mv = 50; | |
622 | break; | |
623 | case TPS65911_REG_LDO3: | |
624 | case TPS65911_REG_LDO5: | |
625 | case TPS65911_REG_LDO6: | |
626 | case TPS65911_REG_LDO7: | |
627 | case TPS65911_REG_LDO8: | |
628 | value &= LDO3_SEL_MASK; | |
629 | value >>= LDO_SEL_SHIFT; | |
630 | /* The first 3 values of the selector correspond to 1V */ | |
631 | if (value < 3) | |
632 | value = 0; | |
633 | else | |
634 | value -= 2; | |
635 | ||
636 | step_mv = 100; | |
637 | break; | |
638 | case TPS65910_REG_VIO: | |
7d38a3cb | 639 | return pmic->info[id]->voltage_table[value] * 1000; |
a320e3c3 JEC |
640 | break; |
641 | default: | |
642 | return -EINVAL; | |
643 | } | |
644 | ||
645 | return (LDO_MIN_VOLT + value * step_mv) * 1000; | |
646 | } | |
647 | ||
518fb721 GG |
648 | static int tps65910_set_voltage_dcdc(struct regulator_dev *dev, |
649 | unsigned selector) | |
650 | { | |
651 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
652 | int id = rdev_get_id(dev), vsel; | |
a320e3c3 | 653 | int dcdc_mult = 0; |
518fb721 | 654 | |
a320e3c3 JEC |
655 | switch (id) { |
656 | case TPS65910_REG_VDD1: | |
780dc9ba | 657 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 JEC |
658 | if (dcdc_mult == 1) |
659 | dcdc_mult--; | |
780dc9ba | 660 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
518fb721 | 661 | |
518fb721 GG |
662 | tps65910_modify_bits(pmic, TPS65910_VDD1, |
663 | (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), | |
664 | VDD1_VGAIN_SEL_MASK); | |
665 | tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel); | |
a320e3c3 JEC |
666 | break; |
667 | case TPS65910_REG_VDD2: | |
780dc9ba | 668 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 JEC |
669 | if (dcdc_mult == 1) |
670 | dcdc_mult--; | |
780dc9ba | 671 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
a320e3c3 | 672 | |
518fb721 GG |
673 | tps65910_modify_bits(pmic, TPS65910_VDD2, |
674 | (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), | |
675 | VDD1_VGAIN_SEL_MASK); | |
676 | tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel); | |
a320e3c3 JEC |
677 | break; |
678 | case TPS65911_REG_VDDCTRL: | |
679 | vsel = selector; | |
680 | tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel); | |
518fb721 GG |
681 | } |
682 | ||
683 | return 0; | |
684 | } | |
685 | ||
686 | static int tps65910_set_voltage(struct regulator_dev *dev, unsigned selector) | |
687 | { | |
688 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
689 | int reg, id = rdev_get_id(dev); | |
690 | ||
a320e3c3 | 691 | reg = pmic->get_ctrl_reg(id); |
518fb721 GG |
692 | if (reg < 0) |
693 | return reg; | |
694 | ||
695 | switch (id) { | |
696 | case TPS65910_REG_VIO: | |
697 | case TPS65910_REG_VDIG1: | |
698 | case TPS65910_REG_VDIG2: | |
699 | case TPS65910_REG_VPLL: | |
700 | case TPS65910_REG_VDAC: | |
701 | case TPS65910_REG_VAUX1: | |
702 | case TPS65910_REG_VAUX2: | |
703 | case TPS65910_REG_VAUX33: | |
704 | case TPS65910_REG_VMMC: | |
705 | return tps65910_modify_bits(pmic, reg, | |
706 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); | |
707 | } | |
708 | ||
709 | return -EINVAL; | |
710 | } | |
711 | ||
a320e3c3 JEC |
712 | static int tps65911_set_voltage(struct regulator_dev *dev, unsigned selector) |
713 | { | |
714 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
715 | int reg, id = rdev_get_id(dev); | |
716 | ||
717 | reg = pmic->get_ctrl_reg(id); | |
718 | if (reg < 0) | |
719 | return reg; | |
720 | ||
721 | switch (id) { | |
722 | case TPS65911_REG_LDO1: | |
723 | case TPS65911_REG_LDO2: | |
724 | case TPS65911_REG_LDO4: | |
725 | return tps65910_modify_bits(pmic, reg, | |
726 | (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK); | |
727 | case TPS65911_REG_LDO3: | |
728 | case TPS65911_REG_LDO5: | |
729 | case TPS65911_REG_LDO6: | |
730 | case TPS65911_REG_LDO7: | |
731 | case TPS65911_REG_LDO8: | |
732 | case TPS65910_REG_VIO: | |
733 | return tps65910_modify_bits(pmic, reg, | |
734 | (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK); | |
735 | } | |
736 | ||
737 | return -EINVAL; | |
738 | } | |
739 | ||
740 | ||
518fb721 GG |
741 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
742 | unsigned selector) | |
743 | { | |
a320e3c3 | 744 | int volt, mult = 1, id = rdev_get_id(dev); |
518fb721 | 745 | |
a320e3c3 JEC |
746 | switch (id) { |
747 | case TPS65910_REG_VDD1: | |
748 | case TPS65910_REG_VDD2: | |
780dc9ba | 749 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
a320e3c3 | 750 | volt = VDD1_2_MIN_VOLT + |
780dc9ba | 751 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
d04156bc | 752 | break; |
a320e3c3 JEC |
753 | case TPS65911_REG_VDDCTRL: |
754 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); | |
d04156bc AL |
755 | break; |
756 | default: | |
757 | BUG(); | |
758 | return -EINVAL; | |
a320e3c3 | 759 | } |
518fb721 GG |
760 | |
761 | return volt * 100 * mult; | |
762 | } | |
763 | ||
764 | static int tps65910_list_voltage(struct regulator_dev *dev, | |
765 | unsigned selector) | |
766 | { | |
767 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
768 | int id = rdev_get_id(dev), voltage; | |
769 | ||
770 | if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC) | |
771 | return -EINVAL; | |
772 | ||
7d38a3cb | 773 | if (selector >= pmic->info[id]->n_voltages) |
518fb721 GG |
774 | return -EINVAL; |
775 | else | |
7d38a3cb | 776 | voltage = pmic->info[id]->voltage_table[selector] * 1000; |
518fb721 GG |
777 | |
778 | return voltage; | |
779 | } | |
780 | ||
a320e3c3 JEC |
781 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
782 | { | |
783 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); | |
784 | int step_mv = 0, id = rdev_get_id(dev); | |
785 | ||
786 | switch(id) { | |
787 | case TPS65911_REG_LDO1: | |
788 | case TPS65911_REG_LDO2: | |
789 | case TPS65911_REG_LDO4: | |
790 | /* The first 5 values of the selector correspond to 1V */ | |
791 | if (selector < 5) | |
792 | selector = 0; | |
793 | else | |
794 | selector -= 4; | |
795 | ||
796 | step_mv = 50; | |
797 | break; | |
798 | case TPS65911_REG_LDO3: | |
799 | case TPS65911_REG_LDO5: | |
800 | case TPS65911_REG_LDO6: | |
801 | case TPS65911_REG_LDO7: | |
802 | case TPS65911_REG_LDO8: | |
803 | /* The first 3 values of the selector correspond to 1V */ | |
804 | if (selector < 3) | |
805 | selector = 0; | |
806 | else | |
807 | selector -= 2; | |
808 | ||
809 | step_mv = 100; | |
810 | break; | |
811 | case TPS65910_REG_VIO: | |
7d38a3cb | 812 | return pmic->info[id]->voltage_table[selector] * 1000; |
a320e3c3 JEC |
813 | default: |
814 | return -EINVAL; | |
815 | } | |
816 | ||
817 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; | |
818 | } | |
819 | ||
518fb721 GG |
820 | /* Regulator ops (except VRTC) */ |
821 | static struct regulator_ops tps65910_ops_dcdc = { | |
822 | .is_enabled = tps65910_is_enabled, | |
823 | .enable = tps65910_enable, | |
824 | .disable = tps65910_disable, | |
825 | .set_mode = tps65910_set_mode, | |
826 | .get_mode = tps65910_get_mode, | |
827 | .get_voltage = tps65910_get_voltage_dcdc, | |
828 | .set_voltage_sel = tps65910_set_voltage_dcdc, | |
829 | .list_voltage = tps65910_list_voltage_dcdc, | |
830 | }; | |
831 | ||
832 | static struct regulator_ops tps65910_ops_vdd3 = { | |
833 | .is_enabled = tps65910_is_enabled, | |
834 | .enable = tps65910_enable, | |
835 | .disable = tps65910_disable, | |
836 | .set_mode = tps65910_set_mode, | |
837 | .get_mode = tps65910_get_mode, | |
838 | .get_voltage = tps65910_get_voltage_vdd3, | |
839 | .list_voltage = tps65910_list_voltage, | |
840 | }; | |
841 | ||
842 | static struct regulator_ops tps65910_ops = { | |
843 | .is_enabled = tps65910_is_enabled, | |
844 | .enable = tps65910_enable, | |
845 | .disable = tps65910_disable, | |
846 | .set_mode = tps65910_set_mode, | |
847 | .get_mode = tps65910_get_mode, | |
848 | .get_voltage = tps65910_get_voltage, | |
849 | .set_voltage_sel = tps65910_set_voltage, | |
850 | .list_voltage = tps65910_list_voltage, | |
851 | }; | |
852 | ||
a320e3c3 JEC |
853 | static struct regulator_ops tps65911_ops = { |
854 | .is_enabled = tps65910_is_enabled, | |
855 | .enable = tps65910_enable, | |
856 | .disable = tps65910_disable, | |
857 | .set_mode = tps65910_set_mode, | |
858 | .get_mode = tps65910_get_mode, | |
859 | .get_voltage = tps65911_get_voltage, | |
860 | .set_voltage_sel = tps65911_set_voltage, | |
861 | .list_voltage = tps65911_list_voltage, | |
862 | }; | |
863 | ||
518fb721 GG |
864 | static __devinit int tps65910_probe(struct platform_device *pdev) |
865 | { | |
866 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); | |
a320e3c3 | 867 | struct tps_info *info; |
518fb721 GG |
868 | struct regulator_init_data *reg_data; |
869 | struct regulator_dev *rdev; | |
870 | struct tps65910_reg *pmic; | |
871 | struct tps65910_board *pmic_plat_data; | |
518fb721 GG |
872 | int i, err; |
873 | ||
874 | pmic_plat_data = dev_get_platdata(tps65910->dev); | |
875 | if (!pmic_plat_data) | |
876 | return -EINVAL; | |
877 | ||
518fb721 GG |
878 | pmic = kzalloc(sizeof(*pmic), GFP_KERNEL); |
879 | if (!pmic) | |
880 | return -ENOMEM; | |
881 | ||
882 | mutex_init(&pmic->mutex); | |
883 | pmic->mfd = tps65910; | |
884 | platform_set_drvdata(pdev, pmic); | |
885 | ||
886 | /* Give control of all register to control port */ | |
887 | tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL, | |
888 | DEVCTRL_SR_CTL_I2C_SEL_MASK); | |
889 | ||
a320e3c3 JEC |
890 | switch(tps65910_chip_id(tps65910)) { |
891 | case TPS65910: | |
892 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; | |
39aa9b6e | 893 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
a320e3c3 | 894 | info = tps65910_regs; |
d04156bc | 895 | break; |
a320e3c3 JEC |
896 | case TPS65911: |
897 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; | |
39aa9b6e | 898 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
a320e3c3 | 899 | info = tps65911_regs; |
d04156bc | 900 | break; |
a320e3c3 JEC |
901 | default: |
902 | pr_err("Invalid tps chip version\n"); | |
a3ee13ee | 903 | kfree(pmic); |
a320e3c3 JEC |
904 | return -ENODEV; |
905 | } | |
906 | ||
39aa9b6e AL |
907 | pmic->desc = kcalloc(pmic->num_regulators, |
908 | sizeof(struct regulator_desc), GFP_KERNEL); | |
909 | if (!pmic->desc) { | |
910 | err = -ENOMEM; | |
911 | goto err_free_pmic; | |
912 | } | |
913 | ||
914 | pmic->info = kcalloc(pmic->num_regulators, | |
915 | sizeof(struct tps_info *), GFP_KERNEL); | |
916 | if (!pmic->info) { | |
917 | err = -ENOMEM; | |
918 | goto err_free_desc; | |
919 | } | |
920 | ||
921 | pmic->rdev = kcalloc(pmic->num_regulators, | |
922 | sizeof(struct regulator_dev *), GFP_KERNEL); | |
923 | if (!pmic->rdev) { | |
924 | err = -ENOMEM; | |
925 | goto err_free_info; | |
926 | } | |
927 | ||
c1fc1480 KM |
928 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
929 | i++, info++) { | |
930 | ||
931 | reg_data = pmic_plat_data->tps65910_pmic_init_data[i]; | |
932 | ||
933 | /* Regulator API handles empty constraints but not NULL | |
934 | * constraints */ | |
935 | if (!reg_data) | |
936 | continue; | |
937 | ||
518fb721 GG |
938 | /* Register the regulators */ |
939 | pmic->info[i] = info; | |
940 | ||
941 | pmic->desc[i].name = info->name; | |
77fa44d0 | 942 | pmic->desc[i].id = i; |
7d38a3cb | 943 | pmic->desc[i].n_voltages = info->n_voltages; |
518fb721 | 944 | |
a320e3c3 | 945 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
518fb721 | 946 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
780dc9ba AM |
947 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
948 | VDD1_2_NUM_VOLT_COARSE; | |
a320e3c3 JEC |
949 | } else if (i == TPS65910_REG_VDD3) { |
950 | if (tps65910_chip_id(tps65910) == TPS65910) | |
951 | pmic->desc[i].ops = &tps65910_ops_vdd3; | |
952 | else | |
953 | pmic->desc[i].ops = &tps65910_ops_dcdc; | |
954 | } else { | |
955 | if (tps65910_chip_id(tps65910) == TPS65910) | |
956 | pmic->desc[i].ops = &tps65910_ops; | |
957 | else | |
958 | pmic->desc[i].ops = &tps65911_ops; | |
959 | } | |
518fb721 GG |
960 | |
961 | pmic->desc[i].type = REGULATOR_VOLTAGE; | |
962 | pmic->desc[i].owner = THIS_MODULE; | |
963 | ||
964 | rdev = regulator_register(&pmic->desc[i], | |
2c043bcb | 965 | tps65910->dev, reg_data, pmic, NULL); |
518fb721 GG |
966 | if (IS_ERR(rdev)) { |
967 | dev_err(tps65910->dev, | |
968 | "failed to register %s regulator\n", | |
969 | pdev->name); | |
970 | err = PTR_ERR(rdev); | |
39aa9b6e | 971 | goto err_unregister_regulator; |
518fb721 GG |
972 | } |
973 | ||
974 | /* Save regulator for cleanup */ | |
975 | pmic->rdev[i] = rdev; | |
976 | } | |
977 | return 0; | |
978 | ||
39aa9b6e | 979 | err_unregister_regulator: |
518fb721 GG |
980 | while (--i >= 0) |
981 | regulator_unregister(pmic->rdev[i]); | |
39aa9b6e AL |
982 | kfree(pmic->rdev); |
983 | err_free_info: | |
984 | kfree(pmic->info); | |
985 | err_free_desc: | |
986 | kfree(pmic->desc); | |
987 | err_free_pmic: | |
518fb721 GG |
988 | kfree(pmic); |
989 | return err; | |
990 | } | |
991 | ||
992 | static int __devexit tps65910_remove(struct platform_device *pdev) | |
993 | { | |
39aa9b6e | 994 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
518fb721 GG |
995 | int i; |
996 | ||
39aa9b6e AL |
997 | for (i = 0; i < pmic->num_regulators; i++) |
998 | regulator_unregister(pmic->rdev[i]); | |
518fb721 | 999 | |
39aa9b6e AL |
1000 | kfree(pmic->rdev); |
1001 | kfree(pmic->info); | |
1002 | kfree(pmic->desc); | |
1003 | kfree(pmic); | |
518fb721 GG |
1004 | return 0; |
1005 | } | |
1006 | ||
1007 | static struct platform_driver tps65910_driver = { | |
1008 | .driver = { | |
1009 | .name = "tps65910-pmic", | |
1010 | .owner = THIS_MODULE, | |
1011 | }, | |
1012 | .probe = tps65910_probe, | |
1013 | .remove = __devexit_p(tps65910_remove), | |
1014 | }; | |
1015 | ||
1016 | static int __init tps65910_init(void) | |
1017 | { | |
1018 | return platform_driver_register(&tps65910_driver); | |
1019 | } | |
1020 | subsys_initcall(tps65910_init); | |
1021 | ||
1022 | static void __exit tps65910_cleanup(void) | |
1023 | { | |
1024 | platform_driver_unregister(&tps65910_driver); | |
1025 | } | |
1026 | module_exit(tps65910_cleanup); | |
1027 | ||
1028 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); | |
1029 | MODULE_DESCRIPTION("TPS6507x voltage regulator driver"); | |
1030 | MODULE_LICENSE("GPL v2"); | |
1031 | MODULE_ALIAS("platform:tps65910-pmic"); |