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90e7d526 K |
1 | /* |
2 | * tps65218-regulator.c | |
3 | * | |
4 | * Regulator driver for TPS65218 PMIC | |
5 | * | |
2ca76b3e | 6 | * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ |
90e7d526 K |
7 | * |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
13 | * kind, whether expressed or implied; without even the implied warranty | |
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License version 2 for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/of_device.h> | |
0aced355 | 25 | #include <linux/regmap.h> |
90e7d526 K |
26 | #include <linux/regulator/of_regulator.h> |
27 | #include <linux/regulator/driver.h> | |
28 | #include <linux/regulator/machine.h> | |
29 | #include <linux/mfd/tps65218.h> | |
30 | ||
2dc49403 | 31 | #define TPS65218_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ |
7cfcecfb AL |
32 | _em, _cr, _cm, _lr, _nlr, _delay, _fuv, _sr, _sm, \ |
33 | _ct, _ncl) \ | |
90e7d526 K |
34 | { \ |
35 | .name = _name, \ | |
2dc49403 | 36 | .of_match = _of, \ |
90e7d526 K |
37 | .id = _id, \ |
38 | .ops = &_ops, \ | |
39 | .n_voltages = _n, \ | |
c0ea88b8 | 40 | .type = _type, \ |
90e7d526 K |
41 | .owner = THIS_MODULE, \ |
42 | .vsel_reg = _vr, \ | |
43 | .vsel_mask = _vm, \ | |
c0ea88b8 NK |
44 | .csel_reg = _cr, \ |
45 | .csel_mask = _cm, \ | |
7cfcecfb AL |
46 | .curr_table = _ct, \ |
47 | .n_current_limits = _ncl, \ | |
90e7d526 K |
48 | .enable_reg = _er, \ |
49 | .enable_mask = _em, \ | |
dd648ef2 | 50 | .volt_table = NULL, \ |
90e7d526 K |
51 | .linear_ranges = _lr, \ |
52 | .n_linear_ranges = _nlr, \ | |
5ab9be42 | 53 | .ramp_delay = _delay, \ |
b9a0d359 TK |
54 | .fixed_uV = _fuv, \ |
55 | .bypass_reg = _sr, \ | |
56 | .bypass_mask = _sm, \ | |
90e7d526 K |
57 | } \ |
58 | ||
60ab7f41 | 59 | static const struct linear_range dcdc1_dcdc2_ranges[] = { |
90e7d526 K |
60 | REGULATOR_LINEAR_RANGE(850000, 0x0, 0x32, 10000), |
61 | REGULATOR_LINEAR_RANGE(1375000, 0x33, 0x3f, 25000), | |
62 | }; | |
63 | ||
60ab7f41 | 64 | static const struct linear_range ldo1_dcdc3_ranges[] = { |
90e7d526 K |
65 | REGULATOR_LINEAR_RANGE(900000, 0x0, 0x1a, 25000), |
66 | REGULATOR_LINEAR_RANGE(1600000, 0x1b, 0x3f, 50000), | |
67 | }; | |
68 | ||
60ab7f41 | 69 | static const struct linear_range dcdc4_ranges[] = { |
90e7d526 | 70 | REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000), |
42ab0f39 | 71 | REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000), |
90e7d526 K |
72 | }; |
73 | ||
90e7d526 K |
74 | static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev, |
75 | unsigned selector) | |
76 | { | |
77 | int ret; | |
78 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
79 | unsigned int rid = rdev_get_id(dev); | |
80 | ||
81 | /* Set the voltage based on vsel value and write protect level is 2 */ | |
82 | ret = tps65218_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask, | |
83 | selector, TPS65218_PROTECT_L1); | |
84 | ||
85 | /* Set GO bit for DCDC1/2 to initiate voltage transistion */ | |
86 | switch (rid) { | |
87 | case TPS65218_DCDC_1: | |
88 | case TPS65218_DCDC_2: | |
89 | ret = tps65218_set_bits(tps, TPS65218_REG_CONTRL_SLEW_RATE, | |
90 | TPS65218_SLEW_RATE_GO, | |
91 | TPS65218_SLEW_RATE_GO, | |
92 | TPS65218_PROTECT_L1); | |
93 | break; | |
94 | } | |
95 | ||
96 | return ret; | |
97 | } | |
98 | ||
99 | static int tps65218_pmic_enable(struct regulator_dev *dev) | |
100 | { | |
101 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
5f986f7c | 102 | int rid = rdev_get_id(dev); |
90e7d526 K |
103 | |
104 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
105 | return -EINVAL; | |
106 | ||
107 | /* Enable the regulator and password protection is level 1 */ | |
108 | return tps65218_set_bits(tps, dev->desc->enable_reg, | |
109 | dev->desc->enable_mask, dev->desc->enable_mask, | |
110 | TPS65218_PROTECT_L1); | |
111 | } | |
112 | ||
113 | static int tps65218_pmic_disable(struct regulator_dev *dev) | |
114 | { | |
115 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
5f986f7c | 116 | int rid = rdev_get_id(dev); |
90e7d526 K |
117 | |
118 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
119 | return -EINVAL; | |
120 | ||
121 | /* Disable the regulator and password protection is level 1 */ | |
122 | return tps65218_clear_bits(tps, dev->desc->enable_reg, | |
123 | dev->desc->enable_mask, TPS65218_PROTECT_L1); | |
124 | } | |
125 | ||
b9a0d359 TK |
126 | static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev) |
127 | { | |
128 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
129 | unsigned int rid = rdev_get_id(dev); | |
130 | ||
02d88863 | 131 | if (rid > TPS65218_LDO_1) |
b9a0d359 TK |
132 | return -EINVAL; |
133 | ||
134 | return tps65218_clear_bits(tps, dev->desc->bypass_reg, | |
135 | dev->desc->bypass_mask, | |
136 | TPS65218_PROTECT_L1); | |
137 | } | |
138 | ||
139 | static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev) | |
140 | { | |
141 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
142 | unsigned int rid = rdev_get_id(dev); | |
143 | ||
02d88863 | 144 | if (rid > TPS65218_LDO_1) |
b9a0d359 TK |
145 | return -EINVAL; |
146 | ||
23a34f9d TK |
147 | /* |
148 | * Certain revisions of TPS65218 will need to have DCDC3 regulator | |
149 | * enabled always, otherwise an immediate system reboot will occur | |
150 | * during poweroff. | |
151 | */ | |
152 | if (rid == TPS65218_DCDC_3 && tps->rev == TPS65218_REV_2_1) | |
153 | return 0; | |
154 | ||
2dc49403 | 155 | if (!tps->strobes[rid]) { |
3fb2ef11 | 156 | if (rid == TPS65218_DCDC_3) |
efeb88c6 | 157 | tps->strobes[rid] = 3; |
3fb2ef11 TK |
158 | else |
159 | return -EINVAL; | |
160 | } | |
b9a0d359 TK |
161 | |
162 | return tps65218_set_bits(tps, dev->desc->bypass_reg, | |
163 | dev->desc->bypass_mask, | |
2dc49403 | 164 | tps->strobes[rid], TPS65218_PROTECT_L1); |
b9a0d359 TK |
165 | } |
166 | ||
90e7d526 | 167 | /* Operations permitted on DCDC1, DCDC2 */ |
d1030b43 | 168 | static const struct regulator_ops tps65218_dcdc12_ops = { |
90e7d526 K |
169 | .is_enabled = regulator_is_enabled_regmap, |
170 | .enable = tps65218_pmic_enable, | |
171 | .disable = tps65218_pmic_disable, | |
172 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
173 | .set_voltage_sel = tps65218_pmic_set_voltage_sel, | |
174 | .list_voltage = regulator_list_voltage_linear_range, | |
175 | .map_voltage = regulator_map_voltage_linear_range, | |
5ab9be42 | 176 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
b9a0d359 TK |
177 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
178 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
179 | }; |
180 | ||
181 | /* Operations permitted on DCDC3, DCDC4 and LDO1 */ | |
d1030b43 | 182 | static const struct regulator_ops tps65218_ldo1_dcdc34_ops = { |
90e7d526 K |
183 | .is_enabled = regulator_is_enabled_regmap, |
184 | .enable = tps65218_pmic_enable, | |
185 | .disable = tps65218_pmic_disable, | |
186 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
187 | .set_voltage_sel = tps65218_pmic_set_voltage_sel, | |
188 | .list_voltage = regulator_list_voltage_linear_range, | |
189 | .map_voltage = regulator_map_voltage_linear_range, | |
b9a0d359 TK |
190 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
191 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
192 | }; |
193 | ||
7cfcecfb | 194 | static const unsigned int ls3_currents[] = { 100000, 200000, 500000, 1000000 }; |
c0ea88b8 NK |
195 | |
196 | static int tps65218_pmic_set_input_current_lim(struct regulator_dev *dev, | |
197 | int lim_uA) | |
198 | { | |
199 | unsigned int index = 0; | |
200 | unsigned int num_currents = ARRAY_SIZE(ls3_currents); | |
201 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
202 | ||
203 | while (index < num_currents && ls3_currents[index] != lim_uA) | |
204 | index++; | |
205 | ||
206 | if (index == num_currents) | |
207 | return -EINVAL; | |
208 | ||
209 | return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, | |
e5c8ba06 CH |
210 | index << __builtin_ctz(dev->desc->csel_mask), |
211 | TPS65218_PROTECT_L1); | |
c0ea88b8 NK |
212 | } |
213 | ||
214 | static int tps65218_pmic_set_current_limit(struct regulator_dev *dev, | |
215 | int min_uA, int max_uA) | |
216 | { | |
217 | int index = 0; | |
218 | unsigned int num_currents = ARRAY_SIZE(ls3_currents); | |
219 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
220 | ||
71a64ba2 | 221 | while (index < num_currents && ls3_currents[index] <= max_uA) |
c0ea88b8 NK |
222 | index++; |
223 | ||
224 | index--; | |
225 | ||
226 | if (index < 0 || ls3_currents[index] < min_uA) | |
227 | return -EINVAL; | |
228 | ||
229 | return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, | |
e5c8ba06 CH |
230 | index << __builtin_ctz(dev->desc->csel_mask), |
231 | TPS65218_PROTECT_L1); | |
c0ea88b8 NK |
232 | } |
233 | ||
d1030b43 | 234 | static const struct regulator_ops tps65218_ls23_ops = { |
c0ea88b8 NK |
235 | .is_enabled = regulator_is_enabled_regmap, |
236 | .enable = tps65218_pmic_enable, | |
237 | .disable = tps65218_pmic_disable, | |
238 | .set_input_current_limit = tps65218_pmic_set_input_current_lim, | |
239 | .set_current_limit = tps65218_pmic_set_current_limit, | |
7cfcecfb | 240 | .get_current_limit = regulator_get_current_limit_regmap, |
c0ea88b8 NK |
241 | }; |
242 | ||
90e7d526 | 243 | /* Operations permitted on DCDC5, DCDC6 */ |
d1030b43 | 244 | static const struct regulator_ops tps65218_dcdc56_pmic_ops = { |
90e7d526 K |
245 | .is_enabled = regulator_is_enabled_regmap, |
246 | .enable = tps65218_pmic_enable, | |
247 | .disable = tps65218_pmic_disable, | |
b9a0d359 TK |
248 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
249 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
250 | }; |
251 | ||
252 | static const struct regulator_desc regulators[] = { | |
2dc49403 K |
253 | TPS65218_REGULATOR("DCDC1", "regulator-dcdc1", TPS65218_DCDC_1, |
254 | REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64, | |
255 | TPS65218_REG_CONTROL_DCDC1, | |
c0ea88b8 NK |
256 | TPS65218_CONTROL_DCDC1_MASK, TPS65218_REG_ENABLE1, |
257 | TPS65218_ENABLE1_DC1_EN, 0, 0, dcdc1_dcdc2_ranges, | |
b9a0d359 | 258 | 2, 4000, 0, TPS65218_REG_SEQ3, |
7cfcecfb | 259 | TPS65218_SEQ3_DC1_SEQ_MASK, NULL, 0), |
2dc49403 K |
260 | TPS65218_REGULATOR("DCDC2", "regulator-dcdc2", TPS65218_DCDC_2, |
261 | REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64, | |
262 | TPS65218_REG_CONTROL_DCDC2, | |
c0ea88b8 NK |
263 | TPS65218_CONTROL_DCDC2_MASK, TPS65218_REG_ENABLE1, |
264 | TPS65218_ENABLE1_DC2_EN, 0, 0, dcdc1_dcdc2_ranges, | |
b9a0d359 | 265 | 2, 4000, 0, TPS65218_REG_SEQ3, |
7cfcecfb | 266 | TPS65218_SEQ3_DC2_SEQ_MASK, NULL, 0), |
2dc49403 K |
267 | TPS65218_REGULATOR("DCDC3", "regulator-dcdc3", TPS65218_DCDC_3, |
268 | REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64, | |
c0ea88b8 | 269 | TPS65218_REG_CONTROL_DCDC3, |
90e7d526 | 270 | TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1, |
c0ea88b8 | 271 | TPS65218_ENABLE1_DC3_EN, 0, 0, ldo1_dcdc3_ranges, 2, |
7cfcecfb AL |
272 | 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC3_SEQ_MASK, |
273 | NULL, 0), | |
2dc49403 K |
274 | TPS65218_REGULATOR("DCDC4", "regulator-dcdc4", TPS65218_DCDC_4, |
275 | REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 53, | |
c0ea88b8 NK |
276 | TPS65218_REG_CONTROL_DCDC4, |
277 | TPS65218_CONTROL_DCDC4_MASK, TPS65218_REG_ENABLE1, | |
278 | TPS65218_ENABLE1_DC4_EN, 0, 0, dcdc4_ranges, 2, | |
7cfcecfb AL |
279 | 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC4_SEQ_MASK, |
280 | NULL, 0), | |
2dc49403 K |
281 | TPS65218_REGULATOR("DCDC5", "regulator-dcdc5", TPS65218_DCDC_5, |
282 | REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1, | |
283 | -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC5_EN, 0, | |
284 | 0, NULL, 0, 0, 1000000, TPS65218_REG_SEQ5, | |
7cfcecfb | 285 | TPS65218_SEQ5_DC5_SEQ_MASK, NULL, 0), |
2dc49403 K |
286 | TPS65218_REGULATOR("DCDC6", "regulator-dcdc6", TPS65218_DCDC_6, |
287 | REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1, | |
288 | -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC6_EN, 0, | |
289 | 0, NULL, 0, 0, 1800000, TPS65218_REG_SEQ5, | |
7cfcecfb | 290 | TPS65218_SEQ5_DC6_SEQ_MASK, NULL, 0), |
2dc49403 K |
291 | TPS65218_REGULATOR("LDO1", "regulator-ldo1", TPS65218_LDO_1, |
292 | REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64, | |
0eada6a1 | 293 | TPS65218_REG_CONTROL_LDO1, |
90e7d526 | 294 | TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2, |
c0ea88b8 | 295 | TPS65218_ENABLE2_LDO1_EN, 0, 0, ldo1_dcdc3_ranges, |
b9a0d359 | 296 | 2, 0, 0, TPS65218_REG_SEQ6, |
7cfcecfb | 297 | TPS65218_SEQ6_LDO1_SEQ_MASK, NULL, 0), |
e5c8ba06 CH |
298 | TPS65218_REGULATOR("LS2", "regulator-ls2", TPS65218_LS_2, |
299 | REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0, | |
300 | TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS2_EN, | |
301 | TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS2ILIM_MASK, | |
7cfcecfb AL |
302 | NULL, 0, 0, 0, 0, 0, ls3_currents, |
303 | ARRAY_SIZE(ls3_currents)), | |
2dc49403 | 304 | TPS65218_REGULATOR("LS3", "regulator-ls3", TPS65218_LS_3, |
e5c8ba06 | 305 | REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0, |
2dc49403 K |
306 | TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS3_EN, |
307 | TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS3ILIM_MASK, | |
7cfcecfb AL |
308 | NULL, 0, 0, 0, 0, 0, ls3_currents, |
309 | ARRAY_SIZE(ls3_currents)), | |
90e7d526 K |
310 | }; |
311 | ||
312 | static int tps65218_regulator_probe(struct platform_device *pdev) | |
313 | { | |
314 | struct tps65218 *tps = dev_get_drvdata(pdev->dev.parent); | |
90e7d526 | 315 | struct regulator_dev *rdev; |
90e7d526 | 316 | struct regulator_config config = { }; |
2dc49403 | 317 | int i, ret; |
b9a0d359 | 318 | unsigned int val; |
90e7d526 | 319 | |
90e7d526 | 320 | config.dev = &pdev->dev; |
2dc49403 | 321 | config.dev->of_node = tps->dev->of_node; |
90e7d526 K |
322 | config.driver_data = tps; |
323 | config.regmap = tps->regmap; | |
324 | ||
2dc49403 | 325 | /* Allocate memory for strobes */ |
a86854d0 KC |
326 | tps->strobes = devm_kcalloc(&pdev->dev, |
327 | TPS65218_NUM_REGULATOR, sizeof(u8), | |
328 | GFP_KERNEL); | |
5597bfb4 AL |
329 | if (!tps->strobes) |
330 | return -ENOMEM; | |
90e7d526 | 331 | |
2dc49403 K |
332 | for (i = 0; i < ARRAY_SIZE(regulators); i++) { |
333 | rdev = devm_regulator_register(&pdev->dev, ®ulators[i], | |
334 | &config); | |
335 | if (IS_ERR(rdev)) { | |
336 | dev_err(tps->dev, "failed to register %s regulator\n", | |
337 | pdev->name); | |
338 | return PTR_ERR(rdev); | |
339 | } | |
b9a0d359 | 340 | |
2dc49403 K |
341 | ret = regmap_read(tps->regmap, regulators[i].bypass_reg, &val); |
342 | if (ret) | |
343 | return ret; | |
344 | ||
345 | tps->strobes[i] = val & regulators[i].bypass_mask; | |
346 | } | |
b9a0d359 | 347 | |
90e7d526 K |
348 | return 0; |
349 | } | |
350 | ||
2dc49403 K |
351 | static const struct platform_device_id tps65218_regulator_id_table[] = { |
352 | { "tps65218-regulator", }, | |
353 | { /* sentinel */ } | |
354 | }; | |
355 | MODULE_DEVICE_TABLE(platform, tps65218_regulator_id_table); | |
356 | ||
90e7d526 K |
357 | static struct platform_driver tps65218_regulator_driver = { |
358 | .driver = { | |
359 | .name = "tps65218-pmic", | |
90e7d526 K |
360 | }, |
361 | .probe = tps65218_regulator_probe, | |
2dc49403 | 362 | .id_table = tps65218_regulator_id_table, |
90e7d526 K |
363 | }; |
364 | ||
365 | module_platform_driver(tps65218_regulator_driver); | |
366 | ||
367 | MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>"); | |
368 | MODULE_DESCRIPTION("TPS65218 voltage regulator driver"); | |
369 | MODULE_ALIAS("platform:tps65218-pmic"); | |
370 | MODULE_LICENSE("GPL v2"); |