[linux-2.6-block.git] / drivers / regulator / tps51632-regulator.c

/*
 * tps51632-regulator.c -- TI TPS51632
 *
 * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
 * Controller with serial VID control and DVFS.
 *
 * Copyright (c) 2012, NVIDIA Corporation.
 *
 * Author: Laxman Dewangan <ldewangan@nvidia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
 * whether express or implied; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 * 02111-1307, USA
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/tps51632-regulator.h>
#include <linux/slab.h>

/* Register definitions */
#define TPS51632_VOLTAGE_SELECT_REG		0x0
#define TPS51632_VOLTAGE_BASE_REG		0x1
#define TPS51632_OFFSET_REG			0x2
#define TPS51632_IMON_REG			0x3
#define TPS51632_VMAX_REG			0x4
#define TPS51632_DVFS_CONTROL_REG		0x5
#define TPS51632_POWER_STATE_REG		0x6
#define TPS51632_SLEW_REGS			0x7
#define TPS51632_FAULT_REG			0x14

#define TPS51632_MAX_REG			0x15

#define TPS51632_VOUT_MASK			0x7F
#define TPS51632_VOUT_OFFSET_MASK		0x1F
#define TPS51632_VMAX_MASK			0x7F
#define TPS51632_VMAX_LOCK			0x80

/* TPS51632_DVFS_CONTROL_REG */
#define TPS51632_DVFS_PWMEN			0x1
#define TPS51632_DVFS_STEP_20			0x2
#define TPS51632_DVFS_VMAX_PG			0x4
#define TPS51632_DVFS_PWMRST			0x8
#define TPS51632_DVFS_OCA_EN			0x10
#define TPS51632_DVFS_FCCM			0x20

/* TPS51632_POWER_STATE_REG */
#define TPS51632_POWER_STATE_MASK		0x03
#define TPS51632_POWER_STATE_MULTI_PHASE_CCM	0x0
#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM	0x1
#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM	0x2

#define TPS51632_MIN_VOLATGE			500000
#define TPS51632_MAX_VOLATGE			1520000
#define TPS51632_VOLATGE_STEP_10mV		10000
#define TPS51632_VOLATGE_STEP_20mV		20000
#define TPS51632_MAX_VSEL			0x7F
#define TPS51632_MIN_VSEL			0x19
#define TPS51632_DEFAULT_RAMP_DELAY		6000
#define TPS51632_VOLT_VSEL(uV)					\
		(DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE,	\
			TPS51632_VOLATGE_STEP_10mV) +		\
			TPS51632_MIN_VSEL)

/* TPS51632 chip information */
struct tps51632_chip {
	struct device *dev;
	struct regulator_desc desc;
	struct regulator_dev *rdev;
	struct regmap *regmap;
	bool enable_pwm_dvfs;
};

static int tps51632_dcdc_get_voltage_sel(struct regulator_dev *rdev)
{
	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
	unsigned int data;
	int ret;
	unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;
	int vsel;

	if (tps->enable_pwm_dvfs)
		reg = TPS51632_VOLTAGE_BASE_REG;

	ret = regmap_read(tps->regmap, reg, &data);
	if (ret < 0) {
		dev_err(tps->dev, "reg read failed, err %d\n", ret);
		return ret;
	}

	vsel = data & TPS51632_VOUT_MASK;
	return vsel;
}

static int tps51632_dcdc_set_voltage_sel(struct regulator_dev *rdev,
		unsigned selector)
{
	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
	int ret;
	unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;

	if (tps->enable_pwm_dvfs)
		reg = TPS51632_VOLTAGE_BASE_REG;

	if (selector > TPS51632_MAX_VSEL)
		return -EINVAL;

	ret = regmap_write(tps->regmap, reg, selector);
	if (ret < 0)
		dev_err(tps->dev, "reg write failed, err %d\n", ret);
	return ret;
}

static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
		int ramp_delay)
{
	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
	int bit = ramp_delay/6000;
	int ret;

	if (bit)
		bit--;
	ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
	if (ret < 0)
		dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
	return ret;
}

static struct regulator_ops tps51632_dcdc_ops = {
	.get_voltage_sel	= tps51632_dcdc_get_voltage_sel,
	.set_voltage_sel	= tps51632_dcdc_set_voltage_sel,
	.list_voltage		= regulator_list_voltage_linear,
	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
	.set_ramp_delay		= tps51632_dcdc_set_ramp_delay,
};

static int tps51632_init_dcdc(struct tps51632_chip *tps,
		struct tps51632_regulator_platform_data *pdata)
{
	int ret;
	uint8_t	control = 0;
	int vsel;

	if (!pdata->enable_pwm_dvfs)
		goto skip_pwm_config;

	control |= TPS51632_DVFS_PWMEN;
	tps->enable_pwm_dvfs = pdata->enable_pwm_dvfs;
	vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
	ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
	if (ret < 0) {
		dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
		return ret;
	}

	if (pdata->dvfs_step_20mV)
		control |= TPS51632_DVFS_STEP_20;

	if (pdata->max_voltage_uV) {
		unsigned int vmax;
		/**
		 * TPS51632 hw behavior: VMAX register can be write only
		 * once as it get locked after first write. The lock get
		 * reset only when device is power-reset.
		 * Write register only when lock bit is not enabled.
		 */
		ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
		if (ret < 0) {
			dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
			return ret;
		}
		if (!(vmax & TPS51632_VMAX_LOCK)) {
			vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
			ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
					vsel);
			if (ret < 0) {
				dev_err(tps->dev,
					"VMAX write failed, err %d\n", ret);
				return ret;
			}
		}
	}

skip_pwm_config:
	ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
	if (ret < 0)
		dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
	return ret;
}

static bool is_volatile_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case TPS51632_OFFSET_REG:
	case TPS51632_FAULT_REG:
	case TPS51632_IMON_REG:
		return true;
	default:
		return false;
	}
}

static bool is_read_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x08 ... 0x0F:
		return false;
	default:
		return true;
	}
}

static bool is_write_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case TPS51632_VOLTAGE_SELECT_REG:
	case TPS51632_VOLTAGE_BASE_REG:
	case TPS51632_VMAX_REG:
	case TPS51632_DVFS_CONTROL_REG:
	case TPS51632_POWER_STATE_REG:
	case TPS51632_SLEW_REGS:
		return true;
	default:
		return false;
	}
}

static const struct regmap_config tps51632_regmap_config = {
	.reg_bits		= 8,
	.val_bits		= 8,
	.writeable_reg		= is_write_reg,
	.readable_reg		= is_read_reg,
	.volatile_reg		= is_volatile_reg,
	.max_register		= TPS51632_MAX_REG - 1,
	.cache_type		= REGCACHE_RBTREE,
};

static int tps51632_probe(struct i2c_client *client,
				const struct i2c_device_id *id)
{
	struct tps51632_regulator_platform_data *pdata;
	struct regulator_dev *rdev;
	struct tps51632_chip *tps;
	int ret;
	struct regulator_config config = { };

	pdata = client->dev.platform_data;
	if (!pdata) {
		dev_err(&client->dev, "No Platform data\n");
		return -EINVAL;
	}

	if (pdata->enable_pwm_dvfs) {
		if ((pdata->base_voltage_uV < TPS51632_MIN_VOLATGE) ||
		    (pdata->base_voltage_uV > TPS51632_MAX_VOLATGE)) {
			dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
			return -EINVAL;
		}

		if ((pdata->max_voltage_uV) &&
		    ((pdata->max_voltage_uV < TPS51632_MIN_VOLATGE) ||
		     (pdata->max_voltage_uV > TPS51632_MAX_VOLATGE))) {
			dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
			return -EINVAL;
		}
	}

	tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
	if (!tps) {
		dev_err(&client->dev, "Memory allocation failed\n");
		return -ENOMEM;
	}

	tps->dev = &client->dev;
	tps->desc.name = id->name;
	tps->desc.id = 0;
	tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
	tps->desc.min_uV = TPS51632_MIN_VOLATGE;
	tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV;
	tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
	tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
	tps->desc.ops = &tps51632_dcdc_ops;
	tps->desc.type = REGULATOR_VOLTAGE;
	tps->desc.owner = THIS_MODULE;

	tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
	if (IS_ERR(tps->regmap)) {
		ret = PTR_ERR(tps->regmap);
		dev_err(&client->dev, "regmap init failed, err %d\n", ret);
		return ret;
	}
	i2c_set_clientdata(client, tps);

	ret = tps51632_init_dcdc(tps, pdata);
	if (ret < 0) {
		dev_err(tps->dev, "Init failed, err = %d\n", ret);
		return ret;
	}

	/* Register the regulators */
	config.dev = &client->dev;
	config.init_data = pdata->reg_init_data;
	config.driver_data = tps;
	config.regmap = tps->regmap;
	config.of_node = client->dev.of_node;

	rdev = regulator_register(&tps->desc, &config);
	if (IS_ERR(rdev)) {
		dev_err(tps->dev, "regulator register failed\n");
		return PTR_ERR(rdev);
	}

	tps->rdev = rdev;
	return 0;
}

static int tps51632_remove(struct i2c_client *client)
{
	struct tps51632_chip *tps = i2c_get_clientdata(client);

	regulator_unregister(tps->rdev);
	return 0;
}

static const struct i2c_device_id tps51632_id[] = {
	{.name = "tps51632",},
	{},
};

MODULE_DEVICE_TABLE(i2c, tps51632_id);

static struct i2c_driver tps51632_i2c_driver = {
	.driver = {
		.name = "tps51632",
		.owner = THIS_MODULE,
	},
	.probe = tps51632_probe,
	.remove = tps51632_remove,
	.id_table = tps51632_id,
};

static int __init tps51632_init(void)
{
	return i2c_add_driver(&tps51632_i2c_driver);
}
subsys_initcall(tps51632_init);

static void __exit tps51632_cleanup(void)
{
	i2c_del_driver(&tps51632_i2c_driver);
}
module_exit(tps51632_cleanup);

MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
0c570674 LD	1	/*
	2	* tps51632-regulator.c -- TI TPS51632
	3	*
	4	* Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
	5	* Controller with serial VID control and DVFS.
	6	*
	7	* Copyright (c) 2012, NVIDIA Corporation.
	8	*
	9	* Author: Laxman Dewangan <ldewangan@nvidia.com>
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation version 2.
	14	*
	15	* This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
	16	* whether express or implied; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	23	* 02111-1307, USA
	24	*/
	25
	26	#include <linux/err.h>
	27	#include <linux/i2c.h>
	28	#include <linux/init.h>
	29	#include <linux/kernel.h>
	30	#include <linux/module.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/regmap.h>
	33	#include <linux/regulator/driver.h>
	34	#include <linux/regulator/machine.h>
	35	#include <linux/regulator/tps51632-regulator.h>
	36	#include <linux/slab.h>
	37
	38	/* Register definitions */
	39	#define TPS51632_VOLTAGE_SELECT_REG 0x0
	40	#define TPS51632_VOLTAGE_BASE_REG 0x1
	41	#define TPS51632_OFFSET_REG 0x2
	42	#define TPS51632_IMON_REG 0x3
	43	#define TPS51632_VMAX_REG 0x4
	44	#define TPS51632_DVFS_CONTROL_REG 0x5
	45	#define TPS51632_POWER_STATE_REG 0x6
	46	#define TPS51632_SLEW_REGS 0x7
	47	#define TPS51632_FAULT_REG 0x14
	48
	49	#define TPS51632_MAX_REG 0x15
	50
	51	#define TPS51632_VOUT_MASK 0x7F
	52	#define TPS51632_VOUT_OFFSET_MASK 0x1F
	53	#define TPS51632_VMAX_MASK 0x7F
	54	#define TPS51632_VMAX_LOCK 0x80
	55
	56	/* TPS51632_DVFS_CONTROL_REG */
	57	#define TPS51632_DVFS_PWMEN 0x1
	58	#define TPS51632_DVFS_STEP_20 0x2
	59	#define TPS51632_DVFS_VMAX_PG 0x4
	60	#define TPS51632_DVFS_PWMRST 0x8
	61	#define TPS51632_DVFS_OCA_EN 0x10
	62	#define TPS51632_DVFS_FCCM 0x20
	63
	64	/* TPS51632_POWER_STATE_REG */
65	#define TPS51632_POWER_STATE_MASK 0x03
66	#define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0
67	#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
68	#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
69
70	#define TPS51632_MIN_VOLATGE 500000
71	#define TPS51632_MAX_VOLATGE 1520000
72	#define TPS51632_VOLATGE_STEP_10mV 10000
73	#define TPS51632_VOLATGE_STEP_20mV 20000
74	#define TPS51632_MAX_VSEL 0x7F
75	#define TPS51632_MIN_VSEL 0x19
76	#define TPS51632_DEFAULT_RAMP_DELAY 6000
77	#define TPS51632_VOLT_VSEL(uV) \
78	(DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE, \
79	TPS51632_VOLATGE_STEP_10mV) + \
80	TPS51632_MIN_VSEL)
81
82	/* TPS51632 chip information */
83	struct tps51632_chip {
84	struct device *dev;
85	struct regulator_desc desc;
86	struct regulator_dev *rdev;
87	struct regmap *regmap;
88	bool enable_pwm_dvfs;
89	};
90
91	static int tps51632_dcdc_get_voltage_sel(struct regulator_dev *rdev)
92	{
93	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
94	unsigned int data;
95	int ret;
96	unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;
97	int vsel;
98
99	if (tps->enable_pwm_dvfs)
100	reg = TPS51632_VOLTAGE_BASE_REG;
101
102	ret = regmap_read(tps->regmap, reg, &data);
103	if (ret < 0) {
104	dev_err(tps->dev, "reg read failed, err %d\n", ret);
105	return ret;
106	}
107
108	vsel = data & TPS51632_VOUT_MASK;
bd0ec7c1	109	return vsel;
0c570674 LD	110	}
	111
	112	static int tps51632_dcdc_set_voltage_sel(struct regulator_dev *rdev,
	113	unsigned selector)
	114	{
	115	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
0c570674 LD	116	int ret;
	117	unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;
	118
	119	if (tps->enable_pwm_dvfs)
	120	reg = TPS51632_VOLTAGE_BASE_REG;
	121
bd0ec7c1	122	if (selector > TPS51632_MAX_VSEL)
0c570674 LD	123	return -EINVAL;
0c570674 LD	124
5d6e6ffc	125	ret = regmap_write(tps->regmap, reg, selector);
0c570674 LD	126	if (ret < 0)
	127	dev_err(tps->dev, "reg write failed, err %d\n", ret);
	128	return ret;
	129	}
	130
	131	static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
	132	int ramp_delay)
	133	{
	134	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
	135	int bit = ramp_delay/6000;
	136	int ret;
	137
	138	if (bit)
	139	bit--;
	140	ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
	141	if (ret < 0)
	142	dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
	143	return ret;
	144	}
	145
	146	static struct regulator_ops tps51632_dcdc_ops = {
	147	.get_voltage_sel = tps51632_dcdc_get_voltage_sel,
	148	.set_voltage_sel = tps51632_dcdc_set_voltage_sel,
	149	.list_voltage = regulator_list_voltage_linear,
	150	.set_voltage_time_sel = regulator_set_voltage_time_sel,
	151	.set_ramp_delay = tps51632_dcdc_set_ramp_delay,
	152	};
	153
a5023574	154	static int tps51632_init_dcdc(struct tps51632_chip *tps,
0c570674 LD	155	struct tps51632_regulator_platform_data *pdata)
	156	{
	157	int ret;
	158	uint8_t control = 0;
	159	int vsel;
	160
	161	if (!pdata->enable_pwm_dvfs)
	162	goto skip_pwm_config;
	163
	164	control \|= TPS51632_DVFS_PWMEN;
	165	tps->enable_pwm_dvfs = pdata->enable_pwm_dvfs;
	166	vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
	167	ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
	168	if (ret < 0) {
	169	dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
	170	return ret;
	171	}
	172
	173	if (pdata->dvfs_step_20mV)
	174	control \|= TPS51632_DVFS_STEP_20;
	175
	176	if (pdata->max_voltage_uV) {
	177	unsigned int vmax;
	178	/**
	179	* TPS51632 hw behavior: VMAX register can be write only
	180	* once as it get locked after first write. The lock get
	181	* reset only when device is power-reset.
	182	* Write register only when lock bit is not enabled.
	183	*/
	184	ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
	185	if (ret < 0) {
	186	dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
	187	return ret;
	188	}
	189	if (!(vmax & TPS51632_VMAX_LOCK)) {
	190	vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
	191	ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
	192	vsel);
	193	if (ret < 0) {
	194	dev_err(tps->dev,
	195	"VMAX write failed, err %d\n", ret);
	196	return ret;
	197	}
	198	}
	199	}
	200
	201	skip_pwm_config:
	202	ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
	203	if (ret < 0)
	204	dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
	205	return ret;
	206	}
	207
faa3b2d5	208	static bool is_volatile_reg(struct device *dev, unsigned int reg)
0c570674	209	{
faa3b2d5 LD	210	switch (reg) {
	211	case TPS51632_OFFSET_REG:
	212	case TPS51632_FAULT_REG:
	213	case TPS51632_IMON_REG:
	214	return true;
	215	default:
0c570674	216	return false;
faa3b2d5 LD	217	}
	218	}
	219
	220	static bool is_read_reg(struct device *dev, unsigned int reg)
	221	{
	222	switch (reg) {
	223	case 0x08 ... 0x0F:
	224	return false;
	225	default:
	226	return true;
	227	}
	228	}
	229
	230	static bool is_write_reg(struct device *dev, unsigned int reg)
	231	{
	232	switch (reg) {
	233	case TPS51632_VOLTAGE_SELECT_REG:
	234	case TPS51632_VOLTAGE_BASE_REG:
	235	case TPS51632_VMAX_REG:
	236	case TPS51632_DVFS_CONTROL_REG:
	237	case TPS51632_POWER_STATE_REG:
	238	case TPS51632_SLEW_REGS:
	239	return true;
	240	default:
	241	return false;
	242	}
0c570674 LD	243	}
	244
	245	static const struct regmap_config tps51632_regmap_config = {
	246	.reg_bits = 8,
	247	.val_bits = 8,
faa3b2d5 LD	248	.writeable_reg = is_write_reg,
	249	.readable_reg = is_read_reg,
	250	.volatile_reg = is_volatile_reg,
0c570674 LD	251	.max_register = TPS51632_MAX_REG - 1,
	252	.cache_type = REGCACHE_RBTREE,
	253	};
	254
a5023574	255	static int tps51632_probe(struct i2c_client *client,
0c570674 LD	256	const struct i2c_device_id *id)
	257	{
	258	struct tps51632_regulator_platform_data *pdata;
	259	struct regulator_dev *rdev;
	260	struct tps51632_chip *tps;
	261	int ret;
	262	struct regulator_config config = { };
	263
	264	pdata = client->dev.platform_data;
	265	if (!pdata) {
	266	dev_err(&client->dev, "No Platform data\n");
	267	return -EINVAL;
	268	}
	269
dbc70518 AL	270	if (pdata->enable_pwm_dvfs) {
	271	if ((pdata->base_voltage_uV < TPS51632_MIN_VOLATGE) \|\|
	272	(pdata->base_voltage_uV > TPS51632_MAX_VOLATGE)) {
	273	dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
	274	return -EINVAL;
	275	}
	276
	277	if ((pdata->max_voltage_uV) &&
	278	((pdata->max_voltage_uV < TPS51632_MIN_VOLATGE) \|\|
	279	(pdata->max_voltage_uV > TPS51632_MAX_VOLATGE))) {
	280	dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
	281	return -EINVAL;
	282	}
	283	}
	284
0c570674 LD	285	tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
	286	if (!tps) {
	287	dev_err(&client->dev, "Memory allocation failed\n");
	288	return -ENOMEM;
	289	}
	290
	291	tps->dev = &client->dev;
	292	tps->desc.name = id->name;
	293	tps->desc.id = 0;
	294	tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
	295	tps->desc.min_uV = TPS51632_MIN_VOLATGE;
	296	tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV;
bd0ec7c1 AL	297	tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
bd0ec7c1 AL	298	tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
0c570674 LD	299	tps->desc.ops = &tps51632_dcdc_ops;
	300	tps->desc.type = REGULATOR_VOLTAGE;
	301	tps->desc.owner = THIS_MODULE;
	302
	303	tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
	304	if (IS_ERR(tps->regmap)) {
	305	ret = PTR_ERR(tps->regmap);
	306	dev_err(&client->dev, "regmap init failed, err %d\n", ret);
	307	return ret;
	308	}
	309	i2c_set_clientdata(client, tps);
	310
	311	ret = tps51632_init_dcdc(tps, pdata);
	312	if (ret < 0) {
	313	dev_err(tps->dev, "Init failed, err = %d\n", ret);
	314	return ret;
	315	}
	316
	317	/* Register the regulators */
	318	config.dev = &client->dev;
	319	config.init_data = pdata->reg_init_data;
	320	config.driver_data = tps;
	321	config.regmap = tps->regmap;
	322	config.of_node = client->dev.of_node;
	323
	324	rdev = regulator_register(&tps->desc, &config);
	325	if (IS_ERR(rdev)) {
	326	dev_err(tps->dev, "regulator register failed\n");
	327	return PTR_ERR(rdev);
	328	}
	329
	330	tps->rdev = rdev;
	331	return 0;
	332	}
	333
8dc995f5	334	static int tps51632_remove(struct i2c_client *client)
0c570674 LD	335	{
	336	struct tps51632_chip *tps = i2c_get_clientdata(client);
	337
	338	regulator_unregister(tps->rdev);
	339	return 0;
	340	}
	341
	342	static const struct i2c_device_id tps51632_id[] = {
	343	{.name = "tps51632",},
	344	{},
	345	};
	346
	347	MODULE_DEVICE_TABLE(i2c, tps51632_id);
	348
	349	static struct i2c_driver tps51632_i2c_driver = {
	350	.driver = {
	351	.name = "tps51632",
	352	.owner = THIS_MODULE,
	353	},
	354	.probe = tps51632_probe,
5eb9f2b9	355	.remove = tps51632_remove,
0c570674 LD	356	.id_table = tps51632_id,
	357	};
	358
	359	static int __init tps51632_init(void)
	360	{
	361	return i2c_add_driver(&tps51632_i2c_driver);
	362	}
	363	subsys_initcall(tps51632_init);
	364
	365	static void __exit tps51632_cleanup(void)
	366	{
	367	i2c_del_driver(&tps51632_i2c_driver);
	368	}
	369	module_exit(tps51632_cleanup);
	370
	371	MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
	372	MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
	373	MODULE_LICENSE("GPL v2");