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e634cf4e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0c570674 LD |
2 | /* |
3 | * tps51632-regulator.c -- TI TPS51632 | |
4 | * | |
5 | * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless | |
6 | * Controller with serial VID control and DVFS. | |
7 | * | |
8 | * Copyright (c) 2012, NVIDIA Corporation. | |
9 | * | |
10 | * Author: Laxman Dewangan <ldewangan@nvidia.com> | |
0c570674 LD |
11 | */ |
12 | ||
13 | #include <linux/err.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
c51ce403 LD |
18 | #include <linux/of.h> |
19 | #include <linux/of_device.h> | |
0c570674 LD |
20 | #include <linux/platform_device.h> |
21 | #include <linux/regmap.h> | |
22 | #include <linux/regulator/driver.h> | |
23 | #include <linux/regulator/machine.h> | |
c51ce403 | 24 | #include <linux/regulator/of_regulator.h> |
0c570674 LD |
25 | #include <linux/regulator/tps51632-regulator.h> |
26 | #include <linux/slab.h> | |
27 | ||
28 | /* Register definitions */ | |
29 | #define TPS51632_VOLTAGE_SELECT_REG 0x0 | |
30 | #define TPS51632_VOLTAGE_BASE_REG 0x1 | |
31 | #define TPS51632_OFFSET_REG 0x2 | |
32 | #define TPS51632_IMON_REG 0x3 | |
33 | #define TPS51632_VMAX_REG 0x4 | |
34 | #define TPS51632_DVFS_CONTROL_REG 0x5 | |
35 | #define TPS51632_POWER_STATE_REG 0x6 | |
36 | #define TPS51632_SLEW_REGS 0x7 | |
37 | #define TPS51632_FAULT_REG 0x14 | |
38 | ||
39 | #define TPS51632_MAX_REG 0x15 | |
40 | ||
41 | #define TPS51632_VOUT_MASK 0x7F | |
42 | #define TPS51632_VOUT_OFFSET_MASK 0x1F | |
43 | #define TPS51632_VMAX_MASK 0x7F | |
44 | #define TPS51632_VMAX_LOCK 0x80 | |
45 | ||
46 | /* TPS51632_DVFS_CONTROL_REG */ | |
47 | #define TPS51632_DVFS_PWMEN 0x1 | |
48 | #define TPS51632_DVFS_STEP_20 0x2 | |
49 | #define TPS51632_DVFS_VMAX_PG 0x4 | |
50 | #define TPS51632_DVFS_PWMRST 0x8 | |
51 | #define TPS51632_DVFS_OCA_EN 0x10 | |
52 | #define TPS51632_DVFS_FCCM 0x20 | |
53 | ||
54 | /* TPS51632_POWER_STATE_REG */ | |
55 | #define TPS51632_POWER_STATE_MASK 0x03 | |
56 | #define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0 | |
57 | #define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1 | |
58 | #define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2 | |
59 | ||
9d9339d3 FE |
60 | #define TPS51632_MIN_VOLTAGE 500000 |
61 | #define TPS51632_MAX_VOLTAGE 1520000 | |
62 | #define TPS51632_VOLTAGE_STEP_10mV 10000 | |
63 | #define TPS51632_VOLTAGE_STEP_20mV 20000 | |
0c570674 LD |
64 | #define TPS51632_MAX_VSEL 0x7F |
65 | #define TPS51632_MIN_VSEL 0x19 | |
66 | #define TPS51632_DEFAULT_RAMP_DELAY 6000 | |
67 | #define TPS51632_VOLT_VSEL(uV) \ | |
9d9339d3 FE |
68 | (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \ |
69 | TPS51632_VOLTAGE_STEP_10mV) + \ | |
0c570674 LD |
70 | TPS51632_MIN_VSEL) |
71 | ||
72 | /* TPS51632 chip information */ | |
73 | struct tps51632_chip { | |
74 | struct device *dev; | |
75 | struct regulator_desc desc; | |
76 | struct regulator_dev *rdev; | |
77 | struct regmap *regmap; | |
0c570674 LD |
78 | }; |
79 | ||
0c570674 LD |
80 | static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev, |
81 | int ramp_delay) | |
82 | { | |
83 | struct tps51632_chip *tps = rdev_get_drvdata(rdev); | |
c714a588 | 84 | int bit; |
0c570674 LD |
85 | int ret; |
86 | ||
c714a588 AL |
87 | if (ramp_delay == 0) |
88 | bit = 0; | |
89 | else | |
90 | bit = DIV_ROUND_UP(ramp_delay, 6000) - 1; | |
91 | ||
0c570674 LD |
92 | ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit)); |
93 | if (ret < 0) | |
94 | dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret); | |
95 | return ret; | |
96 | } | |
97 | ||
dcb97c10 | 98 | static const struct regulator_ops tps51632_dcdc_ops = { |
d94d9aca AL |
99 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
100 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
0c570674 LD |
101 | .list_voltage = regulator_list_voltage_linear, |
102 | .set_voltage_time_sel = regulator_set_voltage_time_sel, | |
103 | .set_ramp_delay = tps51632_dcdc_set_ramp_delay, | |
104 | }; | |
105 | ||
a5023574 | 106 | static int tps51632_init_dcdc(struct tps51632_chip *tps, |
0c570674 LD |
107 | struct tps51632_regulator_platform_data *pdata) |
108 | { | |
109 | int ret; | |
110 | uint8_t control = 0; | |
111 | int vsel; | |
112 | ||
113 | if (!pdata->enable_pwm_dvfs) | |
114 | goto skip_pwm_config; | |
115 | ||
116 | control |= TPS51632_DVFS_PWMEN; | |
0c570674 LD |
117 | vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV); |
118 | ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel); | |
119 | if (ret < 0) { | |
120 | dev_err(tps->dev, "BASE reg write failed, err %d\n", ret); | |
121 | return ret; | |
122 | } | |
123 | ||
124 | if (pdata->dvfs_step_20mV) | |
125 | control |= TPS51632_DVFS_STEP_20; | |
126 | ||
127 | if (pdata->max_voltage_uV) { | |
128 | unsigned int vmax; | |
129 | /** | |
130 | * TPS51632 hw behavior: VMAX register can be write only | |
131 | * once as it get locked after first write. The lock get | |
132 | * reset only when device is power-reset. | |
133 | * Write register only when lock bit is not enabled. | |
134 | */ | |
135 | ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax); | |
136 | if (ret < 0) { | |
137 | dev_err(tps->dev, "VMAX read failed, err %d\n", ret); | |
138 | return ret; | |
139 | } | |
140 | if (!(vmax & TPS51632_VMAX_LOCK)) { | |
141 | vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV); | |
142 | ret = regmap_write(tps->regmap, TPS51632_VMAX_REG, | |
143 | vsel); | |
144 | if (ret < 0) { | |
145 | dev_err(tps->dev, | |
146 | "VMAX write failed, err %d\n", ret); | |
147 | return ret; | |
148 | } | |
149 | } | |
150 | } | |
151 | ||
152 | skip_pwm_config: | |
153 | ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control); | |
154 | if (ret < 0) | |
155 | dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret); | |
156 | return ret; | |
157 | } | |
158 | ||
faa3b2d5 | 159 | static bool is_volatile_reg(struct device *dev, unsigned int reg) |
0c570674 | 160 | { |
faa3b2d5 LD |
161 | switch (reg) { |
162 | case TPS51632_OFFSET_REG: | |
163 | case TPS51632_FAULT_REG: | |
164 | case TPS51632_IMON_REG: | |
165 | return true; | |
166 | default: | |
0c570674 | 167 | return false; |
faa3b2d5 LD |
168 | } |
169 | } | |
170 | ||
171 | static bool is_read_reg(struct device *dev, unsigned int reg) | |
172 | { | |
173 | switch (reg) { | |
174 | case 0x08 ... 0x0F: | |
175 | return false; | |
176 | default: | |
177 | return true; | |
178 | } | |
179 | } | |
180 | ||
181 | static bool is_write_reg(struct device *dev, unsigned int reg) | |
182 | { | |
183 | switch (reg) { | |
184 | case TPS51632_VOLTAGE_SELECT_REG: | |
185 | case TPS51632_VOLTAGE_BASE_REG: | |
186 | case TPS51632_VMAX_REG: | |
187 | case TPS51632_DVFS_CONTROL_REG: | |
188 | case TPS51632_POWER_STATE_REG: | |
189 | case TPS51632_SLEW_REGS: | |
190 | return true; | |
191 | default: | |
192 | return false; | |
193 | } | |
0c570674 LD |
194 | } |
195 | ||
196 | static const struct regmap_config tps51632_regmap_config = { | |
197 | .reg_bits = 8, | |
198 | .val_bits = 8, | |
faa3b2d5 LD |
199 | .writeable_reg = is_write_reg, |
200 | .readable_reg = is_read_reg, | |
201 | .volatile_reg = is_volatile_reg, | |
0c570674 LD |
202 | .max_register = TPS51632_MAX_REG - 1, |
203 | .cache_type = REGCACHE_RBTREE, | |
204 | }; | |
205 | ||
c51ce403 LD |
206 | #if defined(CONFIG_OF) |
207 | static const struct of_device_id tps51632_of_match[] = { | |
208 | { .compatible = "ti,tps51632",}, | |
209 | {}, | |
210 | }; | |
211 | MODULE_DEVICE_TABLE(of, tps51632_of_match); | |
212 | ||
213 | static struct tps51632_regulator_platform_data * | |
072e78b1 JMC |
214 | of_get_tps51632_platform_data(struct device *dev, |
215 | const struct regulator_desc *desc) | |
c51ce403 LD |
216 | { |
217 | struct tps51632_regulator_platform_data *pdata; | |
218 | struct device_node *np = dev->of_node; | |
219 | ||
220 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
ef4bcf88 | 221 | if (!pdata) |
c51ce403 | 222 | return NULL; |
c51ce403 | 223 | |
072e78b1 JMC |
224 | pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node, |
225 | desc); | |
c51ce403 LD |
226 | if (!pdata->reg_init_data) { |
227 | dev_err(dev, "Not able to get OF regulator init data\n"); | |
228 | return NULL; | |
229 | } | |
230 | ||
231 | pdata->enable_pwm_dvfs = | |
232 | of_property_read_bool(np, "ti,enable-pwm-dvfs"); | |
233 | pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV"); | |
234 | ||
235 | pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? : | |
9d9339d3 | 236 | TPS51632_MIN_VOLTAGE; |
c51ce403 | 237 | pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? : |
9d9339d3 | 238 | TPS51632_MAX_VOLTAGE; |
c51ce403 LD |
239 | return pdata; |
240 | } | |
241 | #else | |
242 | static struct tps51632_regulator_platform_data * | |
072e78b1 JMC |
243 | of_get_tps51632_platform_data(struct device *dev, |
244 | const struct regulator_desc *desc) | |
c51ce403 LD |
245 | { |
246 | return NULL; | |
247 | } | |
248 | #endif | |
249 | ||
d4885f30 | 250 | static int tps51632_probe(struct i2c_client *client) |
0c570674 LD |
251 | { |
252 | struct tps51632_regulator_platform_data *pdata; | |
253 | struct regulator_dev *rdev; | |
254 | struct tps51632_chip *tps; | |
255 | int ret; | |
256 | struct regulator_config config = { }; | |
257 | ||
c51ce403 LD |
258 | if (client->dev.of_node) { |
259 | const struct of_device_id *match; | |
260 | match = of_match_device(of_match_ptr(tps51632_of_match), | |
261 | &client->dev); | |
262 | if (!match) { | |
263 | dev_err(&client->dev, "Error: No device match found\n"); | |
264 | return -ENODEV; | |
265 | } | |
266 | } | |
267 | ||
072e78b1 JMC |
268 | tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); |
269 | if (!tps) | |
270 | return -ENOMEM; | |
271 | ||
272 | tps->dev = &client->dev; | |
273 | tps->desc.name = client->name; | |
274 | tps->desc.id = 0; | |
275 | tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY; | |
276 | tps->desc.min_uV = TPS51632_MIN_VOLTAGE; | |
277 | tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV; | |
278 | tps->desc.linear_min_sel = TPS51632_MIN_VSEL; | |
279 | tps->desc.n_voltages = TPS51632_MAX_VSEL + 1; | |
280 | tps->desc.ops = &tps51632_dcdc_ops; | |
281 | tps->desc.type = REGULATOR_VOLTAGE; | |
282 | tps->desc.owner = THIS_MODULE; | |
283 | ||
dff91d0b | 284 | pdata = dev_get_platdata(&client->dev); |
c51ce403 | 285 | if (!pdata && client->dev.of_node) |
072e78b1 | 286 | pdata = of_get_tps51632_platform_data(&client->dev, &tps->desc); |
0c570674 LD |
287 | if (!pdata) { |
288 | dev_err(&client->dev, "No Platform data\n"); | |
289 | return -EINVAL; | |
290 | } | |
291 | ||
dbc70518 | 292 | if (pdata->enable_pwm_dvfs) { |
9d9339d3 FE |
293 | if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) || |
294 | (pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) { | |
dbc70518 AL |
295 | dev_err(&client->dev, "Invalid base_voltage_uV setting\n"); |
296 | return -EINVAL; | |
297 | } | |
298 | ||
299 | if ((pdata->max_voltage_uV) && | |
9d9339d3 FE |
300 | ((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) || |
301 | (pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) { | |
dbc70518 AL |
302 | dev_err(&client->dev, "Invalid max_voltage_uV setting\n"); |
303 | return -EINVAL; | |
304 | } | |
305 | } | |
306 | ||
d94d9aca AL |
307 | if (pdata->enable_pwm_dvfs) |
308 | tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG; | |
309 | else | |
310 | tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG; | |
311 | tps->desc.vsel_mask = TPS51632_VOUT_MASK; | |
312 | ||
0c570674 LD |
313 | tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config); |
314 | if (IS_ERR(tps->regmap)) { | |
315 | ret = PTR_ERR(tps->regmap); | |
316 | dev_err(&client->dev, "regmap init failed, err %d\n", ret); | |
317 | return ret; | |
318 | } | |
319 | i2c_set_clientdata(client, tps); | |
320 | ||
321 | ret = tps51632_init_dcdc(tps, pdata); | |
322 | if (ret < 0) { | |
323 | dev_err(tps->dev, "Init failed, err = %d\n", ret); | |
324 | return ret; | |
325 | } | |
326 | ||
327 | /* Register the regulators */ | |
328 | config.dev = &client->dev; | |
329 | config.init_data = pdata->reg_init_data; | |
330 | config.driver_data = tps; | |
331 | config.regmap = tps->regmap; | |
332 | config.of_node = client->dev.of_node; | |
333 | ||
1084081d | 334 | rdev = devm_regulator_register(&client->dev, &tps->desc, &config); |
0c570674 LD |
335 | if (IS_ERR(rdev)) { |
336 | dev_err(tps->dev, "regulator register failed\n"); | |
337 | return PTR_ERR(rdev); | |
338 | } | |
339 | ||
340 | tps->rdev = rdev; | |
341 | return 0; | |
342 | } | |
343 | ||
0c570674 LD |
344 | static const struct i2c_device_id tps51632_id[] = { |
345 | {.name = "tps51632",}, | |
346 | {}, | |
347 | }; | |
348 | ||
349 | MODULE_DEVICE_TABLE(i2c, tps51632_id); | |
350 | ||
351 | static struct i2c_driver tps51632_i2c_driver = { | |
352 | .driver = { | |
353 | .name = "tps51632", | |
259b93b2 | 354 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
c51ce403 | 355 | .of_match_table = of_match_ptr(tps51632_of_match), |
0c570674 | 356 | }, |
964e1865 | 357 | .probe = tps51632_probe, |
0c570674 LD |
358 | .id_table = tps51632_id, |
359 | }; | |
360 | ||
361 | static int __init tps51632_init(void) | |
362 | { | |
363 | return i2c_add_driver(&tps51632_i2c_driver); | |
364 | } | |
365 | subsys_initcall(tps51632_init); | |
366 | ||
367 | static void __exit tps51632_cleanup(void) | |
368 | { | |
369 | i2c_del_driver(&tps51632_i2c_driver); | |
370 | } | |
371 | module_exit(tps51632_cleanup); | |
372 | ||
373 | MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); | |
374 | MODULE_DESCRIPTION("TPS51632 voltage regulator driver"); | |
375 | MODULE_LICENSE("GPL v2"); |