[linux-2.6-block.git] / drivers / regulator / stm32-vrefbuf.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) STMicroelectronics 2017
 *
 * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/of_regulator.h>
#include <linux/pm_runtime.h>

/* STM32 VREFBUF registers */
#define STM32_VREFBUF_CSR		0x00

/* STM32 VREFBUF CSR bitfields */
#define STM32_VRS			GENMASK(6, 4)
#define STM32_VRR			BIT(3)
#define STM32_HIZ			BIT(1)
#define STM32_ENVR			BIT(0)

#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS	10

struct stm32_vrefbuf {
	void __iomem *base;
	struct clk *clk;
	struct device *dev;
};

static const unsigned int stm32_vrefbuf_voltages[] = {
	/* Matches resp. VRS = 000b, 001b, 010b, 011b */
	2500000, 2048000, 1800000, 1500000,
};

static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
{
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	u32 val;
	int ret;

	ret = pm_runtime_get_sync(priv->dev);
	if (ret < 0) {
		pm_runtime_put_noidle(priv->dev);
		return ret;
	}

	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	val = (val & ~STM32_HIZ) | STM32_ENVR;
	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);

	/*
	 * Vrefbuf startup time depends on external capacitor: wait here for
	 * VRR to be set. That means output has reached expected value.
	 * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
	 * arbitrary timeout.
	 */
	ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
				 val & STM32_VRR, 650, 10000);
	if (ret) {
		dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n");
		val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
		val = (val & ~STM32_ENVR) | STM32_HIZ;
		writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
	}

	pm_runtime_mark_last_busy(priv->dev);
	pm_runtime_put_autosuspend(priv->dev);

	return ret;
}

static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
{
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	u32 val;
	int ret;

	ret = pm_runtime_get_sync(priv->dev);
	if (ret < 0) {
		pm_runtime_put_noidle(priv->dev);
		return ret;
	}

	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	val &= ~STM32_ENVR;
	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);

	pm_runtime_mark_last_busy(priv->dev);
	pm_runtime_put_autosuspend(priv->dev);

	return 0;
}

static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
{
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	int ret;

	ret = pm_runtime_get_sync(priv->dev);
	if (ret < 0) {
		pm_runtime_put_noidle(priv->dev);
		return ret;
	}

	ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;

	pm_runtime_mark_last_busy(priv->dev);
	pm_runtime_put_autosuspend(priv->dev);

	return ret;
}

static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
					 unsigned sel)
{
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	u32 val;
	int ret;

	ret = pm_runtime_get_sync(priv->dev);
	if (ret < 0) {
		pm_runtime_put_noidle(priv->dev);
		return ret;
	}

	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);
	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);

	pm_runtime_mark_last_busy(priv->dev);
	pm_runtime_put_autosuspend(priv->dev);

	return 0;
}

static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
{
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	u32 val;
	int ret;

	ret = pm_runtime_get_sync(priv->dev);
	if (ret < 0) {
		pm_runtime_put_noidle(priv->dev);
		return ret;
	}

	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	ret = FIELD_GET(STM32_VRS, val);

	pm_runtime_mark_last_busy(priv->dev);
	pm_runtime_put_autosuspend(priv->dev);

	return ret;
}

static const struct regulator_ops stm32_vrefbuf_volt_ops = {
	.enable		= stm32_vrefbuf_enable,
	.disable	= stm32_vrefbuf_disable,
	.is_enabled	= stm32_vrefbuf_is_enabled,
	.get_voltage_sel = stm32_vrefbuf_get_voltage_sel,
	.set_voltage_sel = stm32_vrefbuf_set_voltage_sel,
	.list_voltage	= regulator_list_voltage_table,
};

static const struct regulator_desc stm32_vrefbuf_regu = {
	.name = "vref",
	.supply_name = "vdda",
	.volt_table = stm32_vrefbuf_voltages,
	.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
	.ops = &stm32_vrefbuf_volt_ops,
	.off_on_delay = 1000,
	.type = REGULATOR_VOLTAGE,
	.owner = THIS_MODULE,
};

static int stm32_vrefbuf_probe(struct platform_device *pdev)
{
	struct stm32_vrefbuf *priv;
	struct regulator_config config = { };
	struct regulator_dev *rdev;
	int ret;

	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;
	priv->dev = &pdev->dev;

	priv->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(priv->base))
		return PTR_ERR(priv->base);

	priv->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(priv->clk))
		return PTR_ERR(priv->clk);

	pm_runtime_get_noresume(&pdev->dev);
	pm_runtime_set_active(&pdev->dev);
	pm_runtime_set_autosuspend_delay(&pdev->dev,
					 STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
	pm_runtime_use_autosuspend(&pdev->dev);
	pm_runtime_enable(&pdev->dev);

	ret = clk_prepare_enable(priv->clk);
	if (ret) {
		dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
		goto err_pm_stop;
	}

	config.dev = &pdev->dev;
	config.driver_data = priv;
	config.of_node = pdev->dev.of_node;
	config.init_data = of_get_regulator_init_data(&pdev->dev,
						      pdev->dev.of_node,
						      &stm32_vrefbuf_regu);

	rdev = regulator_register(&stm32_vrefbuf_regu, &config);
	if (IS_ERR(rdev)) {
		ret = PTR_ERR(rdev);
		dev_err(&pdev->dev, "register failed with error %d\n", ret);
		goto err_clk_dis;
	}
	platform_set_drvdata(pdev, rdev);

	pm_runtime_mark_last_busy(&pdev->dev);
	pm_runtime_put_autosuspend(&pdev->dev);

	return 0;

err_clk_dis:
	clk_disable_unprepare(priv->clk);
err_pm_stop:
	pm_runtime_disable(&pdev->dev);
	pm_runtime_set_suspended(&pdev->dev);
	pm_runtime_put_noidle(&pdev->dev);

	return ret;
}

static int stm32_vrefbuf_remove(struct platform_device *pdev)
{
	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);

	pm_runtime_get_sync(&pdev->dev);
	regulator_unregister(rdev);
	clk_disable_unprepare(priv->clk);
	pm_runtime_disable(&pdev->dev);
	pm_runtime_set_suspended(&pdev->dev);
	pm_runtime_put_noidle(&pdev->dev);

	return 0;
};

static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
{
	struct regulator_dev *rdev = dev_get_drvdata(dev);
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);

	clk_disable_unprepare(priv->clk);

	return 0;
}

static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
{
	struct regulator_dev *rdev = dev_get_drvdata(dev);
	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);

	return clk_prepare_enable(priv->clk);
}

static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
				pm_runtime_force_resume)
	SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
			   stm32_vrefbuf_runtime_resume,
			   NULL)
};

static const struct of_device_id stm32_vrefbuf_of_match[] = {
	{ .compatible = "st,stm32-vrefbuf", },
	{},
};
MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match);

static struct platform_driver stm32_vrefbuf_driver = {
	.probe = stm32_vrefbuf_probe,
	.remove = stm32_vrefbuf_remove,
	.driver = {
		.name  = "stm32-vrefbuf",
		.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
		.pm = &stm32_vrefbuf_pm_ops,
	},
};
module_platform_driver(stm32_vrefbuf_driver);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver");
MODULE_ALIAS("platform:stm32-vrefbuf");
Commit	Line	Data
af873fce	1	// SPDX-License-Identifier: GPL-2.0-only
0cdbf481 FG	2	/*
	3	* Copyright (C) STMicroelectronics 2017
	4	*
	5	* Author: Fabrice Gasnier <fabrice.gasnier@st.com>
0cdbf481 FG	6	*/
	7
	8	#include <linux/bitfield.h>
	9	#include <linux/clk.h>
	10	#include <linux/io.h>
	11	#include <linux/iopoll.h>
	12	#include <linux/module.h>
	13	#include <linux/of_device.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/regulator/driver.h>
	16	#include <linux/regulator/of_regulator.h>
be5295f8	17	#include <linux/pm_runtime.h>
0cdbf481 FG	18
	19	/* STM32 VREFBUF registers */
	20	#define STM32_VREFBUF_CSR 0x00
	21
	22	/* STM32 VREFBUF CSR bitfields */
	23	#define STM32_VRS GENMASK(6, 4)
	24	#define STM32_VRR BIT(3)
	25	#define STM32_HIZ BIT(1)
	26	#define STM32_ENVR BIT(0)
	27
be5295f8 FG	28	#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10
be5295f8 FG	29
0cdbf481 FG	30	struct stm32_vrefbuf {
	31	void __iomem *base;
	32	struct clk *clk;
be5295f8	33	struct device *dev;
0cdbf481 FG	34	};
	35
	36	static const unsigned int stm32_vrefbuf_voltages[] = {
	37	/* Matches resp. VRS = 000b, 001b, 010b, 011b */
	38	2500000, 2048000, 1800000, 1500000,
	39	};
	40
	41	static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
	42	{
	43	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
be5295f8	44	u32 val;
0cdbf481 FG	45	int ret;
0cdbf481 FG	46
be5295f8 FG	47	ret = pm_runtime_get_sync(priv->dev);
	48	if (ret < 0) {
	49	pm_runtime_put_noidle(priv->dev);
	50	return ret;
	51	}
	52
	53	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
0cdbf481 FG	54	val = (val & ~STM32_HIZ) \| STM32_ENVR;
	55	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
	56
	57	/*
	58	* Vrefbuf startup time depends on external capacitor: wait here for
	59	* VRR to be set. That means output has reached expected value.
	60	* ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
	61	* arbitrary timeout.
	62	*/
	63	ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
f63248fa	64	val & STM32_VRR, 650, 10000);
0cdbf481 FG	65	if (ret) {
	66	dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n");
	67	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	68	val = (val & ~STM32_ENVR) \| STM32_HIZ;
	69	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
	70	}
	71
be5295f8 FG	72	pm_runtime_mark_last_busy(priv->dev);
	73	pm_runtime_put_autosuspend(priv->dev);
	74
0cdbf481 FG	75	return ret;
	76	}
	77
	78	static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
	79	{
	80	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
be5295f8 FG	81	u32 val;
be5295f8 FG	82	int ret;
0cdbf481	83
be5295f8 FG	84	ret = pm_runtime_get_sync(priv->dev);
	85	if (ret < 0) {
	86	pm_runtime_put_noidle(priv->dev);
	87	return ret;
	88	}
	89
	90	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
02fbabd5	91	val &= ~STM32_ENVR;
0cdbf481 FG	92	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
0cdbf481 FG	93
be5295f8 FG	94	pm_runtime_mark_last_busy(priv->dev);
	95	pm_runtime_put_autosuspend(priv->dev);
	96
0cdbf481 FG	97	return 0;
	98	}
	99
	100	static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
	101	{
	102	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
be5295f8 FG	103	int ret;
	104
	105	ret = pm_runtime_get_sync(priv->dev);
	106	if (ret < 0) {
	107	pm_runtime_put_noidle(priv->dev);
	108	return ret;
	109	}
	110
	111	ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
0cdbf481	112
be5295f8 FG	113	pm_runtime_mark_last_busy(priv->dev);
	114	pm_runtime_put_autosuspend(priv->dev);
	115
	116	return ret;
0cdbf481 FG	117	}
	118
	119	static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
	120	unsigned sel)
	121	{
	122	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
be5295f8 FG	123	u32 val;
be5295f8 FG	124	int ret;
0cdbf481	125
be5295f8 FG	126	ret = pm_runtime_get_sync(priv->dev);
	127	if (ret < 0) {
	128	pm_runtime_put_noidle(priv->dev);
	129	return ret;
	130	}
	131
	132	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
0cdbf481 FG	133	val = (val & ~STM32_VRS) \| FIELD_PREP(STM32_VRS, sel);
	134	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
	135
be5295f8 FG	136	pm_runtime_mark_last_busy(priv->dev);
	137	pm_runtime_put_autosuspend(priv->dev);
	138
0cdbf481 FG	139	return 0;
	140	}
	141
	142	static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
	143	{
	144	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
be5295f8 FG	145	u32 val;
be5295f8 FG	146	int ret;
0cdbf481	147
be5295f8 FG	148	ret = pm_runtime_get_sync(priv->dev);
	149	if (ret < 0) {
	150	pm_runtime_put_noidle(priv->dev);
	151	return ret;
	152	}
	153
	154	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
	155	ret = FIELD_GET(STM32_VRS, val);
	156
	157	pm_runtime_mark_last_busy(priv->dev);
	158	pm_runtime_put_autosuspend(priv->dev);
	159
	160	return ret;
0cdbf481 FG	161	}
	162
	163	static const struct regulator_ops stm32_vrefbuf_volt_ops = {
	164	.enable = stm32_vrefbuf_enable,
	165	.disable = stm32_vrefbuf_disable,
	166	.is_enabled = stm32_vrefbuf_is_enabled,
	167	.get_voltage_sel = stm32_vrefbuf_get_voltage_sel,
	168	.set_voltage_sel = stm32_vrefbuf_set_voltage_sel,
	169	.list_voltage = regulator_list_voltage_table,
	170	};
	171
	172	static const struct regulator_desc stm32_vrefbuf_regu = {
	173	.name = "vref",
	174	.supply_name = "vdda",
	175	.volt_table = stm32_vrefbuf_voltages,
	176	.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
	177	.ops = &stm32_vrefbuf_volt_ops,
02fbabd5	178	.off_on_delay = 1000,
0cdbf481 FG	179	.type = REGULATOR_VOLTAGE,
	180	.owner = THIS_MODULE,
	181	};
	182
	183	static int stm32_vrefbuf_probe(struct platform_device *pdev)
	184	{
0cdbf481 FG	185	struct stm32_vrefbuf *priv;
	186	struct regulator_config config = { };
	187	struct regulator_dev *rdev;
	188	int ret;
	189
	190	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
	191	if (!priv)
	192	return -ENOMEM;
be5295f8	193	priv->dev = &pdev->dev;
0cdbf481	194
73511a90	195	priv->base = devm_platform_ioremap_resource(pdev, 0);
0cdbf481 FG	196	if (IS_ERR(priv->base))
	197	return PTR_ERR(priv->base);
	198
	199	priv->clk = devm_clk_get(&pdev->dev, NULL);
	200	if (IS_ERR(priv->clk))
	201	return PTR_ERR(priv->clk);
	202
be5295f8 FG	203	pm_runtime_get_noresume(&pdev->dev);
	204	pm_runtime_set_active(&pdev->dev);
	205	pm_runtime_set_autosuspend_delay(&pdev->dev,
	206	STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
	207	pm_runtime_use_autosuspend(&pdev->dev);
	208	pm_runtime_enable(&pdev->dev);
	209
0cdbf481 FG	210	ret = clk_prepare_enable(priv->clk);
	211	if (ret) {
	212	dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
be5295f8	213	goto err_pm_stop;
0cdbf481 FG	214	}
	215
	216	config.dev = &pdev->dev;
	217	config.driver_data = priv;
	218	config.of_node = pdev->dev.of_node;
	219	config.init_data = of_get_regulator_init_data(&pdev->dev,
	220	pdev->dev.of_node,
	221	&stm32_vrefbuf_regu);
	222
	223	rdev = regulator_register(&stm32_vrefbuf_regu, &config);
	224	if (IS_ERR(rdev)) {
	225	ret = PTR_ERR(rdev);
	226	dev_err(&pdev->dev, "register failed with error %d\n", ret);
	227	goto err_clk_dis;
	228	}
	229	platform_set_drvdata(pdev, rdev);
	230
be5295f8 FG	231	pm_runtime_mark_last_busy(&pdev->dev);
	232	pm_runtime_put_autosuspend(&pdev->dev);
	233
0cdbf481 FG	234	return 0;
	235
	236	err_clk_dis:
	237	clk_disable_unprepare(priv->clk);
be5295f8 FG	238	err_pm_stop:
	239	pm_runtime_disable(&pdev->dev);
	240	pm_runtime_set_suspended(&pdev->dev);
	241	pm_runtime_put_noidle(&pdev->dev);
0cdbf481 FG	242
	243	return ret;
	244	}
	245
	246	static int stm32_vrefbuf_remove(struct platform_device *pdev)
	247	{
	248	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	249	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	250
be5295f8	251	pm_runtime_get_sync(&pdev->dev);
0cdbf481 FG	252	regulator_unregister(rdev);
0cdbf481 FG	253	clk_disable_unprepare(priv->clk);
be5295f8 FG	254	pm_runtime_disable(&pdev->dev);
	255	pm_runtime_set_suspended(&pdev->dev);
	256	pm_runtime_put_noidle(&pdev->dev);
0cdbf481 FG	257
	258	return 0;
	259	};
	260
be5295f8 FG	261	static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
	262	{
	263	struct regulator_dev *rdev = dev_get_drvdata(dev);
	264	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	265
	266	clk_disable_unprepare(priv->clk);
	267
	268	return 0;
	269	}
	270
	271	static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
	272	{
	273	struct regulator_dev *rdev = dev_get_drvdata(dev);
	274	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
	275
	276	return clk_prepare_enable(priv->clk);
	277	}
	278
	279	static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
	280	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
	281	pm_runtime_force_resume)
	282	SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
	283	stm32_vrefbuf_runtime_resume,
	284	NULL)
	285	};
	286
0cdbf481 FG	287	static const struct of_device_id stm32_vrefbuf_of_match[] = {
	288	{ .compatible = "st,stm32-vrefbuf", },
	289	{},
	290	};
	291	MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match);
	292
	293	static struct platform_driver stm32_vrefbuf_driver = {
	294	.probe = stm32_vrefbuf_probe,
	295	.remove = stm32_vrefbuf_remove,
	296	.driver = {
	297	.name = "stm32-vrefbuf",
	298	.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
be5295f8	299	.pm = &stm32_vrefbuf_pm_ops,
0cdbf481 FG	300	},
	301	};
	302	module_platform_driver(stm32_vrefbuf_driver);
	303
	304	MODULE_LICENSE("GPL v2");
	305	MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
	306	MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver");
	307	MODULE_ALIAS("platform:stm32-vrefbuf");