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2cd64ae3 CZ |
1 | /* |
2 | * Regulator driver for Rockchip RK808 | |
3 | * | |
4 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
5 | * | |
6 | * Author: Chris Zhong <zyw@rock-chips.com> | |
7 | * Author: Zhang Qing <zhangqing@rock-chips.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms and conditions of the GNU General Public License, | |
11 | * version 2, as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope it will be useful, but WITHOUT | |
14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
16 | * more details. | |
2cd64ae3 CZ |
17 | */ |
18 | ||
bad47ad2 CZ |
19 | #include <linux/delay.h> |
20 | #include <linux/gpio.h> | |
2cd64ae3 | 21 | #include <linux/i2c.h> |
bad47ad2 | 22 | #include <linux/module.h> |
2cd64ae3 | 23 | #include <linux/of_device.h> |
bad47ad2 CZ |
24 | #include <linux/of_gpio.h> |
25 | #include <linux/mfd/rk808.h> | |
2cd64ae3 CZ |
26 | #include <linux/regulator/driver.h> |
27 | #include <linux/regulator/of_regulator.h> | |
604d4994 | 28 | #include <linux/gpio/consumer.h> |
571a4010 CZ |
29 | |
30 | /* Field Definitions */ | |
2cd64ae3 CZ |
31 | #define RK808_BUCK_VSEL_MASK 0x3f |
32 | #define RK808_BUCK4_VSEL_MASK 0xf | |
33 | #define RK808_LDO_VSEL_MASK 0x1f | |
34 | ||
8af25227 DA |
35 | /* Ramp rate definitions for buck1 / buck2 only */ |
36 | #define RK808_RAMP_RATE_OFFSET 3 | |
37 | #define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET) | |
38 | #define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET) | |
39 | #define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET) | |
40 | #define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET) | |
41 | #define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET) | |
42 | ||
bad47ad2 CZ |
43 | #define RK808_DVS2_POL BIT(2) |
44 | #define RK808_DVS1_POL BIT(1) | |
45 | ||
251ce318 CZ |
46 | /* Offset from XXX_ON_VSEL to XXX_SLP_VSEL */ |
47 | #define RK808_SLP_REG_OFFSET 1 | |
48 | ||
bad47ad2 CZ |
49 | /* Offset from XXX_ON_VSEL to XXX_DVS_VSEL */ |
50 | #define RK808_DVS_REG_OFFSET 2 | |
51 | ||
251ce318 CZ |
52 | /* Offset from XXX_EN_REG to SLEEP_SET_OFF_XXX */ |
53 | #define RK808_SLP_SET_OFF_REG_OFFSET 2 | |
54 | ||
bad47ad2 CZ |
55 | /* max steps for increase voltage of Buck1/2, equal 100mv*/ |
56 | #define MAX_STEPS_ONE_TIME 8 | |
57 | ||
58 | struct rk808_regulator_data { | |
59 | struct gpio_desc *dvs_gpio[2]; | |
60 | }; | |
61 | ||
8af25227 DA |
62 | static const int rk808_buck_config_regs[] = { |
63 | RK808_BUCK1_CONFIG_REG, | |
64 | RK808_BUCK2_CONFIG_REG, | |
65 | RK808_BUCK3_CONFIG_REG, | |
66 | RK808_BUCK4_CONFIG_REG, | |
67 | }; | |
68 | ||
2cd64ae3 CZ |
69 | static const struct regulator_linear_range rk808_ldo3_voltage_ranges[] = { |
70 | REGULATOR_LINEAR_RANGE(800000, 0, 13, 100000), | |
71 | REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0), | |
72 | }; | |
73 | ||
bad47ad2 CZ |
74 | static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) |
75 | { | |
76 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
77 | int id = rdev->desc->id - RK808_ID_DCDC1; | |
78 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; | |
79 | unsigned int val; | |
80 | int ret; | |
81 | ||
a13eaf02 | 82 | if (!gpio || gpiod_get_value(gpio) == 0) |
bad47ad2 CZ |
83 | return regulator_get_voltage_sel_regmap(rdev); |
84 | ||
85 | ret = regmap_read(rdev->regmap, | |
86 | rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET, | |
87 | &val); | |
88 | if (ret != 0) | |
89 | return ret; | |
90 | ||
91 | val &= rdev->desc->vsel_mask; | |
92 | val >>= ffs(rdev->desc->vsel_mask) - 1; | |
93 | ||
94 | return val; | |
95 | } | |
96 | ||
97 | static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev, | |
98 | unsigned sel) | |
99 | { | |
100 | int ret, delta_sel; | |
101 | unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask; | |
102 | ||
103 | ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); | |
104 | if (ret != 0) | |
105 | return ret; | |
106 | ||
107 | tmp = val & ~mask; | |
108 | old_sel = val & mask; | |
109 | old_sel >>= ffs(mask) - 1; | |
110 | delta_sel = sel - old_sel; | |
111 | ||
112 | /* | |
113 | * If directly modify the register to change the voltage, we will face | |
114 | * the risk of overshoot. Put it into a multi-step, can effectively | |
115 | * avoid this problem, a step is 100mv here. | |
116 | */ | |
117 | while (delta_sel > MAX_STEPS_ONE_TIME) { | |
118 | old_sel += MAX_STEPS_ONE_TIME; | |
119 | val = old_sel << (ffs(mask) - 1); | |
120 | val |= tmp; | |
121 | ||
122 | /* | |
123 | * i2c is 400kHz (2.5us per bit) and we must transmit _at least_ | |
124 | * 3 bytes (24 bits) plus start and stop so 26 bits. So we've | |
125 | * got more than 65 us between each voltage change and thus | |
126 | * won't ramp faster than ~1500 uV / us. | |
127 | */ | |
128 | ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); | |
129 | delta_sel = sel - old_sel; | |
130 | } | |
131 | ||
132 | sel <<= ffs(mask) - 1; | |
133 | val = tmp | sel; | |
134 | ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); | |
135 | ||
136 | /* | |
137 | * When we change the voltage register directly, the ramp rate is about | |
138 | * 100000uv/us, wait 1us to make sure the target voltage to be stable, | |
139 | * so we needn't wait extra time after that. | |
140 | */ | |
141 | udelay(1); | |
142 | ||
143 | return ret; | |
144 | } | |
145 | ||
146 | static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev, | |
147 | unsigned sel) | |
148 | { | |
149 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
150 | int id = rdev->desc->id - RK808_ID_DCDC1; | |
151 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; | |
152 | unsigned int reg = rdev->desc->vsel_reg; | |
153 | unsigned old_sel; | |
154 | int ret, gpio_level; | |
155 | ||
a13eaf02 | 156 | if (!gpio) |
bad47ad2 CZ |
157 | return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel); |
158 | ||
159 | gpio_level = gpiod_get_value(gpio); | |
160 | if (gpio_level == 0) { | |
161 | reg += RK808_DVS_REG_OFFSET; | |
162 | ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel); | |
163 | } else { | |
164 | ret = regmap_read(rdev->regmap, | |
165 | reg + RK808_DVS_REG_OFFSET, | |
166 | &old_sel); | |
167 | } | |
168 | ||
169 | if (ret != 0) | |
170 | return ret; | |
171 | ||
172 | sel <<= ffs(rdev->desc->vsel_mask) - 1; | |
173 | sel |= old_sel & ~rdev->desc->vsel_mask; | |
174 | ||
175 | ret = regmap_write(rdev->regmap, reg, sel); | |
176 | if (ret) | |
177 | return ret; | |
178 | ||
179 | gpiod_set_value(gpio, !gpio_level); | |
180 | ||
181 | return ret; | |
182 | } | |
183 | ||
184 | static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev, | |
185 | unsigned int old_selector, | |
186 | unsigned int new_selector) | |
187 | { | |
188 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
189 | int id = rdev->desc->id - RK808_ID_DCDC1; | |
190 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; | |
191 | ||
192 | /* if there is no dvs1/2 pin, we don't need wait extra time here. */ | |
a13eaf02 | 193 | if (!gpio) |
bad47ad2 CZ |
194 | return 0; |
195 | ||
196 | return regulator_set_voltage_time_sel(rdev, old_selector, new_selector); | |
197 | } | |
198 | ||
8af25227 DA |
199 | static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) |
200 | { | |
201 | unsigned int ramp_value = RK808_RAMP_RATE_10MV_PER_US; | |
202 | unsigned int reg = rk808_buck_config_regs[rdev->desc->id - | |
203 | RK808_ID_DCDC1]; | |
204 | ||
205 | switch (ramp_delay) { | |
206 | case 1 ... 2000: | |
207 | ramp_value = RK808_RAMP_RATE_2MV_PER_US; | |
208 | break; | |
209 | case 2001 ... 4000: | |
210 | ramp_value = RK808_RAMP_RATE_4MV_PER_US; | |
211 | break; | |
212 | case 4001 ... 6000: | |
213 | ramp_value = RK808_RAMP_RATE_6MV_PER_US; | |
214 | break; | |
215 | case 6001 ... 10000: | |
216 | break; | |
217 | default: | |
218 | pr_warn("%s ramp_delay: %d not supported, setting 10000\n", | |
219 | rdev->desc->name, ramp_delay); | |
220 | } | |
221 | ||
222 | return regmap_update_bits(rdev->regmap, reg, | |
223 | RK808_RAMP_RATE_MASK, ramp_value); | |
224 | } | |
225 | ||
5cb2f03c | 226 | static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) |
afcd666d WE |
227 | { |
228 | unsigned int reg; | |
229 | int sel = regulator_map_voltage_linear(rdev, uv, uv); | |
230 | ||
231 | if (sel < 0) | |
232 | return -EINVAL; | |
233 | ||
234 | reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; | |
235 | ||
236 | return regmap_update_bits(rdev->regmap, reg, | |
237 | rdev->desc->vsel_mask, | |
238 | sel); | |
239 | } | |
240 | ||
129d7cf9 WE |
241 | static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) |
242 | { | |
243 | unsigned int reg; | |
244 | int sel = regulator_map_voltage_linear_range(rdev, uv, uv); | |
245 | ||
246 | if (sel < 0) | |
247 | return -EINVAL; | |
248 | ||
249 | reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; | |
250 | ||
251 | return regmap_update_bits(rdev->regmap, reg, | |
252 | rdev->desc->vsel_mask, | |
253 | sel); | |
254 | } | |
255 | ||
5cb2f03c | 256 | static int rk808_set_suspend_enable(struct regulator_dev *rdev) |
251ce318 CZ |
257 | { |
258 | unsigned int reg; | |
259 | ||
260 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
261 | ||
262 | return regmap_update_bits(rdev->regmap, reg, | |
263 | rdev->desc->enable_mask, | |
264 | 0); | |
265 | } | |
266 | ||
5cb2f03c | 267 | static int rk808_set_suspend_disable(struct regulator_dev *rdev) |
251ce318 CZ |
268 | { |
269 | unsigned int reg; | |
270 | ||
271 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
272 | ||
273 | return regmap_update_bits(rdev->regmap, reg, | |
274 | rdev->desc->enable_mask, | |
275 | rdev->desc->enable_mask); | |
276 | } | |
277 | ||
8af25227 | 278 | static struct regulator_ops rk808_buck1_2_ops = { |
afcd666d WE |
279 | .list_voltage = regulator_list_voltage_linear, |
280 | .map_voltage = regulator_map_voltage_linear, | |
bad47ad2 CZ |
281 | .get_voltage_sel = rk808_buck1_2_get_voltage_sel_regmap, |
282 | .set_voltage_sel = rk808_buck1_2_set_voltage_sel, | |
283 | .set_voltage_time_sel = rk808_buck1_2_set_voltage_time_sel, | |
8af25227 DA |
284 | .enable = regulator_enable_regmap, |
285 | .disable = regulator_disable_regmap, | |
286 | .is_enabled = regulator_is_enabled_regmap, | |
287 | .set_ramp_delay = rk808_set_ramp_delay, | |
251ce318 CZ |
288 | .set_suspend_voltage = rk808_set_suspend_voltage, |
289 | .set_suspend_enable = rk808_set_suspend_enable, | |
290 | .set_suspend_disable = rk808_set_suspend_disable, | |
8af25227 DA |
291 | }; |
292 | ||
2cd64ae3 | 293 | static struct regulator_ops rk808_reg_ops = { |
afcd666d WE |
294 | .list_voltage = regulator_list_voltage_linear, |
295 | .map_voltage = regulator_map_voltage_linear, | |
296 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
297 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
298 | .enable = regulator_enable_regmap, | |
299 | .disable = regulator_disable_regmap, | |
300 | .is_enabled = regulator_is_enabled_regmap, | |
301 | .set_suspend_voltage = rk808_set_suspend_voltage, | |
302 | .set_suspend_enable = rk808_set_suspend_enable, | |
303 | .set_suspend_disable = rk808_set_suspend_disable, | |
304 | }; | |
305 | ||
129d7cf9 WE |
306 | static struct regulator_ops rk808_reg_ops_ranges = { |
307 | .list_voltage = regulator_list_voltage_linear_range, | |
308 | .map_voltage = regulator_map_voltage_linear_range, | |
309 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
310 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
311 | .enable = regulator_enable_regmap, | |
312 | .disable = regulator_disable_regmap, | |
313 | .is_enabled = regulator_is_enabled_regmap, | |
314 | .set_suspend_voltage = rk808_set_suspend_voltage_range, | |
315 | .set_suspend_enable = rk808_set_suspend_enable, | |
316 | .set_suspend_disable = rk808_set_suspend_disable, | |
317 | }; | |
318 | ||
2cd64ae3 | 319 | static struct regulator_ops rk808_switch_ops = { |
251ce318 CZ |
320 | .enable = regulator_enable_regmap, |
321 | .disable = regulator_disable_regmap, | |
322 | .is_enabled = regulator_is_enabled_regmap, | |
323 | .set_suspend_enable = rk808_set_suspend_enable, | |
324 | .set_suspend_disable = rk808_set_suspend_disable, | |
2cd64ae3 CZ |
325 | }; |
326 | ||
327 | static const struct regulator_desc rk808_reg[] = { | |
328 | { | |
329 | .name = "DCDC_REG1", | |
b8074eba | 330 | .supply_name = "vcc1", |
2cd64ae3 | 331 | .id = RK808_ID_DCDC1, |
8af25227 | 332 | .ops = &rk808_buck1_2_ops, |
2cd64ae3 | 333 | .type = REGULATOR_VOLTAGE, |
afcd666d WE |
334 | .min_uV = 712500, |
335 | .uV_step = 12500, | |
2cd64ae3 | 336 | .n_voltages = 64, |
2cd64ae3 CZ |
337 | .vsel_reg = RK808_BUCK1_ON_VSEL_REG, |
338 | .vsel_mask = RK808_BUCK_VSEL_MASK, | |
339 | .enable_reg = RK808_DCDC_EN_REG, | |
340 | .enable_mask = BIT(0), | |
341 | .owner = THIS_MODULE, | |
342 | }, { | |
343 | .name = "DCDC_REG2", | |
b8074eba | 344 | .supply_name = "vcc2", |
2cd64ae3 | 345 | .id = RK808_ID_DCDC2, |
8af25227 | 346 | .ops = &rk808_buck1_2_ops, |
2cd64ae3 | 347 | .type = REGULATOR_VOLTAGE, |
afcd666d WE |
348 | .min_uV = 712500, |
349 | .uV_step = 12500, | |
2cd64ae3 | 350 | .n_voltages = 64, |
2cd64ae3 CZ |
351 | .vsel_reg = RK808_BUCK2_ON_VSEL_REG, |
352 | .vsel_mask = RK808_BUCK_VSEL_MASK, | |
353 | .enable_reg = RK808_DCDC_EN_REG, | |
354 | .enable_mask = BIT(1), | |
355 | .owner = THIS_MODULE, | |
356 | }, { | |
357 | .name = "DCDC_REG3", | |
b8074eba | 358 | .supply_name = "vcc3", |
2cd64ae3 CZ |
359 | .id = RK808_ID_DCDC3, |
360 | .ops = &rk808_switch_ops, | |
361 | .type = REGULATOR_VOLTAGE, | |
362 | .n_voltages = 1, | |
363 | .enable_reg = RK808_DCDC_EN_REG, | |
364 | .enable_mask = BIT(2), | |
365 | .owner = THIS_MODULE, | |
366 | }, { | |
367 | .name = "DCDC_REG4", | |
b8074eba | 368 | .supply_name = "vcc4", |
2cd64ae3 CZ |
369 | .id = RK808_ID_DCDC4, |
370 | .ops = &rk808_reg_ops, | |
371 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
372 | .min_uV = 1800000, |
373 | .uV_step = 100000, | |
5a82067f | 374 | .n_voltages = 16, |
2cd64ae3 CZ |
375 | .vsel_reg = RK808_BUCK4_ON_VSEL_REG, |
376 | .vsel_mask = RK808_BUCK4_VSEL_MASK, | |
377 | .enable_reg = RK808_DCDC_EN_REG, | |
378 | .enable_mask = BIT(3), | |
379 | .owner = THIS_MODULE, | |
380 | }, { | |
381 | .name = "LDO_REG1", | |
b8074eba | 382 | .supply_name = "vcc6", |
2cd64ae3 CZ |
383 | .id = RK808_ID_LDO1, |
384 | .ops = &rk808_reg_ops, | |
385 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
386 | .min_uV = 1800000, |
387 | .uV_step = 100000, | |
2cd64ae3 | 388 | .n_voltages = 17, |
2cd64ae3 CZ |
389 | .vsel_reg = RK808_LDO1_ON_VSEL_REG, |
390 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
391 | .enable_reg = RK808_LDO_EN_REG, | |
392 | .enable_mask = BIT(0), | |
28249b0c | 393 | .enable_time = 400, |
2cd64ae3 CZ |
394 | .owner = THIS_MODULE, |
395 | }, { | |
396 | .name = "LDO_REG2", | |
b8074eba | 397 | .supply_name = "vcc6", |
2cd64ae3 CZ |
398 | .id = RK808_ID_LDO2, |
399 | .ops = &rk808_reg_ops, | |
400 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
401 | .min_uV = 1800000, |
402 | .uV_step = 100000, | |
2cd64ae3 | 403 | .n_voltages = 17, |
2cd64ae3 CZ |
404 | .vsel_reg = RK808_LDO2_ON_VSEL_REG, |
405 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
406 | .enable_reg = RK808_LDO_EN_REG, | |
407 | .enable_mask = BIT(1), | |
28249b0c | 408 | .enable_time = 400, |
2cd64ae3 CZ |
409 | .owner = THIS_MODULE, |
410 | }, { | |
411 | .name = "LDO_REG3", | |
b8074eba | 412 | .supply_name = "vcc7", |
2cd64ae3 | 413 | .id = RK808_ID_LDO3, |
129d7cf9 | 414 | .ops = &rk808_reg_ops_ranges, |
2cd64ae3 CZ |
415 | .type = REGULATOR_VOLTAGE, |
416 | .n_voltages = 16, | |
417 | .linear_ranges = rk808_ldo3_voltage_ranges, | |
418 | .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges), | |
419 | .vsel_reg = RK808_LDO3_ON_VSEL_REG, | |
420 | .vsel_mask = RK808_BUCK4_VSEL_MASK, | |
421 | .enable_reg = RK808_LDO_EN_REG, | |
422 | .enable_mask = BIT(2), | |
28249b0c | 423 | .enable_time = 400, |
2cd64ae3 CZ |
424 | .owner = THIS_MODULE, |
425 | }, { | |
426 | .name = "LDO_REG4", | |
b8074eba | 427 | .supply_name = "vcc9", |
2cd64ae3 CZ |
428 | .id = RK808_ID_LDO4, |
429 | .ops = &rk808_reg_ops, | |
430 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
431 | .min_uV = 1800000, |
432 | .uV_step = 100000, | |
2cd64ae3 | 433 | .n_voltages = 17, |
2cd64ae3 CZ |
434 | .vsel_reg = RK808_LDO4_ON_VSEL_REG, |
435 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
436 | .enable_reg = RK808_LDO_EN_REG, | |
437 | .enable_mask = BIT(3), | |
28249b0c | 438 | .enable_time = 400, |
2cd64ae3 CZ |
439 | .owner = THIS_MODULE, |
440 | }, { | |
441 | .name = "LDO_REG5", | |
b8074eba | 442 | .supply_name = "vcc9", |
2cd64ae3 CZ |
443 | .id = RK808_ID_LDO5, |
444 | .ops = &rk808_reg_ops, | |
445 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
446 | .min_uV = 1800000, |
447 | .uV_step = 100000, | |
2cd64ae3 | 448 | .n_voltages = 17, |
2cd64ae3 CZ |
449 | .vsel_reg = RK808_LDO5_ON_VSEL_REG, |
450 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
451 | .enable_reg = RK808_LDO_EN_REG, | |
452 | .enable_mask = BIT(4), | |
28249b0c | 453 | .enable_time = 400, |
2cd64ae3 CZ |
454 | .owner = THIS_MODULE, |
455 | }, { | |
456 | .name = "LDO_REG6", | |
b8074eba | 457 | .supply_name = "vcc10", |
2cd64ae3 CZ |
458 | .id = RK808_ID_LDO6, |
459 | .ops = &rk808_reg_ops, | |
460 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
461 | .min_uV = 800000, |
462 | .uV_step = 100000, | |
2cd64ae3 | 463 | .n_voltages = 18, |
2cd64ae3 CZ |
464 | .vsel_reg = RK808_LDO6_ON_VSEL_REG, |
465 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
466 | .enable_reg = RK808_LDO_EN_REG, | |
467 | .enable_mask = BIT(5), | |
28249b0c | 468 | .enable_time = 400, |
2cd64ae3 CZ |
469 | .owner = THIS_MODULE, |
470 | }, { | |
471 | .name = "LDO_REG7", | |
b8074eba | 472 | .supply_name = "vcc7", |
2cd64ae3 CZ |
473 | .id = RK808_ID_LDO7, |
474 | .ops = &rk808_reg_ops, | |
475 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
476 | .min_uV = 800000, |
477 | .uV_step = 100000, | |
2cd64ae3 | 478 | .n_voltages = 18, |
2cd64ae3 CZ |
479 | .vsel_reg = RK808_LDO7_ON_VSEL_REG, |
480 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
481 | .enable_reg = RK808_LDO_EN_REG, | |
482 | .enable_mask = BIT(6), | |
28249b0c | 483 | .enable_time = 400, |
2cd64ae3 CZ |
484 | .owner = THIS_MODULE, |
485 | }, { | |
486 | .name = "LDO_REG8", | |
b8074eba | 487 | .supply_name = "vcc11", |
2cd64ae3 CZ |
488 | .id = RK808_ID_LDO8, |
489 | .ops = &rk808_reg_ops, | |
490 | .type = REGULATOR_VOLTAGE, | |
afcd666d WE |
491 | .min_uV = 1800000, |
492 | .uV_step = 100000, | |
2cd64ae3 | 493 | .n_voltages = 17, |
2cd64ae3 CZ |
494 | .vsel_reg = RK808_LDO8_ON_VSEL_REG, |
495 | .vsel_mask = RK808_LDO_VSEL_MASK, | |
496 | .enable_reg = RK808_LDO_EN_REG, | |
497 | .enable_mask = BIT(7), | |
28249b0c | 498 | .enable_time = 400, |
2cd64ae3 CZ |
499 | .owner = THIS_MODULE, |
500 | }, { | |
501 | .name = "SWITCH_REG1", | |
b8074eba | 502 | .supply_name = "vcc8", |
2cd64ae3 CZ |
503 | .id = RK808_ID_SWITCH1, |
504 | .ops = &rk808_switch_ops, | |
505 | .type = REGULATOR_VOLTAGE, | |
506 | .enable_reg = RK808_DCDC_EN_REG, | |
507 | .enable_mask = BIT(5), | |
508 | .owner = THIS_MODULE, | |
509 | }, { | |
510 | .name = "SWITCH_REG2", | |
b8074eba | 511 | .supply_name = "vcc12", |
2cd64ae3 CZ |
512 | .id = RK808_ID_SWITCH2, |
513 | .ops = &rk808_switch_ops, | |
514 | .type = REGULATOR_VOLTAGE, | |
515 | .enable_reg = RK808_DCDC_EN_REG, | |
516 | .enable_mask = BIT(6), | |
517 | .owner = THIS_MODULE, | |
518 | }, | |
519 | }; | |
520 | ||
521 | static struct of_regulator_match rk808_reg_matches[] = { | |
522 | [RK808_ID_DCDC1] = { .name = "DCDC_REG1" }, | |
523 | [RK808_ID_DCDC2] = { .name = "DCDC_REG2" }, | |
524 | [RK808_ID_DCDC3] = { .name = "DCDC_REG3" }, | |
525 | [RK808_ID_DCDC4] = { .name = "DCDC_REG4" }, | |
526 | [RK808_ID_LDO1] = { .name = "LDO_REG1" }, | |
527 | [RK808_ID_LDO2] = { .name = "LDO_REG2" }, | |
528 | [RK808_ID_LDO3] = { .name = "LDO_REG3" }, | |
529 | [RK808_ID_LDO4] = { .name = "LDO_REG4" }, | |
530 | [RK808_ID_LDO5] = { .name = "LDO_REG5" }, | |
531 | [RK808_ID_LDO6] = { .name = "LDO_REG6" }, | |
532 | [RK808_ID_LDO7] = { .name = "LDO_REG7" }, | |
533 | [RK808_ID_LDO8] = { .name = "LDO_REG8" }, | |
534 | [RK808_ID_SWITCH1] = { .name = "SWITCH_REG1" }, | |
535 | [RK808_ID_SWITCH2] = { .name = "SWITCH_REG2" }, | |
536 | }; | |
537 | ||
bad47ad2 CZ |
538 | static int rk808_regulator_dt_parse_pdata(struct device *dev, |
539 | struct device *client_dev, | |
540 | struct regmap *map, | |
541 | struct rk808_regulator_data *pdata) | |
542 | { | |
543 | struct device_node *np; | |
544 | int tmp, ret, i; | |
545 | ||
546 | np = of_get_child_by_name(client_dev->of_node, "regulators"); | |
547 | if (!np) | |
548 | return -ENXIO; | |
549 | ||
550 | ret = of_regulator_match(dev, np, rk808_reg_matches, | |
551 | RK808_NUM_REGULATORS); | |
552 | if (ret < 0) | |
553 | goto dt_parse_end; | |
554 | ||
555 | for (i = 0; i < ARRAY_SIZE(pdata->dvs_gpio); i++) { | |
a13eaf02 UKK |
556 | pdata->dvs_gpio[i] = |
557 | devm_gpiod_get_index_optional(client_dev, "dvs", i, | |
558 | GPIOD_OUT_LOW); | |
bad47ad2 | 559 | if (IS_ERR(pdata->dvs_gpio[i])) { |
a13eaf02 UKK |
560 | ret = PTR_ERR(pdata->dvs_gpio[i]); |
561 | dev_err(dev, "failed to get dvs%d gpio (%d)\n", i, ret); | |
562 | goto dt_parse_end; | |
563 | } | |
564 | ||
565 | if (!pdata->dvs_gpio[i]) { | |
bad47ad2 CZ |
566 | dev_warn(dev, "there is no dvs%d gpio\n", i); |
567 | continue; | |
568 | } | |
569 | ||
bad47ad2 CZ |
570 | tmp = i ? RK808_DVS2_POL : RK808_DVS1_POL; |
571 | ret = regmap_update_bits(map, RK808_IO_POL_REG, tmp, | |
572 | gpiod_is_active_low(pdata->dvs_gpio[i]) ? | |
573 | 0 : tmp); | |
574 | } | |
575 | ||
576 | dt_parse_end: | |
577 | of_node_put(np); | |
578 | return ret; | |
579 | } | |
580 | ||
2cd64ae3 CZ |
581 | static int rk808_regulator_probe(struct platform_device *pdev) |
582 | { | |
583 | struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); | |
d76c333e | 584 | struct i2c_client *client = rk808->i2c; |
462004f1 | 585 | struct regulator_config config = {}; |
2cd64ae3 | 586 | struct regulator_dev *rk808_rdev; |
bad47ad2 | 587 | struct rk808_regulator_data *pdata; |
571a4010 | 588 | int ret, i; |
2cd64ae3 | 589 | |
bad47ad2 CZ |
590 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
591 | if (!pdata) | |
592 | return -ENOMEM; | |
2cd64ae3 | 593 | |
bad47ad2 CZ |
594 | ret = rk808_regulator_dt_parse_pdata(&pdev->dev, &client->dev, |
595 | rk808->regmap, pdata); | |
571a4010 | 596 | if (ret < 0) |
2cd64ae3 CZ |
597 | return ret; |
598 | ||
bad47ad2 CZ |
599 | platform_set_drvdata(pdev, pdata); |
600 | ||
2cd64ae3 CZ |
601 | /* Instantiate the regulators */ |
602 | for (i = 0; i < RK808_NUM_REGULATORS; i++) { | |
571a4010 CZ |
603 | if (!rk808_reg_matches[i].init_data || |
604 | !rk808_reg_matches[i].of_node) | |
2cd64ae3 CZ |
605 | continue; |
606 | ||
d76c333e | 607 | config.dev = &client->dev; |
bad47ad2 | 608 | config.driver_data = pdata; |
2cd64ae3 | 609 | config.regmap = rk808->regmap; |
571a4010 CZ |
610 | config.of_node = rk808_reg_matches[i].of_node; |
611 | config.init_data = rk808_reg_matches[i].init_data; | |
2cd64ae3 CZ |
612 | |
613 | rk808_rdev = devm_regulator_register(&pdev->dev, | |
614 | &rk808_reg[i], &config); | |
615 | if (IS_ERR(rk808_rdev)) { | |
d76c333e | 616 | dev_err(&client->dev, |
2cd64ae3 CZ |
617 | "failed to register %d regulator\n", i); |
618 | return PTR_ERR(rk808_rdev); | |
619 | } | |
2cd64ae3 | 620 | } |
571a4010 | 621 | |
2cd64ae3 CZ |
622 | return 0; |
623 | } | |
624 | ||
625 | static struct platform_driver rk808_regulator_driver = { | |
626 | .probe = rk808_regulator_probe, | |
627 | .driver = { | |
628 | .name = "rk808-regulator", | |
bad47ad2 | 629 | .owner = THIS_MODULE, |
2cd64ae3 CZ |
630 | }, |
631 | }; | |
632 | ||
633 | module_platform_driver(rk808_regulator_driver); | |
634 | ||
635 | MODULE_DESCRIPTION("regulator driver for the rk808 series PMICs"); | |
636 | MODULE_AUTHOR("Chris Zhong<zyw@rock-chips.com>"); | |
571a4010 | 637 | MODULE_AUTHOR("Zhang Qing<zhangqing@rock-chips.com>"); |
2cd64ae3 CZ |
638 | MODULE_LICENSE("GPL"); |
639 | MODULE_ALIAS("platform:rk808-regulator"); |