Commit | Line | Data |
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2cd64ae3 | 1 | /* |
a7567663 | 2 | * Regulator driver for Rockchip RK805/RK808/RK818 |
2cd64ae3 CZ |
3 | * |
4 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
5 | * | |
6 | * Author: Chris Zhong <zyw@rock-chips.com> | |
7 | * Author: Zhang Qing <zhangqing@rock-chips.com> | |
8 | * | |
11375293 WE |
9 | * Copyright (C) 2016 PHYTEC Messtechnik GmbH |
10 | * | |
11 | * Author: Wadim Egorov <w.egorov@phytec.de> | |
12 | * | |
2cd64ae3 CZ |
13 | * This program is free software; you can redistribute it and/or modify it |
14 | * under the terms and conditions of the GNU General Public License, | |
15 | * version 2, as published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope it will be useful, but WITHOUT | |
18 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
19 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
20 | * more details. | |
2cd64ae3 CZ |
21 | */ |
22 | ||
bad47ad2 CZ |
23 | #include <linux/delay.h> |
24 | #include <linux/gpio.h> | |
2cd64ae3 | 25 | #include <linux/i2c.h> |
bad47ad2 | 26 | #include <linux/module.h> |
2cd64ae3 | 27 | #include <linux/of_device.h> |
bad47ad2 CZ |
28 | #include <linux/of_gpio.h> |
29 | #include <linux/mfd/rk808.h> | |
2cd64ae3 CZ |
30 | #include <linux/regulator/driver.h> |
31 | #include <linux/regulator/of_regulator.h> | |
604d4994 | 32 | #include <linux/gpio/consumer.h> |
571a4010 CZ |
33 | |
34 | /* Field Definitions */ | |
2cd64ae3 CZ |
35 | #define RK808_BUCK_VSEL_MASK 0x3f |
36 | #define RK808_BUCK4_VSEL_MASK 0xf | |
37 | #define RK808_LDO_VSEL_MASK 0x1f | |
38 | ||
11375293 WE |
39 | #define RK818_BUCK_VSEL_MASK 0x3f |
40 | #define RK818_BUCK4_VSEL_MASK 0x1f | |
41 | #define RK818_LDO_VSEL_MASK 0x1f | |
42 | #define RK818_LDO3_ON_VSEL_MASK 0xf | |
43 | #define RK818_BOOST_ON_VSEL_MASK 0xe0 | |
44 | ||
8af25227 DA |
45 | /* Ramp rate definitions for buck1 / buck2 only */ |
46 | #define RK808_RAMP_RATE_OFFSET 3 | |
47 | #define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET) | |
48 | #define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET) | |
49 | #define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET) | |
50 | #define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET) | |
51 | #define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET) | |
52 | ||
bad47ad2 CZ |
53 | #define RK808_DVS2_POL BIT(2) |
54 | #define RK808_DVS1_POL BIT(1) | |
55 | ||
251ce318 CZ |
56 | /* Offset from XXX_ON_VSEL to XXX_SLP_VSEL */ |
57 | #define RK808_SLP_REG_OFFSET 1 | |
58 | ||
bad47ad2 CZ |
59 | /* Offset from XXX_ON_VSEL to XXX_DVS_VSEL */ |
60 | #define RK808_DVS_REG_OFFSET 2 | |
61 | ||
251ce318 CZ |
62 | /* Offset from XXX_EN_REG to SLEEP_SET_OFF_XXX */ |
63 | #define RK808_SLP_SET_OFF_REG_OFFSET 2 | |
64 | ||
bad47ad2 CZ |
65 | /* max steps for increase voltage of Buck1/2, equal 100mv*/ |
66 | #define MAX_STEPS_ONE_TIME 8 | |
67 | ||
c4e0d344 EZ |
68 | #define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ |
69 | _vmask, _ereg, _emask, _etime) \ | |
70 | [_id] = { \ | |
71 | .name = (_match), \ | |
72 | .supply_name = (_supply), \ | |
73 | .of_match = of_match_ptr(_match), \ | |
74 | .regulators_node = of_match_ptr("regulators"), \ | |
75 | .type = REGULATOR_VOLTAGE, \ | |
76 | .id = (_id), \ | |
77 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ | |
78 | .owner = THIS_MODULE, \ | |
79 | .min_uV = (_min) * 1000, \ | |
80 | .uV_step = (_step) * 1000, \ | |
81 | .vsel_reg = (_vreg), \ | |
82 | .vsel_mask = (_vmask), \ | |
83 | .enable_reg = (_ereg), \ | |
84 | .enable_mask = (_emask), \ | |
85 | .enable_time = (_etime), \ | |
86 | .ops = &rk805_reg_ops, \ | |
87 | } | |
88 | ||
9e9daa0a WE |
89 | #define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ |
90 | _vmask, _ereg, _emask, _etime) \ | |
91 | [_id] = { \ | |
92 | .name = (_match), \ | |
93 | .supply_name = (_supply), \ | |
94 | .of_match = of_match_ptr(_match), \ | |
95 | .regulators_node = of_match_ptr("regulators"), \ | |
96 | .type = REGULATOR_VOLTAGE, \ | |
97 | .id = (_id), \ | |
98 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ | |
99 | .owner = THIS_MODULE, \ | |
100 | .min_uV = (_min) * 1000, \ | |
101 | .uV_step = (_step) * 1000, \ | |
102 | .vsel_reg = (_vreg), \ | |
103 | .vsel_mask = (_vmask), \ | |
104 | .enable_reg = (_ereg), \ | |
105 | .enable_mask = (_emask), \ | |
106 | .enable_time = (_etime), \ | |
107 | .ops = &rk808_reg_ops, \ | |
108 | } | |
109 | ||
110 | #define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ | |
111 | [_id] = { \ | |
112 | .name = (_match), \ | |
113 | .supply_name = (_supply), \ | |
114 | .of_match = of_match_ptr(_match), \ | |
115 | .regulators_node = of_match_ptr("regulators"), \ | |
116 | .type = REGULATOR_VOLTAGE, \ | |
117 | .id = (_id), \ | |
118 | .enable_reg = (_ereg), \ | |
119 | .enable_mask = (_emask), \ | |
120 | .owner = THIS_MODULE, \ | |
121 | .ops = &rk808_switch_ops \ | |
122 | } | |
123 | ||
124 | ||
bad47ad2 CZ |
125 | struct rk808_regulator_data { |
126 | struct gpio_desc *dvs_gpio[2]; | |
127 | }; | |
128 | ||
8af25227 DA |
129 | static const int rk808_buck_config_regs[] = { |
130 | RK808_BUCK1_CONFIG_REG, | |
131 | RK808_BUCK2_CONFIG_REG, | |
132 | RK808_BUCK3_CONFIG_REG, | |
133 | RK808_BUCK4_CONFIG_REG, | |
134 | }; | |
135 | ||
2cd64ae3 CZ |
136 | static const struct regulator_linear_range rk808_ldo3_voltage_ranges[] = { |
137 | REGULATOR_LINEAR_RANGE(800000, 0, 13, 100000), | |
138 | REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0), | |
139 | }; | |
140 | ||
bad47ad2 CZ |
141 | static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) |
142 | { | |
143 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
bf8e2762 | 144 | int id = rdev_get_id(rdev); |
bad47ad2 CZ |
145 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; |
146 | unsigned int val; | |
147 | int ret; | |
148 | ||
a13eaf02 | 149 | if (!gpio || gpiod_get_value(gpio) == 0) |
bad47ad2 CZ |
150 | return regulator_get_voltage_sel_regmap(rdev); |
151 | ||
152 | ret = regmap_read(rdev->regmap, | |
153 | rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET, | |
154 | &val); | |
155 | if (ret != 0) | |
156 | return ret; | |
157 | ||
158 | val &= rdev->desc->vsel_mask; | |
159 | val >>= ffs(rdev->desc->vsel_mask) - 1; | |
160 | ||
161 | return val; | |
162 | } | |
163 | ||
164 | static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev, | |
165 | unsigned sel) | |
166 | { | |
167 | int ret, delta_sel; | |
168 | unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask; | |
169 | ||
170 | ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); | |
171 | if (ret != 0) | |
172 | return ret; | |
173 | ||
174 | tmp = val & ~mask; | |
175 | old_sel = val & mask; | |
176 | old_sel >>= ffs(mask) - 1; | |
177 | delta_sel = sel - old_sel; | |
178 | ||
179 | /* | |
180 | * If directly modify the register to change the voltage, we will face | |
181 | * the risk of overshoot. Put it into a multi-step, can effectively | |
182 | * avoid this problem, a step is 100mv here. | |
183 | */ | |
184 | while (delta_sel > MAX_STEPS_ONE_TIME) { | |
185 | old_sel += MAX_STEPS_ONE_TIME; | |
186 | val = old_sel << (ffs(mask) - 1); | |
187 | val |= tmp; | |
188 | ||
189 | /* | |
190 | * i2c is 400kHz (2.5us per bit) and we must transmit _at least_ | |
191 | * 3 bytes (24 bits) plus start and stop so 26 bits. So we've | |
192 | * got more than 65 us between each voltage change and thus | |
193 | * won't ramp faster than ~1500 uV / us. | |
194 | */ | |
195 | ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); | |
196 | delta_sel = sel - old_sel; | |
197 | } | |
198 | ||
199 | sel <<= ffs(mask) - 1; | |
200 | val = tmp | sel; | |
201 | ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); | |
202 | ||
203 | /* | |
204 | * When we change the voltage register directly, the ramp rate is about | |
205 | * 100000uv/us, wait 1us to make sure the target voltage to be stable, | |
206 | * so we needn't wait extra time after that. | |
207 | */ | |
208 | udelay(1); | |
209 | ||
210 | return ret; | |
211 | } | |
212 | ||
213 | static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev, | |
214 | unsigned sel) | |
215 | { | |
216 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
bf8e2762 | 217 | int id = rdev_get_id(rdev); |
bad47ad2 CZ |
218 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; |
219 | unsigned int reg = rdev->desc->vsel_reg; | |
220 | unsigned old_sel; | |
221 | int ret, gpio_level; | |
222 | ||
a13eaf02 | 223 | if (!gpio) |
bad47ad2 CZ |
224 | return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel); |
225 | ||
226 | gpio_level = gpiod_get_value(gpio); | |
227 | if (gpio_level == 0) { | |
228 | reg += RK808_DVS_REG_OFFSET; | |
229 | ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel); | |
230 | } else { | |
231 | ret = regmap_read(rdev->regmap, | |
232 | reg + RK808_DVS_REG_OFFSET, | |
233 | &old_sel); | |
234 | } | |
235 | ||
236 | if (ret != 0) | |
237 | return ret; | |
238 | ||
239 | sel <<= ffs(rdev->desc->vsel_mask) - 1; | |
240 | sel |= old_sel & ~rdev->desc->vsel_mask; | |
241 | ||
242 | ret = regmap_write(rdev->regmap, reg, sel); | |
243 | if (ret) | |
244 | return ret; | |
245 | ||
246 | gpiod_set_value(gpio, !gpio_level); | |
247 | ||
248 | return ret; | |
249 | } | |
250 | ||
251 | static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev, | |
252 | unsigned int old_selector, | |
253 | unsigned int new_selector) | |
254 | { | |
255 | struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); | |
bf8e2762 | 256 | int id = rdev_get_id(rdev); |
bad47ad2 CZ |
257 | struct gpio_desc *gpio = pdata->dvs_gpio[id]; |
258 | ||
259 | /* if there is no dvs1/2 pin, we don't need wait extra time here. */ | |
a13eaf02 | 260 | if (!gpio) |
bad47ad2 CZ |
261 | return 0; |
262 | ||
263 | return regulator_set_voltage_time_sel(rdev, old_selector, new_selector); | |
264 | } | |
265 | ||
8af25227 DA |
266 | static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) |
267 | { | |
268 | unsigned int ramp_value = RK808_RAMP_RATE_10MV_PER_US; | |
bf8e2762 | 269 | unsigned int reg = rk808_buck_config_regs[rdev_get_id(rdev)]; |
8af25227 DA |
270 | |
271 | switch (ramp_delay) { | |
272 | case 1 ... 2000: | |
273 | ramp_value = RK808_RAMP_RATE_2MV_PER_US; | |
274 | break; | |
275 | case 2001 ... 4000: | |
276 | ramp_value = RK808_RAMP_RATE_4MV_PER_US; | |
277 | break; | |
278 | case 4001 ... 6000: | |
279 | ramp_value = RK808_RAMP_RATE_6MV_PER_US; | |
280 | break; | |
281 | case 6001 ... 10000: | |
282 | break; | |
283 | default: | |
284 | pr_warn("%s ramp_delay: %d not supported, setting 10000\n", | |
285 | rdev->desc->name, ramp_delay); | |
286 | } | |
287 | ||
288 | return regmap_update_bits(rdev->regmap, reg, | |
289 | RK808_RAMP_RATE_MASK, ramp_value); | |
290 | } | |
291 | ||
5cb2f03c | 292 | static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) |
afcd666d WE |
293 | { |
294 | unsigned int reg; | |
295 | int sel = regulator_map_voltage_linear(rdev, uv, uv); | |
296 | ||
297 | if (sel < 0) | |
298 | return -EINVAL; | |
299 | ||
300 | reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; | |
301 | ||
302 | return regmap_update_bits(rdev->regmap, reg, | |
303 | rdev->desc->vsel_mask, | |
304 | sel); | |
305 | } | |
306 | ||
129d7cf9 WE |
307 | static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) |
308 | { | |
309 | unsigned int reg; | |
310 | int sel = regulator_map_voltage_linear_range(rdev, uv, uv); | |
311 | ||
312 | if (sel < 0) | |
313 | return -EINVAL; | |
314 | ||
315 | reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; | |
316 | ||
317 | return regmap_update_bits(rdev->regmap, reg, | |
318 | rdev->desc->vsel_mask, | |
319 | sel); | |
320 | } | |
321 | ||
c4e0d344 EZ |
322 | static int rk805_set_suspend_enable(struct regulator_dev *rdev) |
323 | { | |
324 | unsigned int reg; | |
325 | ||
326 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
327 | ||
328 | return regmap_update_bits(rdev->regmap, reg, | |
329 | rdev->desc->enable_mask, | |
330 | rdev->desc->enable_mask); | |
331 | } | |
332 | ||
333 | static int rk805_set_suspend_disable(struct regulator_dev *rdev) | |
334 | { | |
335 | unsigned int reg; | |
336 | ||
337 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
338 | ||
339 | return regmap_update_bits(rdev->regmap, reg, | |
340 | rdev->desc->enable_mask, | |
341 | 0); | |
342 | } | |
343 | ||
5cb2f03c | 344 | static int rk808_set_suspend_enable(struct regulator_dev *rdev) |
251ce318 CZ |
345 | { |
346 | unsigned int reg; | |
347 | ||
348 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
349 | ||
350 | return regmap_update_bits(rdev->regmap, reg, | |
351 | rdev->desc->enable_mask, | |
352 | 0); | |
353 | } | |
354 | ||
5cb2f03c | 355 | static int rk808_set_suspend_disable(struct regulator_dev *rdev) |
251ce318 CZ |
356 | { |
357 | unsigned int reg; | |
358 | ||
359 | reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; | |
360 | ||
361 | return regmap_update_bits(rdev->regmap, reg, | |
362 | rdev->desc->enable_mask, | |
363 | rdev->desc->enable_mask); | |
364 | } | |
365 | ||
dc6f23ed AL |
366 | static const struct regulator_ops rk805_reg_ops = { |
367 | .list_voltage = regulator_list_voltage_linear, | |
368 | .map_voltage = regulator_map_voltage_linear, | |
369 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
370 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
371 | .enable = regulator_enable_regmap, | |
372 | .disable = regulator_disable_regmap, | |
373 | .is_enabled = regulator_is_enabled_regmap, | |
374 | .set_suspend_voltage = rk808_set_suspend_voltage, | |
375 | .set_suspend_enable = rk805_set_suspend_enable, | |
376 | .set_suspend_disable = rk805_set_suspend_disable, | |
c4e0d344 EZ |
377 | }; |
378 | ||
dc6f23ed AL |
379 | static const struct regulator_ops rk805_switch_ops = { |
380 | .enable = regulator_enable_regmap, | |
381 | .disable = regulator_disable_regmap, | |
382 | .is_enabled = regulator_is_enabled_regmap, | |
383 | .set_suspend_enable = rk805_set_suspend_enable, | |
384 | .set_suspend_disable = rk805_set_suspend_disable, | |
c4e0d344 EZ |
385 | }; |
386 | ||
dc6f23ed | 387 | static const struct regulator_ops rk808_buck1_2_ops = { |
afcd666d WE |
388 | .list_voltage = regulator_list_voltage_linear, |
389 | .map_voltage = regulator_map_voltage_linear, | |
bad47ad2 CZ |
390 | .get_voltage_sel = rk808_buck1_2_get_voltage_sel_regmap, |
391 | .set_voltage_sel = rk808_buck1_2_set_voltage_sel, | |
392 | .set_voltage_time_sel = rk808_buck1_2_set_voltage_time_sel, | |
8af25227 DA |
393 | .enable = regulator_enable_regmap, |
394 | .disable = regulator_disable_regmap, | |
395 | .is_enabled = regulator_is_enabled_regmap, | |
396 | .set_ramp_delay = rk808_set_ramp_delay, | |
251ce318 CZ |
397 | .set_suspend_voltage = rk808_set_suspend_voltage, |
398 | .set_suspend_enable = rk808_set_suspend_enable, | |
399 | .set_suspend_disable = rk808_set_suspend_disable, | |
8af25227 DA |
400 | }; |
401 | ||
dc6f23ed | 402 | static const struct regulator_ops rk808_reg_ops = { |
afcd666d WE |
403 | .list_voltage = regulator_list_voltage_linear, |
404 | .map_voltage = regulator_map_voltage_linear, | |
405 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
406 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
407 | .enable = regulator_enable_regmap, | |
408 | .disable = regulator_disable_regmap, | |
409 | .is_enabled = regulator_is_enabled_regmap, | |
410 | .set_suspend_voltage = rk808_set_suspend_voltage, | |
411 | .set_suspend_enable = rk808_set_suspend_enable, | |
412 | .set_suspend_disable = rk808_set_suspend_disable, | |
413 | }; | |
414 | ||
dc6f23ed | 415 | static const struct regulator_ops rk808_reg_ops_ranges = { |
129d7cf9 WE |
416 | .list_voltage = regulator_list_voltage_linear_range, |
417 | .map_voltage = regulator_map_voltage_linear_range, | |
418 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
419 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
420 | .enable = regulator_enable_regmap, | |
421 | .disable = regulator_disable_regmap, | |
422 | .is_enabled = regulator_is_enabled_regmap, | |
423 | .set_suspend_voltage = rk808_set_suspend_voltage_range, | |
424 | .set_suspend_enable = rk808_set_suspend_enable, | |
425 | .set_suspend_disable = rk808_set_suspend_disable, | |
426 | }; | |
427 | ||
dc6f23ed | 428 | static const struct regulator_ops rk808_switch_ops = { |
251ce318 CZ |
429 | .enable = regulator_enable_regmap, |
430 | .disable = regulator_disable_regmap, | |
431 | .is_enabled = regulator_is_enabled_regmap, | |
432 | .set_suspend_enable = rk808_set_suspend_enable, | |
433 | .set_suspend_disable = rk808_set_suspend_disable, | |
2cd64ae3 CZ |
434 | }; |
435 | ||
4f297062 AL |
436 | static const struct regulator_linear_range rk805_buck_1_2_voltage_ranges[] = { |
437 | REGULATOR_LINEAR_RANGE(712500, 0, 59, 12500), | |
438 | REGULATOR_LINEAR_RANGE(1800000, 60, 62, 200000), | |
439 | REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), | |
2b679ca1 OS |
440 | }; |
441 | ||
c4e0d344 EZ |
442 | static const struct regulator_desc rk805_reg[] = { |
443 | { | |
444 | .name = "DCDC_REG1", | |
445 | .supply_name = "vcc1", | |
446 | .of_match = of_match_ptr("DCDC_REG1"), | |
447 | .regulators_node = of_match_ptr("regulators"), | |
448 | .id = RK805_ID_DCDC1, | |
4f297062 | 449 | .ops = &rk808_reg_ops_ranges, |
c4e0d344 | 450 | .type = REGULATOR_VOLTAGE, |
4f297062 AL |
451 | .n_voltages = 64, |
452 | .linear_ranges = rk805_buck_1_2_voltage_ranges, | |
453 | .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), | |
c4e0d344 EZ |
454 | .vsel_reg = RK805_BUCK1_ON_VSEL_REG, |
455 | .vsel_mask = RK818_BUCK_VSEL_MASK, | |
456 | .enable_reg = RK805_DCDC_EN_REG, | |
457 | .enable_mask = BIT(0), | |
458 | .owner = THIS_MODULE, | |
459 | }, { | |
460 | .name = "DCDC_REG2", | |
461 | .supply_name = "vcc2", | |
462 | .of_match = of_match_ptr("DCDC_REG2"), | |
463 | .regulators_node = of_match_ptr("regulators"), | |
464 | .id = RK805_ID_DCDC2, | |
4f297062 | 465 | .ops = &rk808_reg_ops_ranges, |
c4e0d344 | 466 | .type = REGULATOR_VOLTAGE, |
4f297062 AL |
467 | .n_voltages = 64, |
468 | .linear_ranges = rk805_buck_1_2_voltage_ranges, | |
469 | .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), | |
c4e0d344 EZ |
470 | .vsel_reg = RK805_BUCK2_ON_VSEL_REG, |
471 | .vsel_mask = RK818_BUCK_VSEL_MASK, | |
472 | .enable_reg = RK805_DCDC_EN_REG, | |
473 | .enable_mask = BIT(1), | |
474 | .owner = THIS_MODULE, | |
475 | }, { | |
476 | .name = "DCDC_REG3", | |
477 | .supply_name = "vcc3", | |
478 | .of_match = of_match_ptr("DCDC_REG3"), | |
479 | .regulators_node = of_match_ptr("regulators"), | |
480 | .id = RK805_ID_DCDC3, | |
481 | .ops = &rk805_switch_ops, | |
482 | .type = REGULATOR_VOLTAGE, | |
483 | .n_voltages = 1, | |
484 | .enable_reg = RK805_DCDC_EN_REG, | |
485 | .enable_mask = BIT(2), | |
486 | .owner = THIS_MODULE, | |
487 | }, | |
488 | ||
489 | RK805_DESC(RK805_ID_DCDC4, "DCDC_REG4", "vcc4", 800, 3400, 100, | |
490 | RK805_BUCK4_ON_VSEL_REG, RK818_BUCK4_VSEL_MASK, | |
491 | RK805_DCDC_EN_REG, BIT(3), 0), | |
492 | ||
493 | RK805_DESC(RK805_ID_LDO1, "LDO_REG1", "vcc5", 800, 3400, 100, | |
494 | RK805_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, | |
495 | BIT(0), 400), | |
496 | RK805_DESC(RK805_ID_LDO2, "LDO_REG2", "vcc5", 800, 3400, 100, | |
497 | RK805_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, | |
498 | BIT(1), 400), | |
499 | RK805_DESC(RK805_ID_LDO3, "LDO_REG3", "vcc6", 800, 3400, 100, | |
500 | RK805_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, | |
501 | BIT(2), 400), | |
502 | }; | |
503 | ||
2cd64ae3 CZ |
504 | static const struct regulator_desc rk808_reg[] = { |
505 | { | |
506 | .name = "DCDC_REG1", | |
b8074eba | 507 | .supply_name = "vcc1", |
9e9daa0a WE |
508 | .of_match = of_match_ptr("DCDC_REG1"), |
509 | .regulators_node = of_match_ptr("regulators"), | |
2cd64ae3 | 510 | .id = RK808_ID_DCDC1, |
8af25227 | 511 | .ops = &rk808_buck1_2_ops, |
2cd64ae3 | 512 | .type = REGULATOR_VOLTAGE, |
afcd666d WE |
513 | .min_uV = 712500, |
514 | .uV_step = 12500, | |
2cd64ae3 | 515 | .n_voltages = 64, |
2cd64ae3 CZ |
516 | .vsel_reg = RK808_BUCK1_ON_VSEL_REG, |
517 | .vsel_mask = RK808_BUCK_VSEL_MASK, | |
518 | .enable_reg = RK808_DCDC_EN_REG, | |
519 | .enable_mask = BIT(0), | |
520 | .owner = THIS_MODULE, | |
521 | }, { | |
522 | .name = "DCDC_REG2", | |
b8074eba | 523 | .supply_name = "vcc2", |
9e9daa0a WE |
524 | .of_match = of_match_ptr("DCDC_REG2"), |
525 | .regulators_node = of_match_ptr("regulators"), | |
2cd64ae3 | 526 | .id = RK808_ID_DCDC2, |
8af25227 | 527 | .ops = &rk808_buck1_2_ops, |
2cd64ae3 | 528 | .type = REGULATOR_VOLTAGE, |
afcd666d WE |
529 | .min_uV = 712500, |
530 | .uV_step = 12500, | |
2cd64ae3 | 531 | .n_voltages = 64, |
2cd64ae3 CZ |
532 | .vsel_reg = RK808_BUCK2_ON_VSEL_REG, |
533 | .vsel_mask = RK808_BUCK_VSEL_MASK, | |
534 | .enable_reg = RK808_DCDC_EN_REG, | |
535 | .enable_mask = BIT(1), | |
536 | .owner = THIS_MODULE, | |
537 | }, { | |
538 | .name = "DCDC_REG3", | |
b8074eba | 539 | .supply_name = "vcc3", |
9e9daa0a WE |
540 | .of_match = of_match_ptr("DCDC_REG3"), |
541 | .regulators_node = of_match_ptr("regulators"), | |
2cd64ae3 CZ |
542 | .id = RK808_ID_DCDC3, |
543 | .ops = &rk808_switch_ops, | |
544 | .type = REGULATOR_VOLTAGE, | |
545 | .n_voltages = 1, | |
546 | .enable_reg = RK808_DCDC_EN_REG, | |
547 | .enable_mask = BIT(2), | |
548 | .owner = THIS_MODULE, | |
9e9daa0a WE |
549 | }, |
550 | RK8XX_DESC(RK808_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3300, 100, | |
551 | RK808_BUCK4_ON_VSEL_REG, RK808_BUCK4_VSEL_MASK, | |
552 | RK808_DCDC_EN_REG, BIT(3), 0), | |
553 | RK8XX_DESC(RK808_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100, | |
554 | RK808_LDO1_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
555 | BIT(0), 400), | |
556 | RK8XX_DESC(RK808_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100, | |
557 | RK808_LDO2_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
558 | BIT(1), 400), | |
559 | { | |
2cd64ae3 | 560 | .name = "LDO_REG3", |
b8074eba | 561 | .supply_name = "vcc7", |
9e9daa0a WE |
562 | .of_match = of_match_ptr("LDO_REG3"), |
563 | .regulators_node = of_match_ptr("regulators"), | |
2cd64ae3 | 564 | .id = RK808_ID_LDO3, |
129d7cf9 | 565 | .ops = &rk808_reg_ops_ranges, |
2cd64ae3 CZ |
566 | .type = REGULATOR_VOLTAGE, |
567 | .n_voltages = 16, | |
568 | .linear_ranges = rk808_ldo3_voltage_ranges, | |
569 | .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges), | |
570 | .vsel_reg = RK808_LDO3_ON_VSEL_REG, | |
571 | .vsel_mask = RK808_BUCK4_VSEL_MASK, | |
572 | .enable_reg = RK808_LDO_EN_REG, | |
573 | .enable_mask = BIT(2), | |
28249b0c | 574 | .enable_time = 400, |
2cd64ae3 | 575 | .owner = THIS_MODULE, |
2cd64ae3 | 576 | }, |
9e9daa0a WE |
577 | RK8XX_DESC(RK808_ID_LDO4, "LDO_REG4", "vcc9", 1800, 3400, 100, |
578 | RK808_LDO4_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
579 | BIT(3), 400), | |
580 | RK8XX_DESC(RK808_ID_LDO5, "LDO_REG5", "vcc9", 1800, 3400, 100, | |
581 | RK808_LDO5_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
582 | BIT(4), 400), | |
583 | RK8XX_DESC(RK808_ID_LDO6, "LDO_REG6", "vcc10", 800, 2500, 100, | |
584 | RK808_LDO6_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
585 | BIT(5), 400), | |
586 | RK8XX_DESC(RK808_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100, | |
587 | RK808_LDO7_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
588 | BIT(6), 400), | |
589 | RK8XX_DESC(RK808_ID_LDO8, "LDO_REG8", "vcc11", 1800, 3400, 100, | |
590 | RK808_LDO8_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, | |
591 | BIT(7), 400), | |
592 | RK8XX_DESC_SWITCH(RK808_ID_SWITCH1, "SWITCH_REG1", "vcc8", | |
593 | RK808_DCDC_EN_REG, BIT(5)), | |
594 | RK8XX_DESC_SWITCH(RK808_ID_SWITCH2, "SWITCH_REG2", "vcc12", | |
595 | RK808_DCDC_EN_REG, BIT(6)), | |
2cd64ae3 CZ |
596 | }; |
597 | ||
11375293 WE |
598 | static const struct regulator_desc rk818_reg[] = { |
599 | { | |
600 | .name = "DCDC_REG1", | |
601 | .supply_name = "vcc1", | |
602 | .of_match = of_match_ptr("DCDC_REG1"), | |
603 | .regulators_node = of_match_ptr("regulators"), | |
604 | .id = RK818_ID_DCDC1, | |
605 | .ops = &rk808_reg_ops, | |
606 | .type = REGULATOR_VOLTAGE, | |
607 | .min_uV = 712500, | |
608 | .uV_step = 12500, | |
609 | .n_voltages = 64, | |
610 | .vsel_reg = RK818_BUCK1_ON_VSEL_REG, | |
611 | .vsel_mask = RK818_BUCK_VSEL_MASK, | |
612 | .enable_reg = RK818_DCDC_EN_REG, | |
613 | .enable_mask = BIT(0), | |
614 | .owner = THIS_MODULE, | |
615 | }, { | |
616 | .name = "DCDC_REG2", | |
617 | .supply_name = "vcc2", | |
618 | .of_match = of_match_ptr("DCDC_REG2"), | |
619 | .regulators_node = of_match_ptr("regulators"), | |
620 | .id = RK818_ID_DCDC2, | |
621 | .ops = &rk808_reg_ops, | |
622 | .type = REGULATOR_VOLTAGE, | |
623 | .min_uV = 712500, | |
624 | .uV_step = 12500, | |
625 | .n_voltages = 64, | |
626 | .vsel_reg = RK818_BUCK2_ON_VSEL_REG, | |
627 | .vsel_mask = RK818_BUCK_VSEL_MASK, | |
628 | .enable_reg = RK818_DCDC_EN_REG, | |
629 | .enable_mask = BIT(1), | |
630 | .owner = THIS_MODULE, | |
631 | }, { | |
632 | .name = "DCDC_REG3", | |
633 | .supply_name = "vcc3", | |
634 | .of_match = of_match_ptr("DCDC_REG3"), | |
635 | .regulators_node = of_match_ptr("regulators"), | |
636 | .id = RK818_ID_DCDC3, | |
637 | .ops = &rk808_switch_ops, | |
638 | .type = REGULATOR_VOLTAGE, | |
639 | .n_voltages = 1, | |
640 | .enable_reg = RK818_DCDC_EN_REG, | |
641 | .enable_mask = BIT(2), | |
642 | .owner = THIS_MODULE, | |
643 | }, | |
644 | RK8XX_DESC(RK818_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3600, 100, | |
645 | RK818_BUCK4_ON_VSEL_REG, RK818_BUCK4_VSEL_MASK, | |
646 | RK818_DCDC_EN_REG, BIT(3), 0), | |
647 | RK8XX_DESC(RK818_ID_BOOST, "DCDC_BOOST", "boost", 4700, 5400, 100, | |
648 | RK818_BOOST_LDO9_ON_VSEL_REG, RK818_BOOST_ON_VSEL_MASK, | |
649 | RK818_DCDC_EN_REG, BIT(4), 0), | |
650 | RK8XX_DESC(RK818_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100, | |
651 | RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
652 | BIT(0), 400), | |
653 | RK8XX_DESC(RK818_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100, | |
75f88115 | 654 | RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, |
11375293 WE |
655 | BIT(1), 400), |
656 | { | |
657 | .name = "LDO_REG3", | |
658 | .supply_name = "vcc7", | |
659 | .of_match = of_match_ptr("LDO_REG3"), | |
660 | .regulators_node = of_match_ptr("regulators"), | |
661 | .id = RK818_ID_LDO3, | |
662 | .ops = &rk808_reg_ops_ranges, | |
663 | .type = REGULATOR_VOLTAGE, | |
664 | .n_voltages = 16, | |
665 | .linear_ranges = rk808_ldo3_voltage_ranges, | |
666 | .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges), | |
667 | .vsel_reg = RK818_LDO3_ON_VSEL_REG, | |
668 | .vsel_mask = RK818_LDO3_ON_VSEL_MASK, | |
669 | .enable_reg = RK818_LDO_EN_REG, | |
670 | .enable_mask = BIT(2), | |
671 | .enable_time = 400, | |
672 | .owner = THIS_MODULE, | |
673 | }, | |
674 | RK8XX_DESC(RK818_ID_LDO4, "LDO_REG4", "vcc8", 1800, 3400, 100, | |
675 | RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
676 | BIT(3), 400), | |
677 | RK8XX_DESC(RK818_ID_LDO5, "LDO_REG5", "vcc7", 1800, 3400, 100, | |
678 | RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
679 | BIT(4), 400), | |
680 | RK8XX_DESC(RK818_ID_LDO6, "LDO_REG6", "vcc8", 800, 2500, 100, | |
681 | RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
682 | BIT(5), 400), | |
683 | RK8XX_DESC(RK818_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100, | |
684 | RK818_LDO7_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
685 | BIT(6), 400), | |
686 | RK8XX_DESC(RK818_ID_LDO8, "LDO_REG8", "vcc8", 1800, 3400, 100, | |
687 | RK818_LDO8_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, | |
688 | BIT(7), 400), | |
689 | RK8XX_DESC(RK818_ID_LDO9, "LDO_REG9", "vcc9", 1800, 3400, 100, | |
690 | RK818_BOOST_LDO9_ON_VSEL_REG, RK818_LDO_VSEL_MASK, | |
691 | RK818_DCDC_EN_REG, BIT(5), 400), | |
692 | RK8XX_DESC_SWITCH(RK818_ID_SWITCH, "SWITCH_REG", "vcc9", | |
693 | RK818_DCDC_EN_REG, BIT(6)), | |
694 | RK8XX_DESC_SWITCH(RK818_ID_HDMI_SWITCH, "HDMI_SWITCH", "h_5v", | |
695 | RK818_H5V_EN_REG, BIT(0)), | |
696 | RK8XX_DESC_SWITCH(RK818_ID_OTG_SWITCH, "OTG_SWITCH", "usb", | |
697 | RK818_DCDC_EN_REG, BIT(7)), | |
698 | }; | |
699 | ||
bad47ad2 CZ |
700 | static int rk808_regulator_dt_parse_pdata(struct device *dev, |
701 | struct device *client_dev, | |
702 | struct regmap *map, | |
703 | struct rk808_regulator_data *pdata) | |
704 | { | |
705 | struct device_node *np; | |
9e9daa0a | 706 | int tmp, ret = 0, i; |
bad47ad2 CZ |
707 | |
708 | np = of_get_child_by_name(client_dev->of_node, "regulators"); | |
709 | if (!np) | |
710 | return -ENXIO; | |
711 | ||
bad47ad2 | 712 | for (i = 0; i < ARRAY_SIZE(pdata->dvs_gpio); i++) { |
a13eaf02 UKK |
713 | pdata->dvs_gpio[i] = |
714 | devm_gpiod_get_index_optional(client_dev, "dvs", i, | |
715 | GPIOD_OUT_LOW); | |
bad47ad2 | 716 | if (IS_ERR(pdata->dvs_gpio[i])) { |
a13eaf02 UKK |
717 | ret = PTR_ERR(pdata->dvs_gpio[i]); |
718 | dev_err(dev, "failed to get dvs%d gpio (%d)\n", i, ret); | |
719 | goto dt_parse_end; | |
720 | } | |
721 | ||
722 | if (!pdata->dvs_gpio[i]) { | |
bad47ad2 CZ |
723 | dev_warn(dev, "there is no dvs%d gpio\n", i); |
724 | continue; | |
725 | } | |
726 | ||
bad47ad2 CZ |
727 | tmp = i ? RK808_DVS2_POL : RK808_DVS1_POL; |
728 | ret = regmap_update_bits(map, RK808_IO_POL_REG, tmp, | |
729 | gpiod_is_active_low(pdata->dvs_gpio[i]) ? | |
730 | 0 : tmp); | |
731 | } | |
732 | ||
733 | dt_parse_end: | |
734 | of_node_put(np); | |
735 | return ret; | |
736 | } | |
737 | ||
2cd64ae3 CZ |
738 | static int rk808_regulator_probe(struct platform_device *pdev) |
739 | { | |
740 | struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); | |
d76c333e | 741 | struct i2c_client *client = rk808->i2c; |
462004f1 | 742 | struct regulator_config config = {}; |
2cd64ae3 | 743 | struct regulator_dev *rk808_rdev; |
bad47ad2 | 744 | struct rk808_regulator_data *pdata; |
11375293 WE |
745 | const struct regulator_desc *regulators; |
746 | int ret, i, nregulators; | |
2cd64ae3 | 747 | |
bad47ad2 CZ |
748 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
749 | if (!pdata) | |
750 | return -ENOMEM; | |
2cd64ae3 | 751 | |
bad47ad2 CZ |
752 | ret = rk808_regulator_dt_parse_pdata(&pdev->dev, &client->dev, |
753 | rk808->regmap, pdata); | |
571a4010 | 754 | if (ret < 0) |
2cd64ae3 CZ |
755 | return ret; |
756 | ||
bad47ad2 CZ |
757 | platform_set_drvdata(pdev, pdata); |
758 | ||
11375293 | 759 | switch (rk808->variant) { |
c4e0d344 EZ |
760 | case RK805_ID: |
761 | regulators = rk805_reg; | |
762 | nregulators = RK805_NUM_REGULATORS; | |
763 | break; | |
11375293 WE |
764 | case RK808_ID: |
765 | regulators = rk808_reg; | |
766 | nregulators = RK808_NUM_REGULATORS; | |
767 | break; | |
768 | case RK818_ID: | |
769 | regulators = rk818_reg; | |
770 | nregulators = RK818_NUM_REGULATORS; | |
771 | break; | |
772 | default: | |
773 | dev_err(&client->dev, "unsupported RK8XX ID %lu\n", | |
774 | rk808->variant); | |
775 | return -EINVAL; | |
776 | } | |
777 | ||
9e9daa0a WE |
778 | config.dev = &client->dev; |
779 | config.driver_data = pdata; | |
780 | config.regmap = rk808->regmap; | |
781 | ||
2cd64ae3 | 782 | /* Instantiate the regulators */ |
11375293 | 783 | for (i = 0; i < nregulators; i++) { |
2cd64ae3 | 784 | rk808_rdev = devm_regulator_register(&pdev->dev, |
11375293 | 785 | ®ulators[i], &config); |
2cd64ae3 | 786 | if (IS_ERR(rk808_rdev)) { |
d76c333e | 787 | dev_err(&client->dev, |
2cd64ae3 CZ |
788 | "failed to register %d regulator\n", i); |
789 | return PTR_ERR(rk808_rdev); | |
790 | } | |
2cd64ae3 | 791 | } |
571a4010 | 792 | |
2cd64ae3 CZ |
793 | return 0; |
794 | } | |
795 | ||
796 | static struct platform_driver rk808_regulator_driver = { | |
797 | .probe = rk808_regulator_probe, | |
798 | .driver = { | |
556ae220 | 799 | .name = "rk808-regulator" |
2cd64ae3 CZ |
800 | }, |
801 | }; | |
802 | ||
803 | module_platform_driver(rk808_regulator_driver); | |
804 | ||
a7567663 | 805 | MODULE_DESCRIPTION("regulator driver for the RK805/RK808/RK818 series PMICs"); |
11375293 WE |
806 | MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>"); |
807 | MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>"); | |
808 | MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>"); | |
2cd64ae3 CZ |
809 | MODULE_LICENSE("GPL"); |
810 | MODULE_ALIAS("platform:rk808-regulator"); |