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e92a4047 SB |
1 | /* |
2 | * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 and | |
6 | * only version 2 as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/bitops.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/of.h> | |
22 | #include <linux/of_device.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/ktime.h> | |
25 | #include <linux/regulator/driver.h> | |
26 | #include <linux/regmap.h> | |
27 | #include <linux/list.h> | |
28 | ||
29 | /* These types correspond to unique register layouts. */ | |
30 | enum spmi_regulator_logical_type { | |
31 | SPMI_REGULATOR_LOGICAL_TYPE_SMPS, | |
32 | SPMI_REGULATOR_LOGICAL_TYPE_LDO, | |
33 | SPMI_REGULATOR_LOGICAL_TYPE_VS, | |
34 | SPMI_REGULATOR_LOGICAL_TYPE_BOOST, | |
35 | SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS, | |
36 | SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP, | |
37 | SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO, | |
38 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, | |
39 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, | |
40 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, | |
41 | }; | |
42 | ||
43 | enum spmi_regulator_type { | |
44 | SPMI_REGULATOR_TYPE_BUCK = 0x03, | |
45 | SPMI_REGULATOR_TYPE_LDO = 0x04, | |
46 | SPMI_REGULATOR_TYPE_VS = 0x05, | |
47 | SPMI_REGULATOR_TYPE_BOOST = 0x1b, | |
48 | SPMI_REGULATOR_TYPE_FTS = 0x1c, | |
49 | SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f, | |
50 | SPMI_REGULATOR_TYPE_ULT_LDO = 0x21, | |
51 | SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22, | |
52 | }; | |
53 | ||
54 | enum spmi_regulator_subtype { | |
55 | SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08, | |
56 | SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09, | |
57 | SPMI_REGULATOR_SUBTYPE_N50 = 0x01, | |
58 | SPMI_REGULATOR_SUBTYPE_N150 = 0x02, | |
59 | SPMI_REGULATOR_SUBTYPE_N300 = 0x03, | |
60 | SPMI_REGULATOR_SUBTYPE_N600 = 0x04, | |
61 | SPMI_REGULATOR_SUBTYPE_N1200 = 0x05, | |
62 | SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06, | |
63 | SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07, | |
64 | SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14, | |
65 | SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15, | |
66 | SPMI_REGULATOR_SUBTYPE_P50 = 0x08, | |
67 | SPMI_REGULATOR_SUBTYPE_P150 = 0x09, | |
68 | SPMI_REGULATOR_SUBTYPE_P300 = 0x0a, | |
69 | SPMI_REGULATOR_SUBTYPE_P600 = 0x0b, | |
70 | SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c, | |
71 | SPMI_REGULATOR_SUBTYPE_LN = 0x10, | |
72 | SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28, | |
73 | SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29, | |
74 | SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a, | |
75 | SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b, | |
76 | SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c, | |
77 | SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d, | |
78 | SPMI_REGULATOR_SUBTYPE_LV100 = 0x01, | |
79 | SPMI_REGULATOR_SUBTYPE_LV300 = 0x02, | |
80 | SPMI_REGULATOR_SUBTYPE_MV300 = 0x08, | |
81 | SPMI_REGULATOR_SUBTYPE_MV500 = 0x09, | |
82 | SPMI_REGULATOR_SUBTYPE_HDMI = 0x10, | |
83 | SPMI_REGULATOR_SUBTYPE_OTG = 0x11, | |
84 | SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, | |
85 | SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, | |
86 | SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, | |
87 | SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, | |
88 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, | |
89 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, | |
90 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, | |
91 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, | |
92 | }; | |
93 | ||
94 | enum spmi_common_regulator_registers { | |
95 | SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01, | |
96 | SPMI_COMMON_REG_TYPE = 0x04, | |
97 | SPMI_COMMON_REG_SUBTYPE = 0x05, | |
98 | SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40, | |
99 | SPMI_COMMON_REG_VOLTAGE_SET = 0x41, | |
100 | SPMI_COMMON_REG_MODE = 0x45, | |
101 | SPMI_COMMON_REG_ENABLE = 0x46, | |
102 | SPMI_COMMON_REG_PULL_DOWN = 0x48, | |
103 | SPMI_COMMON_REG_SOFT_START = 0x4c, | |
104 | SPMI_COMMON_REG_STEP_CTRL = 0x61, | |
105 | }; | |
106 | ||
107 | enum spmi_vs_registers { | |
108 | SPMI_VS_REG_OCP = 0x4a, | |
109 | SPMI_VS_REG_SOFT_START = 0x4c, | |
110 | }; | |
111 | ||
112 | enum spmi_boost_registers { | |
113 | SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a, | |
114 | }; | |
115 | ||
116 | enum spmi_boost_byp_registers { | |
117 | SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b, | |
118 | }; | |
119 | ||
120 | /* Used for indexing into ctrl_reg. These are offets from 0x40 */ | |
121 | enum spmi_common_control_register_index { | |
122 | SPMI_COMMON_IDX_VOLTAGE_RANGE = 0, | |
123 | SPMI_COMMON_IDX_VOLTAGE_SET = 1, | |
124 | SPMI_COMMON_IDX_MODE = 5, | |
125 | SPMI_COMMON_IDX_ENABLE = 6, | |
126 | }; | |
127 | ||
128 | /* Common regulator control register layout */ | |
129 | #define SPMI_COMMON_ENABLE_MASK 0x80 | |
130 | #define SPMI_COMMON_ENABLE 0x80 | |
131 | #define SPMI_COMMON_DISABLE 0x00 | |
132 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08 | |
133 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04 | |
134 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02 | |
135 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01 | |
136 | #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f | |
137 | ||
138 | /* Common regulator mode register layout */ | |
139 | #define SPMI_COMMON_MODE_HPM_MASK 0x80 | |
140 | #define SPMI_COMMON_MODE_AUTO_MASK 0x40 | |
141 | #define SPMI_COMMON_MODE_BYPASS_MASK 0x20 | |
142 | #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10 | |
143 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08 | |
144 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04 | |
145 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02 | |
146 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 | |
147 | #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f | |
148 | ||
149 | /* Common regulator pull down control register layout */ | |
150 | #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 | |
151 | ||
152 | /* LDO regulator current limit control register layout */ | |
153 | #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80 | |
154 | ||
155 | /* LDO regulator soft start control register layout */ | |
156 | #define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80 | |
157 | ||
158 | /* VS regulator over current protection control register layout */ | |
159 | #define SPMI_VS_OCP_OVERRIDE 0x01 | |
160 | #define SPMI_VS_OCP_NO_OVERRIDE 0x00 | |
161 | ||
162 | /* VS regulator soft start control register layout */ | |
163 | #define SPMI_VS_SOFT_START_ENABLE_MASK 0x80 | |
164 | #define SPMI_VS_SOFT_START_SEL_MASK 0x03 | |
165 | ||
166 | /* Boost regulator current limit control register layout */ | |
167 | #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80 | |
168 | #define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07 | |
169 | ||
170 | #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10 | |
171 | #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30 | |
172 | #define SPMI_VS_OCP_FALL_DELAY_US 90 | |
173 | #define SPMI_VS_OCP_FAULT_DELAY_US 20000 | |
174 | ||
175 | #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18 | |
176 | #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3 | |
177 | #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07 | |
178 | #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0 | |
179 | ||
180 | /* Clock rate in kHz of the FTSMPS regulator reference clock. */ | |
181 | #define SPMI_FTSMPS_CLOCK_RATE 19200 | |
182 | ||
183 | /* Minimum voltage stepper delay for each step. */ | |
184 | #define SPMI_FTSMPS_STEP_DELAY 8 | |
185 | ||
186 | /* | |
187 | * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to | |
188 | * adjust the step rate in order to account for oscillator variance. | |
189 | */ | |
190 | #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 | |
191 | #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 | |
192 | ||
193 | /* | |
194 | * This voltage in uV is returned by get_voltage functions when there is no way | |
195 | * to determine the current voltage level. It is needed because the regulator | |
196 | * framework treats a 0 uV voltage as an error. | |
197 | */ | |
198 | #define VOLTAGE_UNKNOWN 1 | |
199 | ||
200 | /* VSET value to decide the range of ULT SMPS */ | |
201 | #define ULT_SMPS_RANGE_SPLIT 0x60 | |
202 | ||
203 | /** | |
204 | * struct spmi_voltage_range - regulator set point voltage mapping description | |
205 | * @min_uV: Minimum programmable output voltage resulting from | |
206 | * set point register value 0x00 | |
207 | * @max_uV: Maximum programmable output voltage | |
208 | * @step_uV: Output voltage increase resulting from the set point | |
209 | * register value increasing by 1 | |
210 | * @set_point_min_uV: Minimum allowed voltage | |
211 | * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order | |
212 | * to pick which range should be used in the case of | |
213 | * overlapping set points. | |
214 | * @n_voltages: Number of preferred voltage set points present in this | |
215 | * range | |
216 | * @range_sel: Voltage range register value corresponding to this range | |
217 | * | |
218 | * The following relationships must be true for the values used in this struct: | |
219 | * (max_uV - min_uV) % step_uV == 0 | |
220 | * (set_point_min_uV - min_uV) % step_uV == 0* | |
221 | * (set_point_max_uV - min_uV) % step_uV == 0* | |
222 | * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1 | |
223 | * | |
224 | * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to | |
225 | * specify that the voltage range has meaning, but is not preferred. | |
226 | */ | |
227 | struct spmi_voltage_range { | |
228 | int min_uV; | |
229 | int max_uV; | |
230 | int step_uV; | |
231 | int set_point_min_uV; | |
232 | int set_point_max_uV; | |
233 | unsigned n_voltages; | |
234 | u8 range_sel; | |
235 | }; | |
236 | ||
237 | /* | |
238 | * The ranges specified in the spmi_voltage_set_points struct must be listed | |
239 | * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV. | |
240 | */ | |
241 | struct spmi_voltage_set_points { | |
242 | struct spmi_voltage_range *range; | |
243 | int count; | |
244 | unsigned n_voltages; | |
245 | }; | |
246 | ||
247 | struct spmi_regulator { | |
248 | struct regulator_desc desc; | |
249 | struct device *dev; | |
250 | struct delayed_work ocp_work; | |
251 | struct regmap *regmap; | |
252 | struct spmi_voltage_set_points *set_points; | |
253 | enum spmi_regulator_logical_type logical_type; | |
254 | int ocp_irq; | |
255 | int ocp_count; | |
256 | int ocp_max_retries; | |
257 | int ocp_retry_delay_ms; | |
258 | int hpm_min_load; | |
259 | int slew_rate; | |
260 | ktime_t vs_enable_time; | |
261 | u16 base; | |
262 | struct list_head node; | |
263 | }; | |
264 | ||
265 | struct spmi_regulator_mapping { | |
266 | enum spmi_regulator_type type; | |
267 | enum spmi_regulator_subtype subtype; | |
268 | enum spmi_regulator_logical_type logical_type; | |
269 | u32 revision_min; | |
270 | u32 revision_max; | |
271 | struct regulator_ops *ops; | |
272 | struct spmi_voltage_set_points *set_points; | |
273 | int hpm_min_load; | |
274 | }; | |
275 | ||
276 | struct spmi_regulator_data { | |
277 | const char *name; | |
278 | u16 base; | |
279 | const char *supply; | |
280 | const char *ocp; | |
281 | u16 force_type; | |
282 | }; | |
283 | ||
284 | #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \ | |
285 | _logical_type, _ops_val, _set_points_val, _hpm_min_load) \ | |
286 | { \ | |
287 | .type = SPMI_REGULATOR_TYPE_##_type, \ | |
288 | .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ | |
289 | .revision_min = _dig_major_min, \ | |
290 | .revision_max = _dig_major_max, \ | |
291 | .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \ | |
292 | .ops = &spmi_##_ops_val##_ops, \ | |
293 | .set_points = &_set_points_val##_set_points, \ | |
294 | .hpm_min_load = _hpm_min_load, \ | |
295 | } | |
296 | ||
297 | #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \ | |
298 | { \ | |
299 | .type = SPMI_REGULATOR_TYPE_VS, \ | |
300 | .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ | |
301 | .revision_min = _dig_major_min, \ | |
302 | .revision_max = _dig_major_max, \ | |
303 | .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \ | |
304 | .ops = &spmi_vs_ops, \ | |
305 | } | |
306 | ||
307 | #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \ | |
308 | _set_point_max_uV, _max_uV, _step_uV) \ | |
309 | { \ | |
310 | .min_uV = _min_uV, \ | |
311 | .max_uV = _max_uV, \ | |
312 | .set_point_min_uV = _set_point_min_uV, \ | |
313 | .set_point_max_uV = _set_point_max_uV, \ | |
314 | .step_uV = _step_uV, \ | |
315 | .range_sel = _range_sel, \ | |
316 | } | |
317 | ||
318 | #define DEFINE_SPMI_SET_POINTS(name) \ | |
319 | struct spmi_voltage_set_points name##_set_points = { \ | |
320 | .range = name##_ranges, \ | |
321 | .count = ARRAY_SIZE(name##_ranges), \ | |
322 | } | |
323 | ||
324 | /* | |
325 | * These tables contain the physically available PMIC regulator voltage setpoint | |
326 | * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed | |
327 | * to ensure that the setpoints available to software are monotonically | |
328 | * increasing and unique. The set_voltage callback functions expect these | |
329 | * properties to hold. | |
330 | */ | |
331 | static struct spmi_voltage_range pldo_ranges[] = { | |
332 | SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), | |
333 | SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000), | |
334 | SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000), | |
335 | }; | |
336 | ||
337 | static struct spmi_voltage_range nldo1_ranges[] = { | |
338 | SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), | |
339 | }; | |
340 | ||
341 | static struct spmi_voltage_range nldo2_ranges[] = { | |
342 | SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500), | |
343 | SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250), | |
344 | SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500), | |
345 | }; | |
346 | ||
347 | static struct spmi_voltage_range nldo3_ranges[] = { | |
348 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), | |
349 | SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500), | |
350 | SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500), | |
351 | }; | |
352 | ||
353 | static struct spmi_voltage_range ln_ldo_ranges[] = { | |
354 | SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000), | |
355 | SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000), | |
356 | }; | |
357 | ||
358 | static struct spmi_voltage_range smps_ranges[] = { | |
359 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), | |
360 | SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000), | |
361 | }; | |
362 | ||
363 | static struct spmi_voltage_range ftsmps_ranges[] = { | |
364 | SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000), | |
365 | SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000), | |
366 | }; | |
367 | ||
368 | static struct spmi_voltage_range ftsmps2p5_ranges[] = { | |
369 | SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000), | |
370 | SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), | |
371 | }; | |
372 | ||
373 | static struct spmi_voltage_range boost_ranges[] = { | |
374 | SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), | |
375 | }; | |
376 | ||
377 | static struct spmi_voltage_range boost_byp_ranges[] = { | |
378 | SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000), | |
379 | }; | |
380 | ||
381 | static struct spmi_voltage_range ult_lo_smps_ranges[] = { | |
382 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), | |
383 | SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000), | |
384 | }; | |
385 | ||
386 | static struct spmi_voltage_range ult_ho_smps_ranges[] = { | |
387 | SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000), | |
388 | }; | |
389 | ||
390 | static struct spmi_voltage_range ult_nldo_ranges[] = { | |
391 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), | |
392 | }; | |
393 | ||
394 | static struct spmi_voltage_range ult_pldo_ranges[] = { | |
395 | SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), | |
396 | }; | |
397 | ||
398 | static DEFINE_SPMI_SET_POINTS(pldo); | |
399 | static DEFINE_SPMI_SET_POINTS(nldo1); | |
400 | static DEFINE_SPMI_SET_POINTS(nldo2); | |
401 | static DEFINE_SPMI_SET_POINTS(nldo3); | |
402 | static DEFINE_SPMI_SET_POINTS(ln_ldo); | |
403 | static DEFINE_SPMI_SET_POINTS(smps); | |
404 | static DEFINE_SPMI_SET_POINTS(ftsmps); | |
405 | static DEFINE_SPMI_SET_POINTS(ftsmps2p5); | |
406 | static DEFINE_SPMI_SET_POINTS(boost); | |
407 | static DEFINE_SPMI_SET_POINTS(boost_byp); | |
408 | static DEFINE_SPMI_SET_POINTS(ult_lo_smps); | |
409 | static DEFINE_SPMI_SET_POINTS(ult_ho_smps); | |
410 | static DEFINE_SPMI_SET_POINTS(ult_nldo); | |
411 | static DEFINE_SPMI_SET_POINTS(ult_pldo); | |
412 | ||
413 | static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, | |
414 | int len) | |
415 | { | |
416 | return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); | |
417 | } | |
418 | ||
419 | static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, | |
420 | u8 *buf, int len) | |
421 | { | |
422 | return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); | |
423 | } | |
424 | ||
425 | static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, | |
426 | u8 mask) | |
427 | { | |
428 | return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); | |
429 | } | |
430 | ||
431 | static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev) | |
432 | { | |
433 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
434 | u8 reg; | |
435 | ||
436 | spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, ®, 1); | |
437 | ||
438 | return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE; | |
439 | } | |
440 | ||
441 | static int spmi_regulator_common_enable(struct regulator_dev *rdev) | |
442 | { | |
443 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
444 | ||
445 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, | |
446 | SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); | |
447 | } | |
448 | ||
449 | static int spmi_regulator_vs_enable(struct regulator_dev *rdev) | |
450 | { | |
451 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
452 | ||
453 | if (vreg->ocp_irq) { | |
454 | vreg->ocp_count = 0; | |
455 | vreg->vs_enable_time = ktime_get(); | |
456 | } | |
457 | ||
458 | return spmi_regulator_common_enable(rdev); | |
459 | } | |
460 | ||
461 | static int spmi_regulator_common_disable(struct regulator_dev *rdev) | |
462 | { | |
463 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
464 | ||
465 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, | |
466 | SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); | |
467 | } | |
468 | ||
469 | static int spmi_regulator_select_voltage(struct spmi_regulator *vreg, | |
470 | int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel, | |
471 | unsigned *selector) | |
472 | { | |
473 | const struct spmi_voltage_range *range; | |
474 | int uV = min_uV; | |
475 | int lim_min_uV, lim_max_uV, i, range_id, range_max_uV; | |
476 | ||
477 | /* Check if request voltage is outside of physically settable range. */ | |
478 | lim_min_uV = vreg->set_points->range[0].set_point_min_uV; | |
479 | lim_max_uV = | |
480 | vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV; | |
481 | ||
482 | if (uV < lim_min_uV && max_uV >= lim_min_uV) | |
483 | uV = lim_min_uV; | |
484 | ||
485 | if (uV < lim_min_uV || uV > lim_max_uV) { | |
486 | dev_err(vreg->dev, | |
487 | "request v=[%d, %d] is outside possible v=[%d, %d]\n", | |
488 | min_uV, max_uV, lim_min_uV, lim_max_uV); | |
489 | return -EINVAL; | |
490 | } | |
491 | ||
492 | /* Find the range which uV is inside of. */ | |
493 | for (i = vreg->set_points->count - 1; i > 0; i--) { | |
494 | range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV; | |
495 | if (uV > range_max_uV && range_max_uV > 0) | |
496 | break; | |
497 | } | |
498 | ||
499 | range_id = i; | |
500 | range = &vreg->set_points->range[range_id]; | |
501 | *range_sel = range->range_sel; | |
502 | ||
503 | /* | |
504 | * Force uV to be an allowed set point by applying a ceiling function to | |
505 | * the uV value. | |
506 | */ | |
507 | *voltage_sel = (uV - range->min_uV + range->step_uV - 1) | |
508 | / range->step_uV; | |
509 | uV = *voltage_sel * range->step_uV + range->min_uV; | |
510 | ||
511 | if (uV > max_uV) { | |
512 | dev_err(vreg->dev, | |
513 | "request v=[%d, %d] cannot be met by any set point; " | |
514 | "next set point: %d\n", | |
515 | min_uV, max_uV, uV); | |
516 | return -EINVAL; | |
517 | } | |
518 | ||
519 | *selector = 0; | |
520 | for (i = 0; i < range_id; i++) | |
521 | *selector += vreg->set_points->range[i].n_voltages; | |
522 | *selector += (uV - range->set_point_min_uV) / range->step_uV; | |
523 | ||
524 | return 0; | |
525 | } | |
526 | ||
527 | static const struct spmi_voltage_range * | |
528 | spmi_regulator_find_range(struct spmi_regulator *vreg) | |
529 | { | |
530 | u8 range_sel; | |
531 | const struct spmi_voltage_range *range, *end; | |
532 | ||
533 | range = vreg->set_points->range; | |
534 | end = range + vreg->set_points->count; | |
535 | ||
536 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1); | |
537 | ||
538 | for (; range < end; range++) | |
539 | if (range->range_sel == range_sel) | |
540 | return range; | |
541 | ||
542 | return NULL; | |
543 | } | |
544 | ||
545 | static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg, | |
546 | int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel, | |
547 | unsigned *selector) | |
548 | { | |
549 | const struct spmi_voltage_range *range; | |
550 | int uV = min_uV; | |
551 | int i; | |
552 | ||
553 | range = spmi_regulator_find_range(vreg); | |
554 | if (!range) | |
555 | goto different_range; | |
556 | ||
557 | if (uV < range->min_uV && max_uV >= range->min_uV) | |
558 | uV = range->min_uV; | |
559 | ||
560 | if (uV < range->min_uV || uV > range->max_uV) { | |
561 | /* Current range doesn't support the requested voltage. */ | |
562 | goto different_range; | |
563 | } | |
564 | ||
565 | /* | |
566 | * Force uV to be an allowed set point by applying a ceiling function to | |
567 | * the uV value. | |
568 | */ | |
569 | *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); | |
570 | uV = *voltage_sel * range->step_uV + range->min_uV; | |
571 | ||
572 | if (uV > max_uV) { | |
573 | /* | |
574 | * No set point in the current voltage range is within the | |
575 | * requested min_uV to max_uV range. | |
576 | */ | |
577 | goto different_range; | |
578 | } | |
579 | ||
580 | *selector = 0; | |
581 | for (i = 0; i < vreg->set_points->count; i++) { | |
582 | if (uV >= vreg->set_points->range[i].set_point_min_uV | |
583 | && uV <= vreg->set_points->range[i].set_point_max_uV) | |
584 | *selector += | |
585 | (uV - vreg->set_points->range[i].set_point_min_uV) | |
586 | / vreg->set_points->range[i].step_uV; | |
587 | break; | |
588 | ||
589 | *selector += vreg->set_points->range[i].n_voltages; | |
590 | } | |
591 | ||
592 | if (*selector >= vreg->set_points->n_voltages) | |
593 | goto different_range; | |
594 | ||
595 | return 0; | |
596 | ||
597 | different_range: | |
598 | return spmi_regulator_select_voltage(vreg, min_uV, max_uV, | |
599 | range_sel, voltage_sel, selector); | |
600 | } | |
601 | ||
602 | static int spmi_regulator_common_set_voltage(struct regulator_dev *rdev, | |
603 | int min_uV, int max_uV, unsigned *selector) | |
604 | { | |
605 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
606 | int ret; | |
607 | u8 buf[2]; | |
608 | u8 range_sel, voltage_sel; | |
609 | ||
610 | /* | |
611 | * Favor staying in the current voltage range if possible. This avoids | |
612 | * voltage spikes that occur when changing the voltage range. | |
613 | */ | |
614 | ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV, | |
615 | &range_sel, &voltage_sel, selector); | |
616 | if (ret) | |
617 | return ret; | |
618 | ||
619 | buf[0] = range_sel; | |
620 | buf[1] = voltage_sel; | |
621 | return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); | |
622 | } | |
623 | ||
624 | static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, | |
625 | unsigned int old_selector, unsigned int new_selector) | |
626 | { | |
627 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
628 | const struct spmi_voltage_range *range; | |
629 | int diff_uV; | |
630 | ||
631 | range = spmi_regulator_find_range(vreg); | |
632 | if (!range) | |
633 | return -EINVAL; | |
634 | ||
635 | diff_uV = abs(new_selector - old_selector) * range->step_uV; | |
636 | ||
637 | return DIV_ROUND_UP(diff_uV, vreg->slew_rate); | |
638 | } | |
639 | ||
640 | static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) | |
641 | { | |
642 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
643 | const struct spmi_voltage_range *range; | |
644 | u8 voltage_sel; | |
645 | ||
646 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); | |
647 | ||
648 | range = spmi_regulator_find_range(vreg); | |
649 | if (!range) | |
650 | return VOLTAGE_UNKNOWN; | |
651 | ||
652 | return range->step_uV * voltage_sel + range->min_uV; | |
653 | } | |
654 | ||
655 | static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, | |
656 | int min_uV, int max_uV, unsigned *selector) | |
657 | { | |
658 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
659 | int ret; | |
660 | u8 range_sel, sel; | |
661 | ||
662 | ret = spmi_regulator_select_voltage(vreg, min_uV, max_uV, &range_sel, | |
663 | &sel, selector); | |
664 | if (ret) { | |
665 | dev_err(vreg->dev, "could not set voltage, ret=%d\n", ret); | |
666 | return ret; | |
667 | } | |
668 | ||
669 | /* | |
670 | * Certain types of regulators do not have a range select register so | |
671 | * only voltage set register needs to be written. | |
672 | */ | |
673 | return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1); | |
674 | } | |
675 | ||
676 | static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) | |
677 | { | |
678 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
679 | const struct spmi_voltage_range *range = vreg->set_points->range; | |
680 | u8 voltage_sel; | |
681 | ||
682 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); | |
683 | ||
684 | return range->step_uV * voltage_sel + range->min_uV; | |
685 | } | |
686 | ||
687 | static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, | |
688 | int min_uV, int max_uV, unsigned *selector) | |
689 | { | |
690 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
691 | int ret; | |
692 | u8 range_sel, voltage_sel; | |
693 | ||
694 | /* | |
695 | * Favor staying in the current voltage range if possible. This avoids | |
696 | * voltage spikes that occur when changing the voltage range. | |
697 | */ | |
698 | ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV, | |
699 | &range_sel, &voltage_sel, selector); | |
700 | if (ret) | |
701 | return ret; | |
702 | ||
703 | /* | |
704 | * Calculate VSET based on range | |
705 | * In case of range 0: voltage_sel is a 7 bit value, can be written | |
706 | * witout any modification. | |
707 | * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to | |
708 | * [011]. | |
709 | */ | |
710 | if (range_sel == 1) | |
711 | voltage_sel |= ULT_SMPS_RANGE_SPLIT; | |
712 | ||
713 | ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET, | |
714 | voltage_sel, 0xff); | |
715 | if (ret) | |
716 | return ret; | |
717 | ||
718 | return 0; | |
719 | } | |
720 | ||
721 | static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) | |
722 | { | |
723 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
724 | const struct spmi_voltage_range *range; | |
725 | u8 voltage_sel; | |
726 | ||
727 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); | |
728 | ||
729 | range = spmi_regulator_find_range(vreg); | |
730 | if (!range) | |
731 | return VOLTAGE_UNKNOWN; | |
732 | ||
733 | if (range->range_sel == 1) | |
734 | voltage_sel &= ~ULT_SMPS_RANGE_SPLIT; | |
735 | ||
736 | return range->step_uV * voltage_sel + range->min_uV; | |
737 | } | |
738 | ||
739 | static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, | |
740 | unsigned selector) | |
741 | { | |
742 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
743 | int uV = 0; | |
744 | int i; | |
745 | ||
746 | if (selector >= vreg->set_points->n_voltages) | |
747 | return 0; | |
748 | ||
749 | for (i = 0; i < vreg->set_points->count; i++) { | |
750 | if (selector < vreg->set_points->range[i].n_voltages) | |
751 | uV = selector * vreg->set_points->range[i].step_uV | |
752 | + vreg->set_points->range[i].set_point_min_uV; | |
753 | break; | |
754 | ||
755 | selector -= vreg->set_points->range[i].n_voltages; | |
756 | } | |
757 | ||
758 | return uV; | |
759 | } | |
760 | ||
761 | static int | |
762 | spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) | |
763 | { | |
764 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
765 | u8 mask = SPMI_COMMON_MODE_BYPASS_MASK; | |
766 | u8 val = 0; | |
767 | ||
768 | if (enable) | |
769 | val = mask; | |
770 | ||
771 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); | |
772 | } | |
773 | ||
774 | static int | |
775 | spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) | |
776 | { | |
777 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
778 | u8 val; | |
779 | int ret; | |
780 | ||
781 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1); | |
782 | *enable = val & SPMI_COMMON_MODE_BYPASS_MASK; | |
783 | ||
784 | return ret; | |
785 | } | |
786 | ||
787 | static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) | |
788 | { | |
789 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
790 | u8 reg; | |
791 | ||
792 | spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); | |
793 | ||
794 | if (reg & SPMI_COMMON_MODE_HPM_MASK) | |
795 | return REGULATOR_MODE_NORMAL; | |
796 | ||
797 | return REGULATOR_MODE_IDLE; | |
798 | } | |
799 | ||
800 | static int | |
801 | spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
802 | { | |
803 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
804 | u8 mask = SPMI_COMMON_MODE_HPM_MASK; | |
805 | u8 val = 0; | |
806 | ||
807 | if (mode == REGULATOR_MODE_NORMAL) | |
808 | val = mask; | |
809 | ||
810 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); | |
811 | } | |
812 | ||
813 | static int | |
814 | spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) | |
815 | { | |
816 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
817 | unsigned int mode; | |
818 | ||
819 | if (load_uA >= vreg->hpm_min_load) | |
820 | mode = REGULATOR_MODE_NORMAL; | |
821 | else | |
822 | mode = REGULATOR_MODE_IDLE; | |
823 | ||
824 | return spmi_regulator_common_set_mode(rdev, mode); | |
825 | } | |
826 | ||
827 | static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) | |
828 | { | |
829 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
830 | unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; | |
831 | ||
832 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, | |
833 | mask, mask); | |
834 | } | |
835 | ||
836 | static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) | |
837 | { | |
838 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
839 | unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK; | |
840 | ||
841 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START, | |
842 | mask, mask); | |
843 | } | |
844 | ||
845 | static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) | |
846 | { | |
847 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); | |
848 | enum spmi_regulator_logical_type type = vreg->logical_type; | |
849 | unsigned int current_reg; | |
850 | u8 reg; | |
851 | u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK | | |
852 | SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; | |
853 | int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500; | |
854 | ||
855 | if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST) | |
856 | current_reg = SPMI_BOOST_REG_CURRENT_LIMIT; | |
857 | else | |
858 | current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT; | |
859 | ||
860 | if (ilim_uA > max || ilim_uA <= 0) | |
861 | return -EINVAL; | |
862 | ||
863 | reg = (ilim_uA - 1) / 500; | |
864 | reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; | |
865 | ||
866 | return spmi_vreg_update_bits(vreg, current_reg, reg, mask); | |
867 | } | |
868 | ||
869 | static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg) | |
870 | { | |
871 | int ret; | |
872 | ||
873 | ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, | |
874 | SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); | |
875 | ||
876 | vreg->vs_enable_time = ktime_get(); | |
877 | ||
878 | ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, | |
879 | SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); | |
880 | ||
881 | return ret; | |
882 | } | |
883 | ||
884 | static void spmi_regulator_vs_ocp_work(struct work_struct *work) | |
885 | { | |
886 | struct delayed_work *dwork = to_delayed_work(work); | |
887 | struct spmi_regulator *vreg | |
888 | = container_of(dwork, struct spmi_regulator, ocp_work); | |
889 | ||
890 | spmi_regulator_vs_clear_ocp(vreg); | |
891 | } | |
892 | ||
893 | static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data) | |
894 | { | |
895 | struct spmi_regulator *vreg = data; | |
896 | ktime_t ocp_irq_time; | |
897 | s64 ocp_trigger_delay_us; | |
898 | ||
899 | ocp_irq_time = ktime_get(); | |
900 | ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time, | |
901 | vreg->vs_enable_time); | |
902 | ||
903 | /* | |
904 | * Reset the OCP count if there is a large delay between switch enable | |
905 | * and when OCP triggers. This is indicative of a hotplug event as | |
906 | * opposed to a fault. | |
907 | */ | |
908 | if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US) | |
909 | vreg->ocp_count = 0; | |
910 | ||
911 | /* Wait for switch output to settle back to 0 V after OCP triggered. */ | |
912 | udelay(SPMI_VS_OCP_FALL_DELAY_US); | |
913 | ||
914 | vreg->ocp_count++; | |
915 | ||
916 | if (vreg->ocp_count == 1) { | |
917 | /* Immediately clear the over current condition. */ | |
918 | spmi_regulator_vs_clear_ocp(vreg); | |
919 | } else if (vreg->ocp_count <= vreg->ocp_max_retries) { | |
920 | /* Schedule the over current clear task to run later. */ | |
921 | schedule_delayed_work(&vreg->ocp_work, | |
922 | msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1); | |
923 | } else { | |
924 | dev_err(vreg->dev, | |
925 | "OCP triggered %d times; no further retries\n", | |
926 | vreg->ocp_count); | |
927 | } | |
928 | ||
929 | return IRQ_HANDLED; | |
930 | } | |
931 | ||
932 | static struct regulator_ops spmi_smps_ops = { | |
933 | .enable = spmi_regulator_common_enable, | |
934 | .disable = spmi_regulator_common_disable, | |
935 | .is_enabled = spmi_regulator_common_is_enabled, | |
936 | .set_voltage = spmi_regulator_common_set_voltage, | |
937 | .get_voltage = spmi_regulator_common_get_voltage, | |
938 | .list_voltage = spmi_regulator_common_list_voltage, | |
939 | .set_mode = spmi_regulator_common_set_mode, | |
940 | .get_mode = spmi_regulator_common_get_mode, | |
941 | .set_load = spmi_regulator_common_set_load, | |
942 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
943 | }; | |
944 | ||
945 | static struct regulator_ops spmi_ldo_ops = { | |
946 | .enable = spmi_regulator_common_enable, | |
947 | .disable = spmi_regulator_common_disable, | |
948 | .is_enabled = spmi_regulator_common_is_enabled, | |
949 | .set_voltage = spmi_regulator_common_set_voltage, | |
950 | .get_voltage = spmi_regulator_common_get_voltage, | |
951 | .list_voltage = spmi_regulator_common_list_voltage, | |
952 | .set_mode = spmi_regulator_common_set_mode, | |
953 | .get_mode = spmi_regulator_common_get_mode, | |
954 | .set_load = spmi_regulator_common_set_load, | |
955 | .set_bypass = spmi_regulator_common_set_bypass, | |
956 | .get_bypass = spmi_regulator_common_get_bypass, | |
957 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
958 | .set_soft_start = spmi_regulator_common_set_soft_start, | |
959 | }; | |
960 | ||
961 | static struct regulator_ops spmi_ln_ldo_ops = { | |
962 | .enable = spmi_regulator_common_enable, | |
963 | .disable = spmi_regulator_common_disable, | |
964 | .is_enabled = spmi_regulator_common_is_enabled, | |
965 | .set_voltage = spmi_regulator_common_set_voltage, | |
966 | .get_voltage = spmi_regulator_common_get_voltage, | |
967 | .list_voltage = spmi_regulator_common_list_voltage, | |
968 | .set_bypass = spmi_regulator_common_set_bypass, | |
969 | .get_bypass = spmi_regulator_common_get_bypass, | |
970 | }; | |
971 | ||
972 | static struct regulator_ops spmi_vs_ops = { | |
973 | .enable = spmi_regulator_vs_enable, | |
974 | .disable = spmi_regulator_common_disable, | |
975 | .is_enabled = spmi_regulator_common_is_enabled, | |
976 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
977 | .set_soft_start = spmi_regulator_common_set_soft_start, | |
978 | }; | |
979 | ||
980 | static struct regulator_ops spmi_boost_ops = { | |
981 | .enable = spmi_regulator_common_enable, | |
982 | .disable = spmi_regulator_common_disable, | |
983 | .is_enabled = spmi_regulator_common_is_enabled, | |
984 | .set_voltage = spmi_regulator_single_range_set_voltage, | |
985 | .get_voltage = spmi_regulator_single_range_get_voltage, | |
986 | .list_voltage = spmi_regulator_common_list_voltage, | |
987 | .set_input_current_limit = spmi_regulator_set_ilim, | |
988 | }; | |
989 | ||
990 | static struct regulator_ops spmi_ftsmps_ops = { | |
991 | .enable = spmi_regulator_common_enable, | |
992 | .disable = spmi_regulator_common_disable, | |
993 | .is_enabled = spmi_regulator_common_is_enabled, | |
994 | .set_voltage = spmi_regulator_common_set_voltage, | |
995 | .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, | |
996 | .get_voltage = spmi_regulator_common_get_voltage, | |
997 | .list_voltage = spmi_regulator_common_list_voltage, | |
998 | .set_mode = spmi_regulator_common_set_mode, | |
999 | .get_mode = spmi_regulator_common_get_mode, | |
1000 | .set_load = spmi_regulator_common_set_load, | |
1001 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
1002 | }; | |
1003 | ||
1004 | static struct regulator_ops spmi_ult_lo_smps_ops = { | |
1005 | .enable = spmi_regulator_common_enable, | |
1006 | .disable = spmi_regulator_common_disable, | |
1007 | .is_enabled = spmi_regulator_common_is_enabled, | |
1008 | .set_voltage = spmi_regulator_ult_lo_smps_set_voltage, | |
1009 | .get_voltage = spmi_regulator_ult_lo_smps_get_voltage, | |
1010 | .list_voltage = spmi_regulator_common_list_voltage, | |
1011 | .set_mode = spmi_regulator_common_set_mode, | |
1012 | .get_mode = spmi_regulator_common_get_mode, | |
1013 | .set_load = spmi_regulator_common_set_load, | |
1014 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
1015 | }; | |
1016 | ||
1017 | static struct regulator_ops spmi_ult_ho_smps_ops = { | |
1018 | .enable = spmi_regulator_common_enable, | |
1019 | .disable = spmi_regulator_common_disable, | |
1020 | .is_enabled = spmi_regulator_common_is_enabled, | |
1021 | .set_voltage = spmi_regulator_single_range_set_voltage, | |
1022 | .get_voltage = spmi_regulator_single_range_get_voltage, | |
1023 | .list_voltage = spmi_regulator_common_list_voltage, | |
1024 | .set_mode = spmi_regulator_common_set_mode, | |
1025 | .get_mode = spmi_regulator_common_get_mode, | |
1026 | .set_load = spmi_regulator_common_set_load, | |
1027 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
1028 | }; | |
1029 | ||
1030 | static struct regulator_ops spmi_ult_ldo_ops = { | |
1031 | .enable = spmi_regulator_common_enable, | |
1032 | .disable = spmi_regulator_common_disable, | |
1033 | .is_enabled = spmi_regulator_common_is_enabled, | |
1034 | .set_voltage = spmi_regulator_single_range_set_voltage, | |
1035 | .get_voltage = spmi_regulator_single_range_get_voltage, | |
1036 | .list_voltage = spmi_regulator_common_list_voltage, | |
1037 | .set_mode = spmi_regulator_common_set_mode, | |
1038 | .get_mode = spmi_regulator_common_get_mode, | |
1039 | .set_load = spmi_regulator_common_set_load, | |
1040 | .set_bypass = spmi_regulator_common_set_bypass, | |
1041 | .get_bypass = spmi_regulator_common_get_bypass, | |
1042 | .set_pull_down = spmi_regulator_common_set_pull_down, | |
1043 | .set_soft_start = spmi_regulator_common_set_soft_start, | |
1044 | }; | |
1045 | ||
1046 | /* Maximum possible digital major revision value */ | |
1047 | #define INF 0xFF | |
1048 | ||
1049 | static const struct spmi_regulator_mapping supported_regulators[] = { | |
1050 | /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ | |
1051 | SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), | |
1052 | SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), | |
1053 | SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), | |
1054 | SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), | |
1055 | SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000), | |
1056 | SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000), | |
1057 | SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000), | |
1058 | SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000), | |
1059 | SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000), | |
1060 | SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000), | |
1061 | SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000), | |
1062 | SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000), | |
1063 | SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000), | |
1064 | SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000), | |
1065 | SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000), | |
1066 | SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0), | |
1067 | SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000), | |
1068 | SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000), | |
1069 | SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000), | |
1070 | SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000), | |
1071 | SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000), | |
1072 | SPMI_VREG_VS(LV100, 0, INF), | |
1073 | SPMI_VREG_VS(LV300, 0, INF), | |
1074 | SPMI_VREG_VS(MV300, 0, INF), | |
1075 | SPMI_VREG_VS(MV500, 0, INF), | |
1076 | SPMI_VREG_VS(HDMI, 0, INF), | |
1077 | SPMI_VREG_VS(OTG, 0, INF), | |
1078 | SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), | |
1079 | SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), | |
1080 | SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), | |
1081 | SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), | |
1082 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, | |
1083 | ult_lo_smps, 100000), | |
1084 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps, | |
1085 | ult_lo_smps, 100000), | |
1086 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps, | |
1087 | ult_lo_smps, 100000), | |
1088 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps, | |
1089 | ult_ho_smps, 100000), | |
1090 | SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), | |
1091 | SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), | |
1092 | SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), | |
1093 | SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), | |
1094 | SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), | |
1095 | SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), | |
1096 | SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), | |
1097 | SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), | |
1098 | SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), | |
1099 | SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), | |
1100 | }; | |
1101 | ||
1102 | static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) | |
1103 | { | |
1104 | unsigned int n; | |
1105 | struct spmi_voltage_range *range = points->range; | |
1106 | ||
1107 | for (; range < points->range + points->count; range++) { | |
1108 | n = 0; | |
1109 | if (range->set_point_max_uV) { | |
1110 | n = range->set_point_max_uV - range->set_point_min_uV; | |
1111 | n /= range->step_uV + 1; | |
1112 | } | |
1113 | range->n_voltages = n; | |
1114 | points->n_voltages += n; | |
1115 | } | |
1116 | } | |
1117 | ||
1118 | static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type) | |
1119 | { | |
1120 | const struct spmi_regulator_mapping *mapping; | |
1121 | int ret, i; | |
1122 | u32 dig_major_rev; | |
1123 | u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1]; | |
1124 | u8 type, subtype; | |
1125 | ||
1126 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version, | |
1127 | ARRAY_SIZE(version)); | |
1128 | if (ret) { | |
1129 | dev_err(vreg->dev, "could not read version registers\n"); | |
1130 | return ret; | |
1131 | } | |
1132 | dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV | |
1133 | - SPMI_COMMON_REG_DIG_MAJOR_REV]; | |
1134 | if (!force_type) { | |
1135 | type = version[SPMI_COMMON_REG_TYPE - | |
1136 | SPMI_COMMON_REG_DIG_MAJOR_REV]; | |
1137 | subtype = version[SPMI_COMMON_REG_SUBTYPE - | |
1138 | SPMI_COMMON_REG_DIG_MAJOR_REV]; | |
1139 | } else { | |
1140 | type = force_type >> 8; | |
1141 | subtype = force_type; | |
1142 | } | |
1143 | ||
1144 | for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) { | |
1145 | mapping = &supported_regulators[i]; | |
1146 | if (mapping->type == type && mapping->subtype == subtype | |
1147 | && mapping->revision_min <= dig_major_rev | |
1148 | && mapping->revision_max >= dig_major_rev) | |
1149 | goto found; | |
1150 | } | |
1151 | ||
1152 | dev_err(vreg->dev, | |
1153 | "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n", | |
1154 | vreg->desc.name, type, subtype, dig_major_rev); | |
1155 | ||
1156 | return -ENODEV; | |
1157 | ||
1158 | found: | |
1159 | vreg->logical_type = mapping->logical_type; | |
1160 | vreg->set_points = mapping->set_points; | |
1161 | vreg->hpm_min_load = mapping->hpm_min_load; | |
1162 | vreg->desc.ops = mapping->ops; | |
1163 | ||
1164 | if (mapping->set_points) { | |
1165 | if (!mapping->set_points->n_voltages) | |
1166 | spmi_calculate_num_voltages(mapping->set_points); | |
1167 | vreg->desc.n_voltages = mapping->set_points->n_voltages; | |
1168 | } | |
1169 | ||
1170 | return 0; | |
1171 | } | |
1172 | ||
1173 | static int spmi_regulator_ftsmps_init_slew_rate(struct spmi_regulator *vreg) | |
1174 | { | |
1175 | int ret; | |
1176 | u8 reg = 0; | |
1177 | int step, delay, slew_rate; | |
1178 | const struct spmi_voltage_range *range; | |
1179 | ||
1180 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); | |
1181 | if (ret) { | |
1182 | dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); | |
1183 | return ret; | |
1184 | } | |
1185 | ||
1186 | range = spmi_regulator_find_range(vreg); | |
1187 | if (!range) | |
1188 | return -EINVAL; | |
1189 | ||
1190 | step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK; | |
1191 | step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT; | |
1192 | ||
1193 | delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK; | |
1194 | delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT; | |
1195 | ||
1196 | /* slew_rate has units of uV/us */ | |
1197 | slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step); | |
1198 | slew_rate /= 1000 * (SPMI_FTSMPS_STEP_DELAY << delay); | |
1199 | slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; | |
1200 | slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; | |
1201 | ||
1202 | /* Ensure that the slew rate is greater than 0 */ | |
1203 | vreg->slew_rate = max(slew_rate, 1); | |
1204 | ||
1205 | return ret; | |
1206 | } | |
1207 | ||
1208 | static unsigned int spmi_regulator_of_map_mode(unsigned int mode) | |
1209 | { | |
1210 | if (mode) | |
1211 | return REGULATOR_MODE_NORMAL; | |
1212 | ||
1213 | return REGULATOR_MODE_IDLE; | |
1214 | } | |
1215 | ||
1216 | static int spmi_regulator_of_parse(struct device_node *node, | |
1217 | const struct regulator_desc *desc, | |
1218 | struct regulator_config *config) | |
1219 | { | |
1220 | struct spmi_regulator *vreg = config->driver_data; | |
1221 | struct device *dev = config->dev; | |
1222 | int ret; | |
1223 | ||
1224 | vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES; | |
1225 | vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS; | |
1226 | ||
1227 | if (vreg->logical_type == SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS) { | |
1228 | ret = spmi_regulator_ftsmps_init_slew_rate(vreg); | |
1229 | if (ret) | |
1230 | return ret; | |
1231 | } | |
1232 | ||
1233 | if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS) | |
1234 | vreg->ocp_irq = 0; | |
1235 | ||
1236 | if (vreg->ocp_irq) { | |
1237 | ret = devm_request_irq(dev, vreg->ocp_irq, | |
1238 | spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp", | |
1239 | vreg); | |
1240 | if (ret < 0) { | |
1241 | dev_err(dev, "failed to request irq %d, ret=%d\n", | |
1242 | vreg->ocp_irq, ret); | |
1243 | return ret; | |
1244 | } | |
1245 | ||
1246 | INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work); | |
1247 | } | |
1248 | ||
1249 | return 0; | |
1250 | } | |
1251 | ||
1252 | static const struct spmi_regulator_data pm8941_regulators[] = { | |
1253 | { "s1", 0x1400, "vdd_s1", }, | |
1254 | { "s2", 0x1700, "vdd_s2", }, | |
1255 | { "s3", 0x1a00, "vdd_s3", }, | |
1256 | { "l1", 0x4000, "vdd_l1_l3", }, | |
1257 | { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, | |
1258 | { "l3", 0x4200, "vdd_l1_l3", }, | |
1259 | { "l4", 0x4300, "vdd_l4_l11", }, | |
1260 | { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, | |
1261 | { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, | |
1262 | { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, | |
1263 | { "l8", 0x4700, "vdd_l8_l16_l18_19", }, | |
1264 | { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, | |
1265 | { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, | |
1266 | { "l11", 0x4a00, "vdd_l4_l11", }, | |
1267 | { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, | |
1268 | { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, | |
1269 | { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, | |
1270 | { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, | |
1271 | { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, | |
1272 | { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, | |
1273 | { "l18", 0x5100, "vdd_l8_l16_l18_19", }, | |
1274 | { "l19", 0x5200, "vdd_l8_l16_l18_19", }, | |
1275 | { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, | |
1276 | { "l21", 0x5400, "vdd_l21", }, | |
1277 | { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, | |
1278 | { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, | |
1279 | { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, | |
1280 | { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, | |
1281 | { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, | |
1282 | { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, | |
1283 | { "mvs1", 0x8300, "vin_5vs", }, | |
1284 | { "mvs2", 0x8400, "vin_5vs", }, | |
1285 | { } | |
1286 | }; | |
1287 | ||
1288 | static const struct spmi_regulator_data pm8841_regulators[] = { | |
1289 | { "s1", 0x1400, "vdd_s1", }, | |
1290 | { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 }, | |
1291 | { "s3", 0x1a00, "vdd_s3", }, | |
1292 | { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 }, | |
1293 | { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 }, | |
1294 | { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 }, | |
1295 | { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 }, | |
1296 | { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 }, | |
1297 | { } | |
1298 | }; | |
1299 | ||
1300 | static const struct spmi_regulator_data pm8916_regulators[] = { | |
1301 | { "s1", 0x1400, "vdd_s1", }, | |
1302 | { "s2", 0x1700, "vdd_s2", }, | |
1303 | { "s3", 0x1a00, "vdd_s3", }, | |
1304 | { "s4", 0x1d00, "vdd_s4", }, | |
1305 | { "l1", 0x4000, "vdd_l1_l3", }, | |
1306 | { "l2", 0x4100, "vdd_l2", }, | |
1307 | { "l3", 0x4200, "vdd_l1_l3", }, | |
1308 | { "l4", 0x4300, "vdd_l4_l5_l6", }, | |
1309 | { "l5", 0x4400, "vdd_l4_l5_l6", }, | |
1310 | { "l6", 0x4500, "vdd_l4_l5_l6", }, | |
1311 | { "l7", 0x4600, "vdd_l7", }, | |
1312 | { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", }, | |
1313 | { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1314 | { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1315 | { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", }, | |
1316 | { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1317 | { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1318 | { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", }, | |
1319 | { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", }, | |
1320 | { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, | |
1321 | { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1322 | { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, | |
1323 | { } | |
1324 | }; | |
1325 | ||
1326 | static const struct of_device_id qcom_spmi_regulator_match[] = { | |
1327 | { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, | |
1328 | { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, | |
1329 | { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, | |
1330 | { } | |
1331 | }; | |
1332 | MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); | |
1333 | ||
1334 | static int qcom_spmi_regulator_probe(struct platform_device *pdev) | |
1335 | { | |
1336 | const struct spmi_regulator_data *reg; | |
1337 | const struct of_device_id *match; | |
1338 | struct regulator_config config = { }; | |
1339 | struct regulator_dev *rdev; | |
1340 | struct spmi_regulator *vreg; | |
1341 | struct regmap *regmap; | |
1342 | const char *name; | |
1343 | struct device *dev = &pdev->dev; | |
1344 | int ret; | |
1345 | struct list_head *vreg_list; | |
1346 | ||
1347 | vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL); | |
1348 | if (!vreg_list) | |
1349 | return -ENOMEM; | |
1350 | INIT_LIST_HEAD(vreg_list); | |
1351 | platform_set_drvdata(pdev, vreg_list); | |
1352 | ||
1353 | regmap = dev_get_regmap(dev->parent, NULL); | |
1354 | if (!regmap) | |
1355 | return -ENODEV; | |
1356 | ||
1357 | match = of_match_device(qcom_spmi_regulator_match, &pdev->dev); | |
1358 | if (!match) | |
1359 | return -ENODEV; | |
1360 | ||
1361 | for (reg = match->data; reg->name; reg++) { | |
1362 | vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); | |
1363 | if (!vreg) | |
1364 | return -ENOMEM; | |
1365 | ||
1366 | vreg->dev = dev; | |
1367 | vreg->base = reg->base; | |
1368 | vreg->regmap = regmap; | |
1369 | ||
1370 | if (reg->ocp) { | |
1371 | vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp); | |
1372 | if (vreg->ocp_irq < 0) { | |
1373 | ret = vreg->ocp_irq; | |
1374 | goto err; | |
1375 | } | |
1376 | } | |
1377 | ||
1378 | vreg->desc.id = -1; | |
1379 | vreg->desc.owner = THIS_MODULE; | |
1380 | vreg->desc.type = REGULATOR_VOLTAGE; | |
1381 | vreg->desc.name = name = reg->name; | |
1382 | vreg->desc.supply_name = reg->supply; | |
1383 | vreg->desc.of_match = reg->name; | |
1384 | vreg->desc.of_parse_cb = spmi_regulator_of_parse; | |
1385 | vreg->desc.of_map_mode = spmi_regulator_of_map_mode; | |
1386 | ||
1387 | ret = spmi_regulator_match(vreg, reg->force_type); | |
1388 | if (ret) | |
1389 | goto err; | |
1390 | ||
1391 | config.dev = dev; | |
1392 | config.driver_data = vreg; | |
1393 | rdev = devm_regulator_register(dev, &vreg->desc, &config); | |
1394 | if (IS_ERR(rdev)) { | |
1395 | dev_err(dev, "failed to register %s\n", name); | |
1396 | ret = PTR_ERR(rdev); | |
1397 | goto err; | |
1398 | } | |
1399 | ||
1400 | INIT_LIST_HEAD(&vreg->node); | |
1401 | list_add(&vreg->node, vreg_list); | |
1402 | } | |
1403 | ||
1404 | return 0; | |
1405 | ||
1406 | err: | |
1407 | list_for_each_entry(vreg, vreg_list, node) | |
1408 | if (vreg->ocp_irq) | |
1409 | cancel_delayed_work_sync(&vreg->ocp_work); | |
1410 | return ret; | |
1411 | } | |
1412 | ||
1413 | static int qcom_spmi_regulator_remove(struct platform_device *pdev) | |
1414 | { | |
1415 | struct spmi_regulator *vreg; | |
1416 | struct list_head *vreg_list = platform_get_drvdata(pdev); | |
1417 | ||
1418 | list_for_each_entry(vreg, vreg_list, node) | |
1419 | if (vreg->ocp_irq) | |
1420 | cancel_delayed_work_sync(&vreg->ocp_work); | |
1421 | ||
1422 | return 0; | |
1423 | } | |
1424 | ||
1425 | static struct platform_driver qcom_spmi_regulator_driver = { | |
1426 | .driver = { | |
1427 | .name = "qcom-spmi-regulator", | |
1428 | .of_match_table = qcom_spmi_regulator_match, | |
1429 | }, | |
1430 | .probe = qcom_spmi_regulator_probe, | |
1431 | .remove = qcom_spmi_regulator_remove, | |
1432 | }; | |
1433 | module_platform_driver(qcom_spmi_regulator_driver); | |
1434 | ||
1435 | MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver"); | |
1436 | MODULE_LICENSE("GPL v2"); | |
1437 | MODULE_ALIAS("platform:qcom-spmi-regulator"); |