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dt-bindings: mfd: qcom,spmi-pmic: Reference pm8916 wcd analog codec schema
[linux-block.git] / drivers / regulator / qcom-rpmh-regulator.c
CommitLineData
46fc033e 1// SPDX-License-Identifier: GPL-2.0
c4e5aa3d 2// Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
46fc033e
DC		 3
4#define pr_fmt(fmt) "%s: " fmt, __func__
5
6#include <linux/err.h>
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/of.h>
10#include <linux/of_device.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13#include <linux/string.h>
14#include <linux/regulator/driver.h>
15#include <linux/regulator/machine.h>
16#include <linux/regulator/of_regulator.h>
17
18#include <soc/qcom/cmd-db.h>
19#include <soc/qcom/rpmh.h>
20
21#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22
23/**
24 * enum rpmh_regulator_type - supported RPMh accelerator types
7cb5f692 25 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
46fc033e 26 * and mode of LDO, SMPS, and BOB type PMIC regulators.
7cb5f692 27 * @XOB: RPMh XOB accelerator which supports voting on the enable state
46fc033e
DC		 28 * of PMIC regulators.
29 */
30enum rpmh_regulator_type {
31 VRM,
32 XOB,
33};
34
35#define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
36#define RPMH_REGULATOR_REG_ENABLE 0x4
37#define RPMH_REGULATOR_REG_VRM_MODE 0x8
38
39#define PMIC4_LDO_MODE_RETENTION 4
40#define PMIC4_LDO_MODE_LPM 5
41#define PMIC4_LDO_MODE_HPM 7
42
43#define PMIC4_SMPS_MODE_RETENTION 4
44#define PMIC4_SMPS_MODE_PFM 5
45#define PMIC4_SMPS_MODE_AUTO 6
46#define PMIC4_SMPS_MODE_PWM 7
47
48#define PMIC4_BOB_MODE_PASS 0
49#define PMIC4_BOB_MODE_PFM 1
50#define PMIC4_BOB_MODE_AUTO 2
51#define PMIC4_BOB_MODE_PWM 3
52
610f29e5
VK		 53#define PMIC5_LDO_MODE_RETENTION 3
54#define PMIC5_LDO_MODE_LPM 4
55#define PMIC5_LDO_MODE_HPM 7
56
57#define PMIC5_SMPS_MODE_RETENTION 3
58#define PMIC5_SMPS_MODE_PFM 4
59#define PMIC5_SMPS_MODE_AUTO 6
60#define PMIC5_SMPS_MODE_PWM 7
61
62#define PMIC5_BOB_MODE_PASS 2
63#define PMIC5_BOB_MODE_PFM 4
64#define PMIC5_BOB_MODE_AUTO 6
65#define PMIC5_BOB_MODE_PWM 7
66
46fc033e
DC		 67/**
68 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69 * @regulator_type: RPMh accelerator type used to manage this
70 * regulator
71 * @ops: Pointer to regulator ops callback structure
72 * @voltage_range: The single range of voltages supported by this
73 * PMIC regulator type
74 * @n_voltages: The number of unique voltage set points defined
75 * by voltage_range
76 * @hpm_min_load_uA: Minimum load current in microamps that requires
77 * high power mode (HPM) operation. This is used
78 * for LDO hardware type regulators only.
79 * @pmic_mode_map: Array indexed by regulator framework mode
80 * containing PMIC hardware modes. Must be large
81 * enough to index all framework modes supported
82 * by this regulator hardware type.
83 * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
84 * in device tree to a regulator framework mode
85 */
86struct rpmh_vreg_hw_data {
87 enum rpmh_regulator_type regulator_type;
88 const struct regulator_ops *ops;
60ab7f41 89 const struct linear_range voltage_range;
46fc033e
DC		 90 int n_voltages;
91 int hpm_min_load_uA;
92 const int *pmic_mode_map;
93 unsigned int (*of_map_mode)(unsigned int mode);
94};
95
96/**
97 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
98 * single regulator device
99 * @dev: Device pointer for the top-level PMIC RPMh
100 * regulator parent device. This is used as a
101 * handle in RPMh write requests.
102 * @addr: Base address of the regulator resource within
103 * an RPMh accelerator
104 * @rdesc: Regulator descriptor
105 * @hw_data: PMIC regulator configuration data for this RPMh
106 * regulator
107 * @always_wait_for_ack: Boolean flag indicating if a request must always
108 * wait for an ACK from RPMh before continuing even
109 * if it corresponds to a strictly lower power
110 * state (e.g. enabled --> disabled).
111 * @enabled: Flag indicating if the regulator is enabled or
112 * not
113 * @bypassed: Boolean indicating if the regulator is in
114 * bypass (pass-through) mode or not. This is
115 * only used by BOB rpmh-regulator resources.
116 * @voltage_selector: Selector used for get_voltage_sel() and
117 * set_voltage_sel() callbacks
118 * @mode: RPMh VRM regulator current framework mode
119 */
120struct rpmh_vreg {
121 struct device *dev;
122 u32 addr;
123 struct regulator_desc rdesc;
124 const struct rpmh_vreg_hw_data *hw_data;
125 bool always_wait_for_ack;
126
127 int enabled;
128 bool bypassed;
129 int voltage_selector;
130 unsigned int mode;
131};
132
133/**
134 * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
135 * @name: Name for the regulator which also corresponds
136 * to the device tree subnode name of the regulator
137 * @resource_name: RPMh regulator resource name format string.
138 * This must include exactly one field: '%s' which
139 * is filled at run-time with the PMIC ID provided
140 * by device tree property qcom,pmic-id. Example:
141 * "ldo%s1" for RPMh resource "ldoa1".
142 * @supply_name: Parent supply regulator name
143 * @hw_data: Configuration data for this PMIC regulator type
144 */
145struct rpmh_vreg_init_data {
146 const char *name;
147 const char *resource_name;
148 const char *supply_name;
149 const struct rpmh_vreg_hw_data *hw_data;
150};
151
152/**
153 * rpmh_regulator_send_request() - send the request to RPMh
154 * @vreg: Pointer to the RPMh regulator
155 * @cmd: Pointer to the RPMh command to send
156 * @wait_for_ack: Boolean indicating if execution must wait until the
157 * request has been acknowledged as complete
158 *
159 * Return: 0 on success, errno on failure
160 */
161static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
162 struct tcs_cmd *cmd, bool wait_for_ack)
163{
164 int ret;
165
166 if (wait_for_ack || vreg->always_wait_for_ack)
167 ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
168 else
169 ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
170 1);
171
172 return ret;
173}
174
175static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
176 unsigned int selector, bool wait_for_ack)
177{
178 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
179 struct tcs_cmd cmd = {
180 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
181 };
182 int ret;
183
184 /* VRM voltage control register is set with voltage in millivolts. */
185 cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
186 selector), 1000);
187
188 ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
189 if (!ret)
190 vreg->voltage_selector = selector;
191
192 return ret;
193}
194
195static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
196 unsigned int selector)
197{
198 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
199
200 if (vreg->enabled == -EINVAL) {
201 /*
202 * Cache the voltage and send it later when the regulator is
203 * enabled or disabled.
204 */
205 vreg->voltage_selector = selector;
206 return 0;
207 }
208
209 return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
210 selector > vreg->voltage_selector);
211}
212
213static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
214{
215 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
216
217 return vreg->voltage_selector;
218}
219
220static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
221{
222 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
223
224 return vreg->enabled;
225}
226
227static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
228 bool enable)
229{
230 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
231 struct tcs_cmd cmd = {
232 .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
233 .data = enable,
234 };
235 int ret;
236
237 if (vreg->enabled == -EINVAL &&
238 vreg->voltage_selector != -ENOTRECOVERABLE) {
239 ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
240 vreg->voltage_selector, true);
241 if (ret < 0)
242 return ret;
243 }
244
245 ret = rpmh_regulator_send_request(vreg, &cmd, enable);
246 if (!ret)
247 vreg->enabled = enable;
248
249 return ret;
250}
251
252static int rpmh_regulator_enable(struct regulator_dev *rdev)
253{
254 return rpmh_regulator_set_enable_state(rdev, true);
255}
256
257static int rpmh_regulator_disable(struct regulator_dev *rdev)
258{
259 return rpmh_regulator_set_enable_state(rdev, false);
260}
261
262static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
263 unsigned int mode, bool bypassed)
264{
265 struct tcs_cmd cmd = {
266 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
267 };
268 int pmic_mode;
269
270 if (mode > REGULATOR_MODE_STANDBY)
271 return -EINVAL;
272
273 pmic_mode = vreg->hw_data->pmic_mode_map[mode];
274 if (pmic_mode < 0)
275 return pmic_mode;
276
277 if (bypassed)
278 cmd.data = PMIC4_BOB_MODE_PASS;
279 else
280 cmd.data = pmic_mode;
281
282 return rpmh_regulator_send_request(vreg, &cmd, true);
283}
284
285static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
286 unsigned int mode)
287{
288 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
289 int ret;
290
291 if (mode == vreg->mode)
292 return 0;
293
294 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
295 if (!ret)
296 vreg->mode = mode;
297
298 return ret;
299}
300
301static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
302{
303 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
304
305 return vreg->mode;
306}
307
308/**
efb0cb50 309 * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load
46fc033e 310 * @rdev: Regulator device pointer for the rpmh-regulator
efb0cb50
DA		 311 * @input_uV: Input voltage
312 * @output_uV: Output voltage
46fc033e
DC		 313 * @load_uA: Aggregated load current in microamps
314 *
315 * This function is used in the regulator_ops for VRM type RPMh regulator
316 * devices.
317 *
318 * Return: 0 on success, errno on failure
319 */
efb0cb50
DA		 320static unsigned int rpmh_regulator_vrm_get_optimum_mode(
321 struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)
46fc033e
DC		 322{
323 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
46fc033e
DC		 324
325 if (load_uA >= vreg->hw_data->hpm_min_load_uA)
efb0cb50 326 return REGULATOR_MODE_NORMAL;
46fc033e 327 else
efb0cb50 328 return REGULATOR_MODE_IDLE;
46fc033e
DC		 329}
330
331static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
332 bool enable)
333{
334 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
335 int ret;
336
337 if (vreg->bypassed == enable)
338 return 0;
339
340 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
341 if (!ret)
342 vreg->bypassed = enable;
343
344 return ret;
345}
346
347static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
348 bool *enable)
349{
350 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
351
352 *enable = vreg->bypassed;
353
354 return 0;
355}
356
357static const struct regulator_ops rpmh_regulator_vrm_ops = {
358 .enable = rpmh_regulator_enable,
359 .disable = rpmh_regulator_disable,
360 .is_enabled = rpmh_regulator_is_enabled,
361 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
362 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
363 .list_voltage = regulator_list_voltage_linear_range,
364 .set_mode = rpmh_regulator_vrm_set_mode,
365 .get_mode = rpmh_regulator_vrm_get_mode,
366};
367
368static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
369 .enable = rpmh_regulator_enable,
370 .disable = rpmh_regulator_disable,
371 .is_enabled = rpmh_regulator_is_enabled,
372 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
373 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
374 .list_voltage = regulator_list_voltage_linear_range,
375 .set_mode = rpmh_regulator_vrm_set_mode,
376 .get_mode = rpmh_regulator_vrm_get_mode,
efb0cb50 377 .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode,
46fc033e
DC		 378};
379
380static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
381 .enable = rpmh_regulator_enable,
382 .disable = rpmh_regulator_disable,
383 .is_enabled = rpmh_regulator_is_enabled,
384 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
385 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
386 .list_voltage = regulator_list_voltage_linear_range,
387 .set_mode = rpmh_regulator_vrm_set_mode,
388 .get_mode = rpmh_regulator_vrm_get_mode,
389 .set_bypass = rpmh_regulator_vrm_set_bypass,
390 .get_bypass = rpmh_regulator_vrm_get_bypass,
391};
392
393static const struct regulator_ops rpmh_regulator_xob_ops = {
394 .enable = rpmh_regulator_enable,
395 .disable = rpmh_regulator_disable,
396 .is_enabled = rpmh_regulator_is_enabled,
397};
398
399/**
400 * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
7cb5f692
LJ		 401 * @vreg: Pointer to the individual rpmh-regulator resource
402 * @dev: Pointer to the top level rpmh-regulator PMIC device
403 * @node: Pointer to the individual rpmh-regulator resource
46fc033e 404 * device node
7cb5f692 405 * @pmic_id: String used to identify the top level rpmh-regulator
46fc033e 406 * PMIC device on the board
7cb5f692 407 * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
46fc033e
DC		 408 * resources defined for the top level PMIC device
409 *
410 * Return: 0 on success, errno on failure
411 */
412static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
413 struct device_node *node, const char *pmic_id,
414 const struct rpmh_vreg_init_data *pmic_rpmh_data)
415{
416 struct regulator_config reg_config = {};
417 char rpmh_resource_name[20] = "";
418 const struct rpmh_vreg_init_data *rpmh_data;
419 struct regulator_init_data *init_data;
420 struct regulator_dev *rdev;
421 int ret;
422
423 vreg->dev = dev;
424
425 for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
c32569e3 426 if (of_node_name_eq(node, rpmh_data->name))
46fc033e
DC		 427 break;
428
429 if (!rpmh_data->name) {
0c9721a5 430 dev_err(dev, "Unknown regulator %pOFn\n", node);
46fc033e
DC		 431 return -EINVAL;
432 }
433
434 scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
435 rpmh_data->resource_name, pmic_id);
436
437 vreg->addr = cmd_db_read_addr(rpmh_resource_name);
438 if (!vreg->addr) {
0c9721a5
RH		 439 dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
440 node, rpmh_resource_name);
46fc033e
DC		 441 return -ENODEV;
442 }
443
444 vreg->rdesc.name = rpmh_data->name;
445 vreg->rdesc.supply_name = rpmh_data->supply_name;
446 vreg->hw_data = rpmh_data->hw_data;
447
448 vreg->enabled = -EINVAL;
449 vreg->voltage_selector = -ENOTRECOVERABLE;
450 vreg->mode = REGULATOR_MODE_INVALID;
451
452 if (rpmh_data->hw_data->n_voltages) {
453 vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
454 vreg->rdesc.n_linear_ranges = 1;
455 vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
456 }
457
458 vreg->always_wait_for_ack = of_property_read_bool(node,
459 "qcom,always-wait-for-ack");
460
461 vreg->rdesc.owner = THIS_MODULE;
462 vreg->rdesc.type = REGULATOR_VOLTAGE;
463 vreg->rdesc.ops = vreg->hw_data->ops;
464 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
465
466 init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
467 if (!init_data)
468 return -ENOMEM;
469
470 if (rpmh_data->hw_data->regulator_type == XOB &&
471 init_data->constraints.min_uV &&
472 init_data->constraints.min_uV == init_data->constraints.max_uV) {
473 vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
474 vreg->rdesc.n_voltages = 1;
475 }
476
477 reg_config.dev = dev;
478 reg_config.init_data = init_data;
479 reg_config.of_node = node;
480 reg_config.driver_data = vreg;
481
482 rdev = devm_regulator_register(dev, &vreg->rdesc, &reg_config);
483 if (IS_ERR(rdev)) {
484 ret = PTR_ERR(rdev);
0c9721a5
RH		 485 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
486 node, ret);
46fc033e
DC		 487 return ret;
488 }
489
0c9721a5
RH		 490 dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
491 node, rpmh_resource_name, vreg->addr);
46fc033e
DC		 492
493 return 0;
494}
495
496static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
497 [REGULATOR_MODE_INVALID] = -EINVAL,
498 [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
499 [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
500 [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
501 [REGULATOR_MODE_FAST] = -EINVAL,
502};
503
610f29e5
VK		 504static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
505 [REGULATOR_MODE_INVALID] = -EINVAL,
506 [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
507 [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
508 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
509 [REGULATOR_MODE_FAST] = -EINVAL,
510};
511
46fc033e
DC		 512static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
513{
514 unsigned int mode;
515
516 switch (rpmh_mode) {
517 case RPMH_REGULATOR_MODE_HPM:
518 mode = REGULATOR_MODE_NORMAL;
519 break;
520 case RPMH_REGULATOR_MODE_LPM:
521 mode = REGULATOR_MODE_IDLE;
522 break;
523 case RPMH_REGULATOR_MODE_RET:
524 mode = REGULATOR_MODE_STANDBY;
525 break;
526 default:
527 mode = REGULATOR_MODE_INVALID;
beb5a17f 528 break;
46fc033e
DC		 529 }
530
531 return mode;
532}
533
534static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
535 [REGULATOR_MODE_INVALID] = -EINVAL,
536 [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
537 [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
538 [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
539 [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
540};
541
610f29e5
VK		 542static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
543 [REGULATOR_MODE_INVALID] = -EINVAL,
544 [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
545 [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
546 [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
547 [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
548};
549
46fc033e
DC		 550static unsigned int
551rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
552{
553 unsigned int mode;
554
555 switch (rpmh_mode) {
556 case RPMH_REGULATOR_MODE_HPM:
557 mode = REGULATOR_MODE_FAST;
558 break;
559 case RPMH_REGULATOR_MODE_AUTO:
560 mode = REGULATOR_MODE_NORMAL;
561 break;
562 case RPMH_REGULATOR_MODE_LPM:
563 mode = REGULATOR_MODE_IDLE;
564 break;
565 case RPMH_REGULATOR_MODE_RET:
566 mode = REGULATOR_MODE_STANDBY;
567 break;
568 default:
569 mode = REGULATOR_MODE_INVALID;
beb5a17f 570 break;
46fc033e
DC		 571 }
572
573 return mode;
574}
575
576static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
577 [REGULATOR_MODE_INVALID] = -EINVAL,
578 [REGULATOR_MODE_STANDBY] = -EINVAL,
579 [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
580 [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
581 [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
582};
583
610f29e5
VK		 584static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
585 [REGULATOR_MODE_INVALID] = -EINVAL,
586 [REGULATOR_MODE_STANDBY] = -EINVAL,
587 [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
588 [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
589 [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
590};
591
46fc033e
DC		 592static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
593{
594 unsigned int mode;
595
596 switch (rpmh_mode) {
597 case RPMH_REGULATOR_MODE_HPM:
598 mode = REGULATOR_MODE_FAST;
599 break;
600 case RPMH_REGULATOR_MODE_AUTO:
601 mode = REGULATOR_MODE_NORMAL;
602 break;
603 case RPMH_REGULATOR_MODE_LPM:
604 mode = REGULATOR_MODE_IDLE;
605 break;
606 default:
607 mode = REGULATOR_MODE_INVALID;
beb5a17f 608 break;
46fc033e
DC		 609 }
610
611 return mode;
612}
613
614static const struct rpmh_vreg_hw_data pmic4_pldo = {
615 .regulator_type = VRM,
616 .ops = &rpmh_regulator_vrm_drms_ops,
617 .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
618 .n_voltages = 256,
619 .hpm_min_load_uA = 10000,
620 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
621 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
622};
623
624static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
625 .regulator_type = VRM,
626 .ops = &rpmh_regulator_vrm_drms_ops,
627 .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
628 .n_voltages = 128,
629 .hpm_min_load_uA = 10000,
630 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
631 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
632};
633
634static const struct rpmh_vreg_hw_data pmic4_nldo = {
635 .regulator_type = VRM,
636 .ops = &rpmh_regulator_vrm_drms_ops,
637 .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
638 .n_voltages = 128,
639 .hpm_min_load_uA = 30000,
640 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
641 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
642};
643
644static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
645 .regulator_type = VRM,
646 .ops = &rpmh_regulator_vrm_ops,
647 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
648 .n_voltages = 216,
649 .pmic_mode_map = pmic_mode_map_pmic4_smps,
650 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
651};
652
653static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
654 .regulator_type = VRM,
655 .ops = &rpmh_regulator_vrm_ops,
656 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
657 .n_voltages = 259,
658 .pmic_mode_map = pmic_mode_map_pmic4_smps,
659 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
660};
661
662static const struct rpmh_vreg_hw_data pmic4_bob = {
663 .regulator_type = VRM,
664 .ops = &rpmh_regulator_vrm_bypass_ops,
665 .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
666 .n_voltages = 84,
667 .pmic_mode_map = pmic_mode_map_pmic4_bob,
668 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
669};
670
671static const struct rpmh_vreg_hw_data pmic4_lvs = {
672 .regulator_type = XOB,
673 .ops = &rpmh_regulator_xob_ops,
674 /* LVS hardware does not support voltage or mode configuration. */
675};
676
06369bcc
VK		 677static const struct rpmh_vreg_hw_data pmic5_pldo = {
678 .regulator_type = VRM,
679 .ops = &rpmh_regulator_vrm_drms_ops,
680 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
681 .n_voltages = 256,
682 .hpm_min_load_uA = 10000,
610f29e5 683 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
06369bcc
VK		 684 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
685};
686
687static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
688 .regulator_type = VRM,
689 .ops = &rpmh_regulator_vrm_drms_ops,
690 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
691 .n_voltages = 63,
692 .hpm_min_load_uA = 10000,
610f29e5 693 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
06369bcc
VK		 694 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
695};
696
65f1b1dc
BG		 697static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = {
698 .regulator_type = VRM,
699 .ops = &rpmh_regulator_vrm_drms_ops,
700 .voltage_range = REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000),
701 .n_voltages = 188,
702 .hpm_min_load_uA = 10000,
703 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
704 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
705};
706
06369bcc
VK		 707static const struct rpmh_vreg_hw_data pmic5_nldo = {
708 .regulator_type = VRM,
709 .ops = &rpmh_regulator_vrm_drms_ops,
710 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
711 .n_voltages = 124,
712 .hpm_min_load_uA = 30000,
610f29e5 713 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
06369bcc
VK		 714 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
715};
716
65f1b1dc
BG		 717static const struct rpmh_vreg_hw_data pmic5_nldo515 = {
718 .regulator_type = VRM,
719 .ops = &rpmh_regulator_vrm_drms_ops,
720 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000),
721 .n_voltages = 211,
722 .hpm_min_load_uA = 30000,
723 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
724 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
725};
726
06369bcc
VK		 727static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
728 .regulator_type = VRM,
729 .ops = &rpmh_regulator_vrm_ops,
730 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
731 .n_voltages = 216,
610f29e5 732 .pmic_mode_map = pmic_mode_map_pmic5_smps,
06369bcc
VK		 733 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
734};
735
736static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
737 .regulator_type = VRM,
738 .ops = &rpmh_regulator_vrm_ops,
739 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
740 .n_voltages = 264,
610f29e5 741 .pmic_mode_map = pmic_mode_map_pmic5_smps,
06369bcc
VK		 742 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
743};
744
9405b4f7 745static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
746 .regulator_type = VRM,
747 .ops = &rpmh_regulator_vrm_ops,
748 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
749 .n_voltages = 264,
750 .pmic_mode_map = pmic_mode_map_pmic5_smps,
751 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
752};
753
e6e3776d
AV		 754static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = {
755 .regulator_type = VRM,
756 .ops = &rpmh_regulator_vrm_ops,
757 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000),
758 .n_voltages = 268,
759 .pmic_mode_map = pmic_mode_map_pmic5_smps,
760 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
761};
762
763static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = {
764 .regulator_type = VRM,
765 .ops = &rpmh_regulator_vrm_ops,
766 .voltage_range = REGULATOR_LINEAR_RANGE(600000, 0, 267, 8000),
767 .n_voltages = 268,
768 .pmic_mode_map = pmic_mode_map_pmic5_smps,
769 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
770};
771
65f1b1dc
BG		 772static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = {
773 .regulator_type = VRM,
774 .ops = &rpmh_regulator_vrm_ops,
775 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
776 .n_voltages = 215,
777 .pmic_mode_map = pmic_mode_map_pmic5_smps,
778 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
779};
780
06369bcc
VK		 781static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
782 .regulator_type = VRM,
783 .ops = &rpmh_regulator_vrm_ops,
e610e072 784 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
785 .n_voltages = 236,
610f29e5 786 .pmic_mode_map = pmic_mode_map_pmic5_smps,
06369bcc
VK		 787 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
788};
789
951384ca
DB		 790static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
791 .regulator_type = VRM,
792 .ops = &rpmh_regulator_vrm_ops,
793 .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
794 .n_voltages = 5,
795 .pmic_mode_map = pmic_mode_map_pmic5_smps,
796 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
797};
798
06369bcc
VK		 799static const struct rpmh_vreg_hw_data pmic5_bob = {
800 .regulator_type = VRM,
801 .ops = &rpmh_regulator_vrm_bypass_ops,
77fd66c9
KG		 802 .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
803 .n_voltages = 32,
610f29e5 804 .pmic_mode_map = pmic_mode_map_pmic5_bob,
06369bcc
VK		 805 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
806};
807
46fc033e
DC		 808#define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
809{ \
810 .name = _name, \
811 .resource_name = _resource_name, \
812 .hw_data = _hw_data, \
813 .supply_name = _supply_name, \
814}
815
816static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
817 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
818 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
819 RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
820 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
821 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
822 RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
823 RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
824 RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
825 RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
826 RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
827 RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
828 RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
829 RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
830 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
831 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
832 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
833 RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
834 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
835 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
836 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
837 RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
838 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
839 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
840 RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
841 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
842 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
843 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
844 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
845 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
846 RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
847 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
848 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
849 RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
850 RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
851 RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
852 RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
853 RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
854 RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
855 RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
856 RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
857 RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
858 RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
859 RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
ba5dabf4 860 {}
46fc033e
DC		 861};
862
59eadd2a
SP		 863static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
864 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
865 {}
866};
867
46fc033e
DC		 868static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
869 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
ba5dabf4 870 {}
46fc033e
DC		 871};
872
873static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
874 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
875 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
876 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
877 RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
ba5dabf4 878 {}
46fc033e
DC		 879};
880
06369bcc
VK		 881static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
882 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
883 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
884 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
885 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
886 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
887 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
888 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
889 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
890 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
891 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
892 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
893 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
894 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
895 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
896 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
897 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
898 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
899 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
900 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
901 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
902 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
903 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
906746ba 904 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
06369bcc
VK		 905 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
906 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
906746ba
BA		 907 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
908 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
06369bcc 909 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
ba5dabf4 910 {}
06369bcc
VK		 911};
912
913static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
914 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
915 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
916 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
917 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
918 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
919 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
920 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
921 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
922 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
923 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
924 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
925 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
926 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
927 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
928 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
906746ba 929 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
06369bcc
VK		 930 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
931 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
932 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
933 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
ba5dabf4 934 {}
06369bcc
VK		 935};
936
9a336ed9
BS		 937static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
938 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
939 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
940 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
941 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
942 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
943 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
944 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
945 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
946 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
947 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
948 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
949 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
950 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
951 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
952 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
953 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
954 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
955 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
956 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
957 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
958 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
959 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
960 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
961 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
962 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
963 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
964 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
965 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
966 {}
967};
968
65f1b1dc
BG		 969static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {
970 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"),
971 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"),
972 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"),
973 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"),
974 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"),
975 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"),
976 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"),
977 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"),
978 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"),
979 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"),
980 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"),
981 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"),
982 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"),
983 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"),
984 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"),
985 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"),
986 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"),
987 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
988 {}
989};
990
bebb2c6d
VK		 991static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
992 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
993 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
994 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
995 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
996 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
997 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
998 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
999 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
1000 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
1001 RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
1002 RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
1003 RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
1004 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
1005 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
1006 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
1007 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
1008 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
1009 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
1010 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
1011 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
1012 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
1013 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
ba5dabf4 1014 {}
bebb2c6d
VK		 1015};
1016
1017static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
dfe03bca 1018 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
bebb2c6d
VK		 1019 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1020 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1021 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
1022 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
1023 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1024 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
1025 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
1026 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
1027 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
1028 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
1029 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
1030 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1031 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1032 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1033 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
1034 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1035 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
1036 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
1037 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
1038 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
1039 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
1040 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1041 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
ba5dabf4 1042 {}
bebb2c6d
VK		 1043};
1044
d69e1972
VK		 1045static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
1046 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
1047 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1048 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
1049 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
1050 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
1051 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
1052 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1053 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
1054 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1055 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
1056 {}
1057};
1058
e6e3776d 1059static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {
b00de000 1060 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1-l4-l10"),
e6e3776d 1061 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l13-l14"),
b00de000
AV		 1062 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
1063 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l1-l4-l10"),
e6e3776d 1064 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16"),
b00de000
AV		 1065 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l7"),
1066 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l6-l7"),
1067 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8-l9"),
e6e3776d 1068 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
b00de000
AV		 1069 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l1-l4-l10"),
1070 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"),
e6e3776d
AV		 1071 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, "vdd-l12"),
1072 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l2-l13-l14"),
1073 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l2-l13-l14"),
b00de000 1074 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"),
e6e3776d
AV		 1075 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16"),
1076 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l17"),
1077 RPMH_VREG("bob1", "bob%s1", &pmic5_bob, "vdd-bob1"),
1078 RPMH_VREG("bob2", "bob%s2", &pmic5_bob, "vdd-bob2"),
1079 {}
1080};
1081
1082static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {
1083 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"),
1084 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"),
1085 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"),
1086 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_lv, "vdd-s4"),
1087 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"),
1088 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_mv, "vdd-s6"),
b00de000
AV		 1089 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
1090 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
1091 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
e6e3776d
AV		 1092 {}
1093};
1094
1095static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {
1096 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"),
1097 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"),
1098 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"),
1099 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_lv, "vdd-s4"),
1100 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"),
1101 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"),
1102 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"),
1103 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"),
b00de000
AV		 1104 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
1105 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
1106 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
e6e3776d
AV		 1107 {}
1108};
1109
06369bcc
VK		 1110static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
1111 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1112 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
1113 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1114 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
1115 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1116 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1117 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1118 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
20ccc362 1119 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
ba5dabf4 1120 {}
06369bcc
VK		 1121};
1122
951384ca
DB		 1123static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1124 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1125 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
1126 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1127 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
1128 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1129 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1130 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1131 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
86358041 1132 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
ba5dabf4 1133 {}
951384ca
DB		 1134};
1135
75bb518e
KG		 1136static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1137 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1138 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1139 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1140 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1141 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1142 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1143 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1144 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1145 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
1146 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1147 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
1148 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
1149 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
1150 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
1151 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1152 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1153 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1154 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1155 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1156 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1157 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1158 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1159 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1160 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
ba5dabf4 1161 {}
75bb518e
KG		 1162};
1163
1164static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1165 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1166 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1167 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1168 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
1169 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
1170 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1171 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
1172 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1173 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
1174 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1175 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1176 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
1177 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
1178 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
1179 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
1180 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
1181 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
1182 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
1183 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
1184 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
ba5dabf4 1185 {}
75bb518e
KG		 1186};
1187
0adafd62
LW		 1188static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1189 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL),
1190 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL),
1191 /* smps3 - smps5 not configured */
1192 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL),
1193 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL),
1194 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL),
1195 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL),
1196 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL),
1197 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL),
1198 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL),
1199 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL),
1200 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL),
1201 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL),
1202 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL),
1203 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL),
1204 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL),
1205 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL),
1206 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL),
1207 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL),
1208 /* ldo17 not configured */
1209 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL),
1210 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL),
1211 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL),
1212 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL),
1213 RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL),
1214};
1215
36dd70ce
VK		 1216static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1217 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1218 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1219 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1220 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1221 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1222 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1223 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1224 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1225 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1226 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
1227 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
1228 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1229 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1230 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
1231 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
1232 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
1233 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
1234 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
1235 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
1236 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
1237 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1238 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1239 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
ba5dabf4 1240 {}
36dd70ce
VK		 1241};
1242
5999f85d
RA		 1243static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1244 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1245 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1246 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1247 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1248 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1249 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1250 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1251 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1252 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1253 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"),
1254 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1255 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1256 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"),
1257 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"),
1258 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"),
1259 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"),
1260 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"),
1261 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
1262 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
1263 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
1264 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
1265 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1266 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1267 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"),
1268 RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"),
1269 /* ldo18 not configured */
1270 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"),
1271 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"),
1272 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"),
1273 {}
1274};
1275
c4e5aa3d 1276static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1277 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1278 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1279 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
1280 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
1281 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
1282 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
1283 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
1284 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1285 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1286 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
1287 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1288 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1289 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
1290 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
1291 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
1292 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
1293 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
1294 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
1295 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1296 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1297 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
1298 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
1299 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1300 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
1301 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1302 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1303 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
f26cdada 1304 {}
c4e5aa3d 1305};
1306
1307static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1308 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
1309 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
dd801b22 1310 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps515, "vdd-s3"),
c4e5aa3d 1311 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1312 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1313 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1314 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
1315 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"),
1316 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"),
1317 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"),
f26cdada 1318 {}
c4e5aa3d 1319};
1320
911ce7cf
RA		 1321static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
1322 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
1323 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
1324 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
1325 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
1326 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
1327 RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"),
1328 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"),
1329 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"),
1330 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"),
1331 /* ldo4 is inaccessible on PM660 */
1332 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"),
1333 RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"),
1334 RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"),
1335 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1336 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1337 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1338 RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1339 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1340 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1341 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1342 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1343 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1344 RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1345 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1346 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1347 {}
1348};
1349
1350static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
1351 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
1352 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
1353 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"),
1354 RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"),
1355 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"),
1356 RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"),
1357 RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1358 RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"),
1359 RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1360 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"),
1361 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1362 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1363 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
1364 {}
1365};
1366
46fc033e
DC		 1367static int rpmh_regulator_probe(struct platform_device *pdev)
1368{
1369 struct device *dev = &pdev->dev;
1370 const struct rpmh_vreg_init_data *vreg_data;
1371 struct device_node *node;
1372 struct rpmh_vreg *vreg;
1373 const char *pmic_id;
1374 int ret;
1375
1376 vreg_data = of_device_get_match_data(dev);
1377 if (!vreg_data)
1378 return -ENODEV;
1379
1380 ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
1381 if (ret < 0) {
1382 dev_err(dev, "qcom,pmic-id missing in DT node\n");
1383 return ret;
1384 }
1385
1386 for_each_available_child_of_node(dev->of_node, node) {
1387 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1388 if (!vreg) {
1389 of_node_put(node);
1390 return -ENOMEM;
1391 }
1392
1393 ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1394 vreg_data);
1395 if (ret < 0) {
1396 of_node_put(node);
1397 return ret;
1398 }
1399 }
1400
1401 return 0;
1402}
1403
a2508eeb 1404static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
46fc033e
DC		 1405 {
1406 .compatible = "qcom,pm8005-rpmh-regulators",
1407 .data = pm8005_vreg_data,
1408 },
7172fb7f
VK		 1409 {
1410 .compatible = "qcom,pm8009-rpmh-regulators",
1411 .data = pm8009_vreg_data,
1412 },
951384ca
DB		 1413 {
1414 .compatible = "qcom,pm8009-1-rpmh-regulators",
1415 .data = pm8009_1_vreg_data,
1416 },
06369bcc
VK		 1417 {
1418 .compatible = "qcom,pm8150-rpmh-regulators",
1419 .data = pm8150_vreg_data,
1420 },
1421 {
1422 .compatible = "qcom,pm8150l-rpmh-regulators",
1423 .data = pm8150l_vreg_data,
1424 },
bebb2c6d
VK		 1425 {
1426 .compatible = "qcom,pm8350-rpmh-regulators",
1427 .data = pm8350_vreg_data,
1428 },
1429 {
1430 .compatible = "qcom,pm8350c-rpmh-regulators",
1431 .data = pm8350c_vreg_data,
1432 },
d69e1972
VK		 1433 {
1434 .compatible = "qcom,pm8450-rpmh-regulators",
1435 .data = pm8450_vreg_data,
1436 },
e6e3776d
AV		 1437 {
1438 .compatible = "qcom,pm8550-rpmh-regulators",
1439 .data = pm8550_vreg_data,
1440 },
1441 {
1442 .compatible = "qcom,pm8550ve-rpmh-regulators",
1443 .data = pm8550ve_vreg_data,
1444 },
1445 {
1446 .compatible = "qcom,pm8550vs-rpmh-regulators",
1447 .data = pm8550vs_vreg_data,
1448 },
06369bcc 1449 {
7172fb7f
VK		 1450 .compatible = "qcom,pm8998-rpmh-regulators",
1451 .data = pm8998_vreg_data,
1452 },
59eadd2a
SP		 1453 {
1454 .compatible = "qcom,pmg1110-rpmh-regulators",
1455 .data = pmg1110_vreg_data,
1456 },
7172fb7f
VK		 1457 {
1458 .compatible = "qcom,pmi8998-rpmh-regulators",
1459 .data = pmi8998_vreg_data,
06369bcc 1460 },
75bb518e
KG		 1461 {
1462 .compatible = "qcom,pm6150-rpmh-regulators",
1463 .data = pm6150_vreg_data,
1464 },
1465 {
1466 .compatible = "qcom,pm6150l-rpmh-regulators",
1467 .data = pm6150l_vreg_data,
1468 },
0adafd62
LW		 1469 {
1470 .compatible = "qcom,pm6350-rpmh-regulators",
1471 .data = pm6350_vreg_data,
1472 },
e46c52f7
BA		 1473 {
1474 .compatible = "qcom,pmc8180-rpmh-regulators",
1475 .data = pm8150_vreg_data,
1476 },
1477 {
1478 .compatible = "qcom,pmc8180c-rpmh-regulators",
1479 .data = pm8150l_vreg_data,
1480 },
9a336ed9
BS		 1481 {
1482 .compatible = "qcom,pmm8155au-rpmh-regulators",
1483 .data = pmm8155au_vreg_data,
1484 },
65f1b1dc
BG		 1485 {
1486 .compatible = "qcom,pmm8654au-rpmh-regulators",
1487 .data = pmm8654au_vreg_data,
1488 },
36dd70ce
VK		 1489 {
1490 .compatible = "qcom,pmx55-rpmh-regulators",
1491 .data = pmx55_vreg_data,
1492 },
5999f85d
RA		 1493 {
1494 .compatible = "qcom,pmx65-rpmh-regulators",
1495 .data = pmx65_vreg_data,
1496 },
c4e5aa3d 1497 {
1498 .compatible = "qcom,pm7325-rpmh-regulators",
1499 .data = pm7325_vreg_data,
1500 },
1501 {
1502 .compatible = "qcom,pmr735a-rpmh-regulators",
1503 .data = pmr735a_vreg_data,
1504 },
911ce7cf
RA		 1505 {
1506 .compatible = "qcom,pm660-rpmh-regulators",
1507 .data = pm660_vreg_data,
1508 },
1509 {
1510 .compatible = "qcom,pm660l-rpmh-regulators",
1511 .data = pm660l_vreg_data,
1512 },
46fc033e
DC		 1513 {}
1514};
1515MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1516
1517static struct platform_driver rpmh_regulator_driver = {
1518 .driver = {
1519 .name = "qcom-rpmh-regulator",
ad44ac08 1520 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
46fc033e
DC		 1521 .of_match_table = of_match_ptr(rpmh_regulator_match_table),
1522 },
1523 .probe = rpmh_regulator_probe,
1524};
1525module_platform_driver(rpmh_regulator_driver);
1526
1527MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1528MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)