projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 99cf3af5 JB |
1 | /* |
| 2 | * pv88080-regulator.h - Regulator definitions for PV88080 | |
| 3 | * Copyright (C) 2016 Powerventure Semiconductor Ltd. | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or | |
| 6 | * modify it under the terms of the GNU General Public License | |
| 7 | * as published by the Free Software Foundation; either version 2 | |
| 8 | * of the License, or (at your option) any later version. | |
| 9 | * | |
| 10 | * This program is distributed in the hope that it will be useful, | |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | * GNU General Public License for more details. | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef __PV88080_REGISTERS_H__ | |
| 17 | #define __PV88080_REGISTERS_H__ | |
| 18 | ||
| 19 | /* System Control and Event Registers */ | |
| 5ff00f6a EJ |
20 | #define PV88080_REG_EVENT_A 0x04 |
| 21 | #define PV88080_REG_MASK_A 0x09 | |
| 22 | #define PV88080_REG_MASK_B 0x0A | |
| 23 | #define PV88080_REG_MASK_C 0x0B | |
| 24 | ||
| 25 | /* Regulator Registers - rev. AA */ | |
| 26 | #define PV88080AA_REG_HVBUCK_CONF1 0x2D | |
| 27 | #define PV88080AA_REG_HVBUCK_CONF2 0x2E | |
| 28 | #define PV88080AA_REG_BUCK1_CONF0 0x27 | |
| 29 | #define PV88080AA_REG_BUCK1_CONF1 0x28 | |
| 30 | #define PV88080AA_REG_BUCK1_CONF2 0x59 | |
| 31 | #define PV88080AA_REG_BUCK1_CONF5 0x5C | |
| 32 | #define PV88080AA_REG_BUCK2_CONF0 0x29 | |
| 33 | #define PV88080AA_REG_BUCK2_CONF1 0x2A | |
| 34 | #define PV88080AA_REG_BUCK2_CONF2 0x61 | |
| 35 | #define PV88080AA_REG_BUCK2_CONF5 0x64 | |
| 36 | #define PV88080AA_REG_BUCK3_CONF0 0x2B | |
| 37 | #define PV88080AA_REG_BUCK3_CONF1 0x2C | |
| 38 | #define PV88080AA_REG_BUCK3_CONF2 0x69 | |
| 39 | #define PV88080AA_REG_BUCK3_CONF5 0x6C | |
| 40 | ||
| 41 | /* Regulator Registers - rev. BA */ | |
| 42 | #define PV88080BA_REG_HVBUCK_CONF1 0x33 | |
| 43 | #define PV88080BA_REG_HVBUCK_CONF2 0x34 | |
| 44 | #define PV88080BA_REG_BUCK1_CONF0 0x2A | |
| 45 | #define PV88080BA_REG_BUCK1_CONF1 0x2C | |
| 46 | #define PV88080BA_REG_BUCK1_CONF2 0x5A | |
| 47 | #define PV88080BA_REG_BUCK1_CONF5 0x5D | |
| 48 | #define PV88080BA_REG_BUCK2_CONF0 0x2D | |
| 49 | #define PV88080BA_REG_BUCK2_CONF1 0x2F | |
| 50 | #define PV88080BA_REG_BUCK2_CONF2 0x63 | |
| 51 | #define PV88080BA_REG_BUCK2_CONF5 0x66 | |
| 52 | #define PV88080BA_REG_BUCK3_CONF0 0x30 | |
| 53 | #define PV88080BA_REG_BUCK3_CONF1 0x32 | |
| 54 | #define PV88080BA_REG_BUCK3_CONF2 0x6C | |
| 55 | #define PV88080BA_REG_BUCK3_CONF5 0x6F | |
| 99cf3af5 JB |
56 | |
| 57 | /* PV88080_REG_EVENT_A (addr=0x04) */ | |
| 58 | #define PV88080_E_VDD_FLT 0x01 | |
| 5ff00f6a | 59 | #define PV88080_E_OVER_TEMP 0x02 |
| 99cf3af5 JB |
60 | |
| 61 | /* PV88080_REG_MASK_A (addr=0x09) */ | |
| 62 | #define PV88080_M_VDD_FLT 0x01 | |
| 5ff00f6a | 63 | #define PV88080_M_OVER_TEMP 0x02 |
| 99cf3af5 | 64 | |
| 5ff00f6a | 65 | /* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */ |
| 99cf3af5 | 66 | #define PV88080_BUCK1_EN 0x80 |
| 5ff00f6a EJ |
67 | #define PV88080_VBUCK1_MASK 0x7F |
| 68 | ||
| 69 | /* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */ | |
| 99cf3af5 | 70 | #define PV88080_BUCK2_EN 0x80 |
| 5ff00f6a EJ |
71 | #define PV88080_VBUCK2_MASK 0x7F |
| 72 | ||
| 73 | /* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */ | |
| 99cf3af5 | 74 | #define PV88080_BUCK3_EN 0x80 |
| 5ff00f6a | 75 | #define PV88080_VBUCK3_MASK 0x7F |
| 99cf3af5 | 76 | |
| 5ff00f6a EJ |
77 | /* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */ |
| 78 | #define PV88080_BUCK1_ILIM_SHIFT 2 | |
| 99cf3af5 JB |
79 | #define PV88080_BUCK1_ILIM_MASK 0x0C |
| 80 | #define PV88080_BUCK1_MODE_MASK 0x03 | |
| 81 | ||
| 5ff00f6a EJ |
82 | /* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */ |
| 83 | #define PV88080_BUCK2_ILIM_SHIFT 2 | |
| 99cf3af5 JB |
84 | #define PV88080_BUCK2_ILIM_MASK 0x0C |
| 85 | #define PV88080_BUCK2_MODE_MASK 0x03 | |
| 86 | ||
| 5ff00f6a EJ |
87 | /* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */ |
| 88 | #define PV88080_BUCK3_ILIM_SHIFT 2 | |
| 99cf3af5 JB |
89 | #define PV88080_BUCK3_ILIM_MASK 0x0C |
| 90 | #define PV88080_BUCK3_MODE_MASK 0x03 | |
| 91 | ||
| 92 | #define PV88080_BUCK_MODE_SLEEP 0x00 | |
| 93 | #define PV88080_BUCK_MODE_AUTO 0x01 | |
| 94 | #define PV88080_BUCK_MODE_SYNC 0x02 | |
| 95 | ||
| 5ff00f6a EJ |
96 | /* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */ |
| 97 | #define PV88080_VHVBUCK_MASK 0xFF | |
| 98 | ||
| 99 | /* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */ | |
| 100 | #define PV88080_HVBUCK_EN 0x01 | |
| 101 | ||
| 102 | /* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */ | |
| 103 | /* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */ | |
| 104 | #define PV88080_BUCK_VDAC_RANGE_SHIFT 7 | |
| 105 | #define PV88080_BUCK_VDAC_RANGE_MASK 0x01 | |
| 99cf3af5 | 106 | |
| 5ff00f6a EJ |
107 | #define PV88080_BUCK_VDAC_RANGE_1 0x00 |
| 108 | #define PV88080_BUCK_VDAC_RANGE_2 0x01 | |
| 99cf3af5 | 109 | |
| 5ff00f6a EJ |
110 | /* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */ |
| 111 | /* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */ | |
| 112 | #define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 | |
| 113 | #define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 | |
| 99cf3af5 | 114 | |
| 5ff00f6a EJ |
115 | #define PV88080_BUCK_VRANGE_GAIN_1 0x00 |
| 116 | #define PV88080_BUCK_VRANGE_GAIN_2 0x01 | |
| 99cf3af5 JB |
117 | |
| 118 | #endif /* __PV88080_REGISTERS_H__ */ |