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0ae3b061 AL |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // pv88080-regulator.c - Regulator device driver for PV88080 | |
4 | // Copyright (C) 2016 Powerventure Semiconductor Ltd. | |
99cf3af5 JB |
5 | |
6 | #include <linux/err.h> | |
99cf3af5 JB |
7 | #include <linux/i2c.h> |
8 | #include <linux/module.h> | |
5ff00f6a | 9 | #include <linux/of.h> |
99cf3af5 JB |
10 | #include <linux/init.h> |
11 | #include <linux/slab.h> | |
12 | #include <linux/regulator/driver.h> | |
13 | #include <linux/regulator/machine.h> | |
14 | #include <linux/regmap.h> | |
15 | #include <linux/irq.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/regulator/of_regulator.h> | |
99cf3af5 JB |
18 | #include "pv88080-regulator.h" |
19 | ||
5ff00f6a | 20 | #define PV88080_MAX_REGULATORS 4 |
99cf3af5 JB |
21 | |
22 | /* PV88080 REGULATOR IDs */ | |
23 | enum { | |
24 | /* BUCKs */ | |
25 | PV88080_ID_BUCK1, | |
26 | PV88080_ID_BUCK2, | |
27 | PV88080_ID_BUCK3, | |
5ff00f6a EJ |
28 | PV88080_ID_HVBUCK, |
29 | }; | |
30 | ||
31 | enum pv88080_types { | |
32 | TYPE_PV88080_AA, | |
33 | TYPE_PV88080_BA, | |
99cf3af5 JB |
34 | }; |
35 | ||
36 | struct pv88080_regulator { | |
37 | struct regulator_desc desc; | |
5ff00f6a | 38 | unsigned int mode_reg; |
99cf3af5 JB |
39 | unsigned int conf2; |
40 | unsigned int conf5; | |
41 | }; | |
42 | ||
43 | struct pv88080 { | |
44 | struct device *dev; | |
45 | struct regmap *regmap; | |
46 | struct regulator_dev *rdev[PV88080_MAX_REGULATORS]; | |
5ff00f6a EJ |
47 | unsigned long type; |
48 | const struct pv88080_compatible_regmap *regmap_config; | |
99cf3af5 JB |
49 | }; |
50 | ||
51 | struct pv88080_buck_voltage { | |
52 | int min_uV; | |
53 | int max_uV; | |
54 | int uV_step; | |
55 | }; | |
56 | ||
5ff00f6a EJ |
57 | struct pv88080_buck_regmap { |
58 | /* REGS */ | |
59 | int buck_enable_reg; | |
60 | int buck_vsel_reg; | |
61 | int buck_mode_reg; | |
62 | int buck_limit_reg; | |
63 | int buck_vdac_range_reg; | |
64 | int buck_vrange_gain_reg; | |
65 | /* MASKS */ | |
66 | int buck_enable_mask; | |
67 | int buck_vsel_mask; | |
68 | int buck_limit_mask; | |
69 | }; | |
70 | ||
71 | struct pv88080_compatible_regmap { | |
72 | /* BUCK1, 2, 3 */ | |
73 | struct pv88080_buck_regmap buck_regmap[PV88080_MAX_REGULATORS-1]; | |
74 | /* HVBUCK */ | |
75 | int hvbuck_enable_reg; | |
76 | int hvbuck_vsel_reg; | |
77 | int hvbuck_enable_mask; | |
78 | int hvbuck_vsel_mask; | |
79 | }; | |
80 | ||
99cf3af5 JB |
81 | static const struct regmap_config pv88080_regmap_config = { |
82 | .reg_bits = 8, | |
83 | .val_bits = 8, | |
84 | }; | |
85 | ||
86 | /* Current limits array (in uA) for BUCK1, BUCK2, BUCK3. | |
87 | * Entry indexes corresponds to register values. | |
88 | */ | |
89 | ||
989a99bc | 90 | static const unsigned int pv88080_buck1_limits[] = { |
99cf3af5 JB |
91 | 3230000, 5130000, 6960000, 8790000 |
92 | }; | |
93 | ||
989a99bc | 94 | static const unsigned int pv88080_buck23_limits[] = { |
99cf3af5 JB |
95 | 1496000, 2393000, 3291000, 4189000 |
96 | }; | |
97 | ||
98 | static const struct pv88080_buck_voltage pv88080_buck_vol[2] = { | |
99 | { | |
100 | .min_uV = 600000, | |
101 | .max_uV = 1393750, | |
102 | .uV_step = 6250, | |
103 | }, | |
104 | { | |
105 | .min_uV = 1400000, | |
106 | .max_uV = 2193750, | |
107 | .uV_step = 6250, | |
108 | }, | |
109 | }; | |
110 | ||
5ff00f6a EJ |
111 | static const struct pv88080_compatible_regmap pv88080_aa_regs = { |
112 | /* BUCK1 */ | |
113 | .buck_regmap[0] = { | |
114 | .buck_enable_reg = PV88080AA_REG_BUCK1_CONF0, | |
115 | .buck_vsel_reg = PV88080AA_REG_BUCK1_CONF0, | |
116 | .buck_mode_reg = PV88080AA_REG_BUCK1_CONF1, | |
117 | .buck_limit_reg = PV88080AA_REG_BUCK1_CONF1, | |
118 | .buck_vdac_range_reg = PV88080AA_REG_BUCK1_CONF2, | |
119 | .buck_vrange_gain_reg = PV88080AA_REG_BUCK1_CONF5, | |
120 | .buck_enable_mask = PV88080_BUCK1_EN, | |
121 | .buck_vsel_mask = PV88080_VBUCK1_MASK, | |
122 | .buck_limit_mask = PV88080_BUCK1_ILIM_MASK, | |
123 | }, | |
124 | /* BUCK2 */ | |
125 | .buck_regmap[1] = { | |
126 | .buck_enable_reg = PV88080AA_REG_BUCK2_CONF0, | |
127 | .buck_vsel_reg = PV88080AA_REG_BUCK2_CONF0, | |
128 | .buck_mode_reg = PV88080AA_REG_BUCK2_CONF1, | |
129 | .buck_limit_reg = PV88080AA_REG_BUCK2_CONF1, | |
130 | .buck_vdac_range_reg = PV88080AA_REG_BUCK2_CONF2, | |
131 | .buck_vrange_gain_reg = PV88080AA_REG_BUCK2_CONF5, | |
132 | .buck_enable_mask = PV88080_BUCK2_EN, | |
133 | .buck_vsel_mask = PV88080_VBUCK2_MASK, | |
134 | .buck_limit_mask = PV88080_BUCK2_ILIM_MASK, | |
135 | }, | |
136 | /* BUCK3 */ | |
137 | .buck_regmap[2] = { | |
138 | .buck_enable_reg = PV88080AA_REG_BUCK3_CONF0, | |
139 | .buck_vsel_reg = PV88080AA_REG_BUCK3_CONF0, | |
140 | .buck_mode_reg = PV88080AA_REG_BUCK3_CONF1, | |
141 | .buck_limit_reg = PV88080AA_REG_BUCK3_CONF1, | |
142 | .buck_vdac_range_reg = PV88080AA_REG_BUCK3_CONF2, | |
143 | .buck_vrange_gain_reg = PV88080AA_REG_BUCK3_CONF5, | |
144 | .buck_enable_mask = PV88080_BUCK3_EN, | |
145 | .buck_vsel_mask = PV88080_VBUCK3_MASK, | |
146 | .buck_limit_mask = PV88080_BUCK3_ILIM_MASK, | |
147 | }, | |
148 | /* HVBUCK */ | |
149 | .hvbuck_enable_reg = PV88080AA_REG_HVBUCK_CONF2, | |
150 | .hvbuck_vsel_reg = PV88080AA_REG_HVBUCK_CONF1, | |
151 | .hvbuck_enable_mask = PV88080_HVBUCK_EN, | |
152 | .hvbuck_vsel_mask = PV88080_VHVBUCK_MASK, | |
153 | }; | |
154 | ||
155 | static const struct pv88080_compatible_regmap pv88080_ba_regs = { | |
156 | /* BUCK1 */ | |
157 | .buck_regmap[0] = { | |
158 | .buck_enable_reg = PV88080BA_REG_BUCK1_CONF0, | |
159 | .buck_vsel_reg = PV88080BA_REG_BUCK1_CONF0, | |
160 | .buck_mode_reg = PV88080BA_REG_BUCK1_CONF1, | |
161 | .buck_limit_reg = PV88080BA_REG_BUCK1_CONF1, | |
162 | .buck_vdac_range_reg = PV88080BA_REG_BUCK1_CONF2, | |
163 | .buck_vrange_gain_reg = PV88080BA_REG_BUCK1_CONF5, | |
164 | .buck_enable_mask = PV88080_BUCK1_EN, | |
165 | .buck_vsel_mask = PV88080_VBUCK1_MASK, | |
166 | .buck_limit_mask = PV88080_BUCK1_ILIM_MASK, | |
167 | }, | |
168 | /* BUCK2 */ | |
169 | .buck_regmap[1] = { | |
170 | .buck_enable_reg = PV88080BA_REG_BUCK2_CONF0, | |
171 | .buck_vsel_reg = PV88080BA_REG_BUCK2_CONF0, | |
172 | .buck_mode_reg = PV88080BA_REG_BUCK2_CONF1, | |
173 | .buck_limit_reg = PV88080BA_REG_BUCK2_CONF1, | |
174 | .buck_vdac_range_reg = PV88080BA_REG_BUCK2_CONF2, | |
175 | .buck_vrange_gain_reg = PV88080BA_REG_BUCK2_CONF5, | |
176 | .buck_enable_mask = PV88080_BUCK2_EN, | |
177 | .buck_vsel_mask = PV88080_VBUCK2_MASK, | |
178 | .buck_limit_mask = PV88080_BUCK2_ILIM_MASK, | |
179 | }, | |
180 | /* BUCK3 */ | |
181 | .buck_regmap[2] = { | |
182 | .buck_enable_reg = PV88080BA_REG_BUCK3_CONF0, | |
183 | .buck_vsel_reg = PV88080BA_REG_BUCK3_CONF0, | |
184 | .buck_mode_reg = PV88080BA_REG_BUCK3_CONF1, | |
185 | .buck_limit_reg = PV88080BA_REG_BUCK3_CONF1, | |
186 | .buck_vdac_range_reg = PV88080BA_REG_BUCK3_CONF2, | |
187 | .buck_vrange_gain_reg = PV88080BA_REG_BUCK3_CONF5, | |
188 | .buck_enable_mask = PV88080_BUCK3_EN, | |
189 | .buck_vsel_mask = PV88080_VBUCK3_MASK, | |
190 | .buck_limit_mask = PV88080_BUCK3_ILIM_MASK, | |
191 | }, | |
192 | /* HVBUCK */ | |
193 | .hvbuck_enable_reg = PV88080BA_REG_HVBUCK_CONF2, | |
194 | .hvbuck_vsel_reg = PV88080BA_REG_HVBUCK_CONF1, | |
195 | .hvbuck_enable_mask = PV88080_HVBUCK_EN, | |
196 | .hvbuck_vsel_mask = PV88080_VHVBUCK_MASK, | |
197 | }; | |
198 | ||
199 | #ifdef CONFIG_OF | |
200 | static const struct of_device_id pv88080_dt_ids[] = { | |
201 | { .compatible = "pvs,pv88080", .data = (void *)TYPE_PV88080_AA }, | |
202 | { .compatible = "pvs,pv88080-aa", .data = (void *)TYPE_PV88080_AA }, | |
203 | { .compatible = "pvs,pv88080-ba", .data = (void *)TYPE_PV88080_BA }, | |
204 | {}, | |
205 | }; | |
206 | MODULE_DEVICE_TABLE(of, pv88080_dt_ids); | |
207 | #endif | |
208 | ||
99cf3af5 JB |
209 | static unsigned int pv88080_buck_get_mode(struct regulator_dev *rdev) |
210 | { | |
211 | struct pv88080_regulator *info = rdev_get_drvdata(rdev); | |
212 | unsigned int data; | |
213 | int ret, mode = 0; | |
214 | ||
5ff00f6a | 215 | ret = regmap_read(rdev->regmap, info->mode_reg, &data); |
99cf3af5 JB |
216 | if (ret < 0) |
217 | return ret; | |
218 | ||
219 | switch (data & PV88080_BUCK1_MODE_MASK) { | |
220 | case PV88080_BUCK_MODE_SYNC: | |
221 | mode = REGULATOR_MODE_FAST; | |
222 | break; | |
223 | case PV88080_BUCK_MODE_AUTO: | |
224 | mode = REGULATOR_MODE_NORMAL; | |
225 | break; | |
226 | case PV88080_BUCK_MODE_SLEEP: | |
227 | mode = REGULATOR_MODE_STANDBY; | |
228 | break; | |
229 | default: | |
230 | return -EINVAL; | |
231 | } | |
232 | ||
233 | return mode; | |
234 | } | |
235 | ||
236 | static int pv88080_buck_set_mode(struct regulator_dev *rdev, | |
237 | unsigned int mode) | |
238 | { | |
239 | struct pv88080_regulator *info = rdev_get_drvdata(rdev); | |
240 | int val = 0; | |
241 | ||
242 | switch (mode) { | |
243 | case REGULATOR_MODE_FAST: | |
244 | val = PV88080_BUCK_MODE_SYNC; | |
245 | break; | |
246 | case REGULATOR_MODE_NORMAL: | |
247 | val = PV88080_BUCK_MODE_AUTO; | |
248 | break; | |
249 | case REGULATOR_MODE_STANDBY: | |
250 | val = PV88080_BUCK_MODE_SLEEP; | |
251 | break; | |
252 | default: | |
253 | return -EINVAL; | |
254 | } | |
255 | ||
5ff00f6a | 256 | return regmap_update_bits(rdev->regmap, info->mode_reg, |
99cf3af5 JB |
257 | PV88080_BUCK1_MODE_MASK, val); |
258 | } | |
259 | ||
d4fdf5e1 | 260 | static const struct regulator_ops pv88080_buck_ops = { |
99cf3af5 JB |
261 | .get_mode = pv88080_buck_get_mode, |
262 | .set_mode = pv88080_buck_set_mode, | |
263 | .enable = regulator_enable_regmap, | |
264 | .disable = regulator_disable_regmap, | |
265 | .is_enabled = regulator_is_enabled_regmap, | |
266 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
267 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
268 | .list_voltage = regulator_list_voltage_linear, | |
989a99bc AL |
269 | .set_current_limit = regulator_set_current_limit_regmap, |
270 | .get_current_limit = regulator_get_current_limit_regmap, | |
99cf3af5 JB |
271 | }; |
272 | ||
d4fdf5e1 | 273 | static const struct regulator_ops pv88080_hvbuck_ops = { |
5ff00f6a EJ |
274 | .enable = regulator_enable_regmap, |
275 | .disable = regulator_disable_regmap, | |
276 | .is_enabled = regulator_is_enabled_regmap, | |
277 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
278 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
279 | .list_voltage = regulator_list_voltage_linear, | |
280 | }; | |
281 | ||
99cf3af5 JB |
282 | #define PV88080_BUCK(chip, regl_name, min, step, max, limits_array) \ |
283 | {\ | |
284 | .desc = {\ | |
285 | .id = chip##_ID_##regl_name,\ | |
286 | .name = __stringify(chip##_##regl_name),\ | |
287 | .of_match = of_match_ptr(#regl_name),\ | |
288 | .regulators_node = of_match_ptr("regulators"),\ | |
289 | .type = REGULATOR_VOLTAGE,\ | |
290 | .owner = THIS_MODULE,\ | |
291 | .ops = &pv88080_buck_ops,\ | |
292 | .min_uV = min, \ | |
293 | .uV_step = step, \ | |
294 | .n_voltages = ((max) - (min))/(step) + 1, \ | |
989a99bc AL |
295 | .curr_table = limits_array, \ |
296 | .n_current_limits = ARRAY_SIZE(limits_array), \ | |
99cf3af5 | 297 | },\ |
5ff00f6a EJ |
298 | } |
299 | ||
300 | #define PV88080_HVBUCK(chip, regl_name, min, step, max) \ | |
301 | {\ | |
302 | .desc = {\ | |
303 | .id = chip##_ID_##regl_name,\ | |
304 | .name = __stringify(chip##_##regl_name),\ | |
305 | .of_match = of_match_ptr(#regl_name),\ | |
306 | .regulators_node = of_match_ptr("regulators"),\ | |
307 | .type = REGULATOR_VOLTAGE,\ | |
308 | .owner = THIS_MODULE,\ | |
309 | .ops = &pv88080_hvbuck_ops,\ | |
310 | .min_uV = min, \ | |
311 | .uV_step = step, \ | |
312 | .n_voltages = ((max) - (min))/(step) + 1, \ | |
313 | },\ | |
99cf3af5 JB |
314 | } |
315 | ||
316 | static struct pv88080_regulator pv88080_regulator_info[] = { | |
317 | PV88080_BUCK(PV88080, BUCK1, 600000, 6250, 1393750, | |
318 | pv88080_buck1_limits), | |
319 | PV88080_BUCK(PV88080, BUCK2, 600000, 6250, 1393750, | |
320 | pv88080_buck23_limits), | |
321 | PV88080_BUCK(PV88080, BUCK3, 600000, 6250, 1393750, | |
322 | pv88080_buck23_limits), | |
5ff00f6a | 323 | PV88080_HVBUCK(PV88080, HVBUCK, 0, 5000, 1275000), |
99cf3af5 JB |
324 | }; |
325 | ||
326 | static irqreturn_t pv88080_irq_handler(int irq, void *data) | |
327 | { | |
328 | struct pv88080 *chip = data; | |
329 | int i, reg_val, err, ret = IRQ_NONE; | |
330 | ||
331 | err = regmap_read(chip->regmap, PV88080_REG_EVENT_A, ®_val); | |
332 | if (err < 0) | |
333 | goto error_i2c; | |
334 | ||
335 | if (reg_val & PV88080_E_VDD_FLT) { | |
336 | for (i = 0; i < PV88080_MAX_REGULATORS; i++) { | |
337 | if (chip->rdev[i] != NULL) { | |
1867af94 | 338 | regulator_lock(chip->rdev[i]); |
99cf3af5 JB |
339 | regulator_notifier_call_chain(chip->rdev[i], |
340 | REGULATOR_EVENT_UNDER_VOLTAGE, | |
341 | NULL); | |
1867af94 | 342 | regulator_unlock(chip->rdev[i]); |
99cf3af5 JB |
343 | } |
344 | } | |
345 | ||
346 | err = regmap_write(chip->regmap, PV88080_REG_EVENT_A, | |
347 | PV88080_E_VDD_FLT); | |
348 | if (err < 0) | |
349 | goto error_i2c; | |
350 | ||
351 | ret = IRQ_HANDLED; | |
352 | } | |
353 | ||
354 | if (reg_val & PV88080_E_OVER_TEMP) { | |
355 | for (i = 0; i < PV88080_MAX_REGULATORS; i++) { | |
356 | if (chip->rdev[i] != NULL) { | |
1867af94 | 357 | regulator_lock(chip->rdev[i]); |
99cf3af5 JB |
358 | regulator_notifier_call_chain(chip->rdev[i], |
359 | REGULATOR_EVENT_OVER_TEMP, | |
360 | NULL); | |
1867af94 | 361 | regulator_unlock(chip->rdev[i]); |
99cf3af5 JB |
362 | } |
363 | } | |
364 | ||
365 | err = regmap_write(chip->regmap, PV88080_REG_EVENT_A, | |
366 | PV88080_E_OVER_TEMP); | |
367 | if (err < 0) | |
368 | goto error_i2c; | |
369 | ||
370 | ret = IRQ_HANDLED; | |
371 | } | |
372 | ||
373 | return ret; | |
374 | ||
375 | error_i2c: | |
376 | dev_err(chip->dev, "I2C error : %d\n", err); | |
377 | return IRQ_NONE; | |
378 | } | |
379 | ||
380 | /* | |
381 | * I2C driver interface functions | |
382 | */ | |
383 | static int pv88080_i2c_probe(struct i2c_client *i2c, | |
384 | const struct i2c_device_id *id) | |
385 | { | |
386 | struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev); | |
387 | struct pv88080 *chip; | |
5ff00f6a EJ |
388 | const struct pv88080_compatible_regmap *regmap_config; |
389 | const struct of_device_id *match; | |
99cf3af5 JB |
390 | struct regulator_config config = { }; |
391 | int i, error, ret; | |
392 | unsigned int conf2, conf5; | |
393 | ||
394 | chip = devm_kzalloc(&i2c->dev, sizeof(struct pv88080), GFP_KERNEL); | |
395 | if (!chip) | |
396 | return -ENOMEM; | |
397 | ||
398 | chip->dev = &i2c->dev; | |
399 | chip->regmap = devm_regmap_init_i2c(i2c, &pv88080_regmap_config); | |
400 | if (IS_ERR(chip->regmap)) { | |
401 | error = PTR_ERR(chip->regmap); | |
402 | dev_err(chip->dev, "Failed to allocate register map: %d\n", | |
403 | error); | |
404 | return error; | |
405 | } | |
406 | ||
5ff00f6a EJ |
407 | if (i2c->dev.of_node) { |
408 | match = of_match_node(pv88080_dt_ids, i2c->dev.of_node); | |
409 | if (!match) { | |
410 | dev_err(chip->dev, "Failed to get of_match_node\n"); | |
411 | return -EINVAL; | |
412 | } | |
413 | chip->type = (unsigned long)match->data; | |
414 | } else { | |
415 | chip->type = id->driver_data; | |
416 | } | |
417 | ||
99cf3af5 JB |
418 | i2c_set_clientdata(i2c, chip); |
419 | ||
420 | if (i2c->irq != 0) { | |
421 | ret = regmap_write(chip->regmap, PV88080_REG_MASK_A, 0xFF); | |
422 | if (ret < 0) { | |
423 | dev_err(chip->dev, | |
424 | "Failed to mask A reg: %d\n", ret); | |
425 | return ret; | |
426 | } | |
427 | ret = regmap_write(chip->regmap, PV88080_REG_MASK_B, 0xFF); | |
428 | if (ret < 0) { | |
429 | dev_err(chip->dev, | |
430 | "Failed to mask B reg: %d\n", ret); | |
431 | return ret; | |
432 | } | |
433 | ret = regmap_write(chip->regmap, PV88080_REG_MASK_C, 0xFF); | |
434 | if (ret < 0) { | |
435 | dev_err(chip->dev, | |
436 | "Failed to mask C reg: %d\n", ret); | |
437 | return ret; | |
438 | } | |
439 | ||
440 | ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, | |
441 | pv88080_irq_handler, | |
442 | IRQF_TRIGGER_LOW|IRQF_ONESHOT, | |
443 | "pv88080", chip); | |
444 | if (ret != 0) { | |
445 | dev_err(chip->dev, "Failed to request IRQ: %d\n", | |
446 | i2c->irq); | |
447 | return ret; | |
448 | } | |
449 | ||
450 | ret = regmap_update_bits(chip->regmap, PV88080_REG_MASK_A, | |
451 | PV88080_M_VDD_FLT | PV88080_M_OVER_TEMP, 0); | |
452 | if (ret < 0) { | |
453 | dev_err(chip->dev, | |
454 | "Failed to update mask reg: %d\n", ret); | |
455 | return ret; | |
456 | } | |
99cf3af5 JB |
457 | } else { |
458 | dev_warn(chip->dev, "No IRQ configured\n"); | |
459 | } | |
460 | ||
5ff00f6a EJ |
461 | switch (chip->type) { |
462 | case TYPE_PV88080_AA: | |
463 | chip->regmap_config = &pv88080_aa_regs; | |
464 | break; | |
465 | case TYPE_PV88080_BA: | |
466 | chip->regmap_config = &pv88080_ba_regs; | |
467 | break; | |
468 | } | |
469 | ||
470 | regmap_config = chip->regmap_config; | |
99cf3af5 JB |
471 | config.dev = chip->dev; |
472 | config.regmap = chip->regmap; | |
473 | ||
5ff00f6a EJ |
474 | /* Registeration for BUCK1, 2, 3 */ |
475 | for (i = 0; i < PV88080_MAX_REGULATORS-1; i++) { | |
99cf3af5 JB |
476 | if (init_data) |
477 | config.init_data = &init_data[i]; | |
478 | ||
989a99bc | 479 | pv88080_regulator_info[i].desc.csel_reg |
5ff00f6a | 480 | = regmap_config->buck_regmap[i].buck_limit_reg; |
989a99bc | 481 | pv88080_regulator_info[i].desc.csel_mask |
5ff00f6a EJ |
482 | = regmap_config->buck_regmap[i].buck_limit_mask; |
483 | pv88080_regulator_info[i].mode_reg | |
484 | = regmap_config->buck_regmap[i].buck_mode_reg; | |
485 | pv88080_regulator_info[i].conf2 | |
486 | = regmap_config->buck_regmap[i].buck_vdac_range_reg; | |
487 | pv88080_regulator_info[i].conf5 | |
488 | = regmap_config->buck_regmap[i].buck_vrange_gain_reg; | |
489 | pv88080_regulator_info[i].desc.enable_reg | |
490 | = regmap_config->buck_regmap[i].buck_enable_reg; | |
491 | pv88080_regulator_info[i].desc.enable_mask | |
492 | = regmap_config->buck_regmap[i].buck_enable_mask; | |
493 | pv88080_regulator_info[i].desc.vsel_reg | |
494 | = regmap_config->buck_regmap[i].buck_vsel_reg; | |
495 | pv88080_regulator_info[i].desc.vsel_mask | |
496 | = regmap_config->buck_regmap[i].buck_vsel_mask; | |
497 | ||
99cf3af5 | 498 | ret = regmap_read(chip->regmap, |
5ff00f6a | 499 | pv88080_regulator_info[i].conf2, &conf2); |
99cf3af5 JB |
500 | if (ret < 0) |
501 | return ret; | |
99cf3af5 JB |
502 | conf2 = ((conf2 >> PV88080_BUCK_VDAC_RANGE_SHIFT) & |
503 | PV88080_BUCK_VDAC_RANGE_MASK); | |
504 | ||
505 | ret = regmap_read(chip->regmap, | |
5ff00f6a | 506 | pv88080_regulator_info[i].conf5, &conf5); |
99cf3af5 JB |
507 | if (ret < 0) |
508 | return ret; | |
99cf3af5 JB |
509 | conf5 = ((conf5 >> PV88080_BUCK_VRANGE_GAIN_SHIFT) & |
510 | PV88080_BUCK_VRANGE_GAIN_MASK); | |
511 | ||
512 | pv88080_regulator_info[i].desc.min_uV = | |
513 | pv88080_buck_vol[conf2].min_uV * (conf5+1); | |
514 | pv88080_regulator_info[i].desc.uV_step = | |
515 | pv88080_buck_vol[conf2].uV_step * (conf5+1); | |
516 | pv88080_regulator_info[i].desc.n_voltages = | |
517 | ((pv88080_buck_vol[conf2].max_uV * (conf5+1)) | |
518 | - (pv88080_regulator_info[i].desc.min_uV)) | |
519 | /(pv88080_regulator_info[i].desc.uV_step) + 1; | |
520 | ||
521 | config.driver_data = (void *)&pv88080_regulator_info[i]; | |
522 | chip->rdev[i] = devm_regulator_register(chip->dev, | |
523 | &pv88080_regulator_info[i].desc, &config); | |
524 | if (IS_ERR(chip->rdev[i])) { | |
525 | dev_err(chip->dev, | |
526 | "Failed to register PV88080 regulator\n"); | |
527 | return PTR_ERR(chip->rdev[i]); | |
528 | } | |
529 | } | |
530 | ||
5ff00f6a EJ |
531 | pv88080_regulator_info[PV88080_ID_HVBUCK].desc.enable_reg |
532 | = regmap_config->hvbuck_enable_reg; | |
533 | pv88080_regulator_info[PV88080_ID_HVBUCK].desc.enable_mask | |
534 | = regmap_config->hvbuck_enable_mask; | |
535 | pv88080_regulator_info[PV88080_ID_HVBUCK].desc.vsel_reg | |
536 | = regmap_config->hvbuck_vsel_reg; | |
537 | pv88080_regulator_info[PV88080_ID_HVBUCK].desc.vsel_mask | |
538 | = regmap_config->hvbuck_vsel_mask; | |
539 | ||
540 | /* Registeration for HVBUCK */ | |
541 | if (init_data) | |
542 | config.init_data = &init_data[PV88080_ID_HVBUCK]; | |
543 | ||
544 | config.driver_data = (void *)&pv88080_regulator_info[PV88080_ID_HVBUCK]; | |
545 | chip->rdev[PV88080_ID_HVBUCK] = devm_regulator_register(chip->dev, | |
546 | &pv88080_regulator_info[PV88080_ID_HVBUCK].desc, &config); | |
547 | if (IS_ERR(chip->rdev[PV88080_ID_HVBUCK])) { | |
548 | dev_err(chip->dev, "Failed to register PV88080 regulator\n"); | |
549 | return PTR_ERR(chip->rdev[PV88080_ID_HVBUCK]); | |
550 | } | |
551 | ||
99cf3af5 JB |
552 | return 0; |
553 | } | |
554 | ||
555 | static const struct i2c_device_id pv88080_i2c_id[] = { | |
5ff00f6a EJ |
556 | { "pv88080", TYPE_PV88080_AA }, |
557 | { "pv88080-aa", TYPE_PV88080_AA }, | |
558 | { "pv88080-ba", TYPE_PV88080_BA }, | |
99cf3af5 JB |
559 | {}, |
560 | }; | |
561 | MODULE_DEVICE_TABLE(i2c, pv88080_i2c_id); | |
562 | ||
99cf3af5 JB |
563 | static struct i2c_driver pv88080_regulator_driver = { |
564 | .driver = { | |
565 | .name = "pv88080", | |
566 | .of_match_table = of_match_ptr(pv88080_dt_ids), | |
567 | }, | |
568 | .probe = pv88080_i2c_probe, | |
569 | .id_table = pv88080_i2c_id, | |
570 | }; | |
571 | ||
572 | module_i2c_driver(pv88080_regulator_driver); | |
573 | ||
574 | MODULE_AUTHOR("James Ban <James.Ban.opensource@diasemi.com>"); | |
575 | MODULE_DESCRIPTION("Regulator device driver for Powerventure PV88080"); | |
576 | MODULE_LICENSE("GPL"); |