Commit | Line | Data |
---|---|---|
e5ce4208 GG |
1 | /* |
2 | * Driver for Regulator part of Palmas PMIC Chips | |
3 | * | |
7be859f7 | 4 | * Copyright 2011-2013 Texas Instruments Inc. |
e5ce4208 GG |
5 | * |
6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/regulator/driver.h> | |
21 | #include <linux/regulator/machine.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/regmap.h> | |
24 | #include <linux/mfd/palmas.h> | |
a361cd9f GG |
25 | #include <linux/of.h> |
26 | #include <linux/of_platform.h> | |
27 | #include <linux/regulator/of_regulator.h> | |
e5ce4208 GG |
28 | |
29 | struct regs_info { | |
30 | char *name; | |
31 | u8 vsel_addr; | |
32 | u8 ctrl_addr; | |
33 | u8 tstep_addr; | |
34 | }; | |
35 | ||
36 | static const struct regs_info palmas_regs_info[] = { | |
37 | { | |
38 | .name = "SMPS12", | |
39 | .vsel_addr = PALMAS_SMPS12_VOLTAGE, | |
40 | .ctrl_addr = PALMAS_SMPS12_CTRL, | |
41 | .tstep_addr = PALMAS_SMPS12_TSTEP, | |
42 | }, | |
43 | { | |
44 | .name = "SMPS123", | |
45 | .vsel_addr = PALMAS_SMPS12_VOLTAGE, | |
46 | .ctrl_addr = PALMAS_SMPS12_CTRL, | |
47 | .tstep_addr = PALMAS_SMPS12_TSTEP, | |
48 | }, | |
49 | { | |
50 | .name = "SMPS3", | |
51 | .vsel_addr = PALMAS_SMPS3_VOLTAGE, | |
52 | .ctrl_addr = PALMAS_SMPS3_CTRL, | |
53 | }, | |
54 | { | |
55 | .name = "SMPS45", | |
56 | .vsel_addr = PALMAS_SMPS45_VOLTAGE, | |
57 | .ctrl_addr = PALMAS_SMPS45_CTRL, | |
58 | .tstep_addr = PALMAS_SMPS45_TSTEP, | |
59 | }, | |
60 | { | |
61 | .name = "SMPS457", | |
62 | .vsel_addr = PALMAS_SMPS45_VOLTAGE, | |
63 | .ctrl_addr = PALMAS_SMPS45_CTRL, | |
64 | .tstep_addr = PALMAS_SMPS45_TSTEP, | |
65 | }, | |
66 | { | |
67 | .name = "SMPS6", | |
68 | .vsel_addr = PALMAS_SMPS6_VOLTAGE, | |
69 | .ctrl_addr = PALMAS_SMPS6_CTRL, | |
70 | .tstep_addr = PALMAS_SMPS6_TSTEP, | |
71 | }, | |
72 | { | |
73 | .name = "SMPS7", | |
74 | .vsel_addr = PALMAS_SMPS7_VOLTAGE, | |
75 | .ctrl_addr = PALMAS_SMPS7_CTRL, | |
76 | }, | |
77 | { | |
78 | .name = "SMPS8", | |
79 | .vsel_addr = PALMAS_SMPS8_VOLTAGE, | |
80 | .ctrl_addr = PALMAS_SMPS8_CTRL, | |
81 | .tstep_addr = PALMAS_SMPS8_TSTEP, | |
82 | }, | |
83 | { | |
84 | .name = "SMPS9", | |
85 | .vsel_addr = PALMAS_SMPS9_VOLTAGE, | |
86 | .ctrl_addr = PALMAS_SMPS9_CTRL, | |
87 | }, | |
88 | { | |
89 | .name = "SMPS10", | |
90 | }, | |
91 | { | |
92 | .name = "LDO1", | |
93 | .vsel_addr = PALMAS_LDO1_VOLTAGE, | |
94 | .ctrl_addr = PALMAS_LDO1_CTRL, | |
95 | }, | |
96 | { | |
97 | .name = "LDO2", | |
98 | .vsel_addr = PALMAS_LDO2_VOLTAGE, | |
99 | .ctrl_addr = PALMAS_LDO2_CTRL, | |
100 | }, | |
101 | { | |
102 | .name = "LDO3", | |
103 | .vsel_addr = PALMAS_LDO3_VOLTAGE, | |
104 | .ctrl_addr = PALMAS_LDO3_CTRL, | |
105 | }, | |
106 | { | |
107 | .name = "LDO4", | |
108 | .vsel_addr = PALMAS_LDO4_VOLTAGE, | |
109 | .ctrl_addr = PALMAS_LDO4_CTRL, | |
110 | }, | |
111 | { | |
112 | .name = "LDO5", | |
113 | .vsel_addr = PALMAS_LDO5_VOLTAGE, | |
114 | .ctrl_addr = PALMAS_LDO5_CTRL, | |
115 | }, | |
116 | { | |
117 | .name = "LDO6", | |
118 | .vsel_addr = PALMAS_LDO6_VOLTAGE, | |
119 | .ctrl_addr = PALMAS_LDO6_CTRL, | |
120 | }, | |
121 | { | |
122 | .name = "LDO7", | |
123 | .vsel_addr = PALMAS_LDO7_VOLTAGE, | |
124 | .ctrl_addr = PALMAS_LDO7_CTRL, | |
125 | }, | |
126 | { | |
127 | .name = "LDO8", | |
128 | .vsel_addr = PALMAS_LDO8_VOLTAGE, | |
129 | .ctrl_addr = PALMAS_LDO8_CTRL, | |
130 | }, | |
131 | { | |
132 | .name = "LDO9", | |
133 | .vsel_addr = PALMAS_LDO9_VOLTAGE, | |
134 | .ctrl_addr = PALMAS_LDO9_CTRL, | |
135 | }, | |
136 | { | |
137 | .name = "LDOLN", | |
138 | .vsel_addr = PALMAS_LDOLN_VOLTAGE, | |
139 | .ctrl_addr = PALMAS_LDOLN_CTRL, | |
140 | }, | |
141 | { | |
142 | .name = "LDOUSB", | |
143 | .vsel_addr = PALMAS_LDOUSB_VOLTAGE, | |
144 | .ctrl_addr = PALMAS_LDOUSB_CTRL, | |
145 | }, | |
146 | }; | |
147 | ||
148 | #define SMPS_CTRL_MODE_OFF 0x00 | |
149 | #define SMPS_CTRL_MODE_ON 0x01 | |
150 | #define SMPS_CTRL_MODE_ECO 0x02 | |
151 | #define SMPS_CTRL_MODE_PWM 0x03 | |
152 | ||
153 | /* These values are derived from the data sheet. And are the number of steps | |
154 | * where there is a voltage change, the ranges at beginning and end of register | |
155 | * max/min values where there are no change are ommitted. | |
156 | * | |
157 | * So they are basically (maxV-minV)/stepV | |
158 | */ | |
159 | #define PALMAS_SMPS_NUM_VOLTAGES 116 | |
160 | #define PALMAS_SMPS10_NUM_VOLTAGES 2 | |
161 | #define PALMAS_LDO_NUM_VOLTAGES 50 | |
162 | ||
163 | #define SMPS10_VSEL (1<<3) | |
164 | #define SMPS10_BOOST_EN (1<<2) | |
165 | #define SMPS10_BYPASS_EN (1<<1) | |
166 | #define SMPS10_SWITCH_EN (1<<0) | |
167 | ||
168 | #define REGULATOR_SLAVE 0 | |
169 | ||
170 | static int palmas_smps_read(struct palmas *palmas, unsigned int reg, | |
171 | unsigned int *dest) | |
172 | { | |
173 | unsigned int addr; | |
174 | ||
175 | addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); | |
176 | ||
177 | return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); | |
178 | } | |
179 | ||
180 | static int palmas_smps_write(struct palmas *palmas, unsigned int reg, | |
181 | unsigned int value) | |
182 | { | |
183 | unsigned int addr; | |
184 | ||
185 | addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); | |
186 | ||
187 | return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); | |
188 | } | |
189 | ||
190 | static int palmas_ldo_read(struct palmas *palmas, unsigned int reg, | |
191 | unsigned int *dest) | |
192 | { | |
193 | unsigned int addr; | |
194 | ||
195 | addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); | |
196 | ||
197 | return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); | |
198 | } | |
199 | ||
200 | static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, | |
201 | unsigned int value) | |
202 | { | |
203 | unsigned int addr; | |
204 | ||
205 | addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); | |
206 | ||
207 | return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); | |
208 | } | |
209 | ||
210 | static int palmas_is_enabled_smps(struct regulator_dev *dev) | |
211 | { | |
212 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
213 | int id = rdev_get_id(dev); | |
214 | unsigned int reg; | |
215 | ||
216 | palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
217 | ||
218 | reg &= PALMAS_SMPS12_CTRL_STATUS_MASK; | |
219 | reg >>= PALMAS_SMPS12_CTRL_STATUS_SHIFT; | |
220 | ||
221 | return !!(reg); | |
222 | } | |
223 | ||
224 | static int palmas_enable_smps(struct regulator_dev *dev) | |
225 | { | |
226 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
227 | int id = rdev_get_id(dev); | |
228 | unsigned int reg; | |
229 | ||
230 | palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
231 | ||
232 | reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; | |
233 | reg |= SMPS_CTRL_MODE_ON; | |
234 | ||
235 | palmas_smps_write(pmic->palmas, palmas_regs_info[id].ctrl_addr, reg); | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static int palmas_disable_smps(struct regulator_dev *dev) | |
241 | { | |
242 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
243 | int id = rdev_get_id(dev); | |
244 | unsigned int reg; | |
245 | ||
246 | palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
247 | ||
248 | reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; | |
249 | ||
250 | palmas_smps_write(pmic->palmas, palmas_regs_info[id].ctrl_addr, reg); | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
255 | ||
256 | static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) | |
257 | { | |
258 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
259 | int id = rdev_get_id(dev); | |
260 | unsigned int reg; | |
261 | ||
262 | palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
999f0c7c | 263 | reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; |
e5ce4208 GG |
264 | |
265 | switch (mode) { | |
266 | case REGULATOR_MODE_NORMAL: | |
267 | reg |= SMPS_CTRL_MODE_ON; | |
268 | break; | |
269 | case REGULATOR_MODE_IDLE: | |
270 | reg |= SMPS_CTRL_MODE_ECO; | |
271 | break; | |
272 | case REGULATOR_MODE_FAST: | |
273 | reg |= SMPS_CTRL_MODE_PWM; | |
274 | break; | |
275 | default: | |
276 | return -EINVAL; | |
277 | } | |
278 | palmas_smps_write(pmic->palmas, palmas_regs_info[id].ctrl_addr, reg); | |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
283 | static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) | |
284 | { | |
285 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
286 | int id = rdev_get_id(dev); | |
287 | unsigned int reg; | |
288 | ||
289 | palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
290 | reg &= PALMAS_SMPS12_CTRL_STATUS_MASK; | |
291 | reg >>= PALMAS_SMPS12_CTRL_STATUS_SHIFT; | |
292 | ||
293 | switch (reg) { | |
294 | case SMPS_CTRL_MODE_ON: | |
295 | return REGULATOR_MODE_NORMAL; | |
296 | case SMPS_CTRL_MODE_ECO: | |
297 | return REGULATOR_MODE_IDLE; | |
298 | case SMPS_CTRL_MODE_PWM: | |
299 | return REGULATOR_MODE_FAST; | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static int palmas_list_voltage_smps(struct regulator_dev *dev, | |
306 | unsigned selector) | |
307 | { | |
308 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
309 | int id = rdev_get_id(dev); | |
310 | int mult = 1; | |
311 | ||
e5ce4208 GG |
312 | /* Read the multiplier set in VSEL register to return |
313 | * the correct voltage. | |
314 | */ | |
315 | if (pmic->range[id]) | |
316 | mult = 2; | |
317 | ||
ad02e846 AL |
318 | if (selector == 0) |
319 | return 0; | |
320 | else if (selector < 6) | |
321 | return 500000 * mult; | |
322 | else | |
323 | /* Voltage is linear mapping starting from selector 6, | |
324 | * volt = (0.49V + ((selector - 5) * 0.01V)) * RANGE | |
325 | * RANGE is either x1 or x2 | |
326 | */ | |
327 | return (490000 + ((selector - 5) * 10000)) * mult; | |
e5ce4208 GG |
328 | } |
329 | ||
330 | static int palmas_map_voltage_smps(struct regulator_dev *rdev, | |
331 | int min_uV, int max_uV) | |
332 | { | |
8a165df7 AL |
333 | struct palmas_pmic *pmic = rdev_get_drvdata(rdev); |
334 | int id = rdev_get_id(rdev); | |
e5ce4208 GG |
335 | int ret, voltage; |
336 | ||
8a165df7 AL |
337 | if (min_uV == 0) |
338 | return 0; | |
339 | ||
340 | if (pmic->range[id]) { /* RANGE is x2 */ | |
341 | if (min_uV < 1000000) | |
342 | min_uV = 1000000; | |
ad02e846 | 343 | ret = DIV_ROUND_UP(min_uV - 1000000, 20000) + 6; |
8a165df7 AL |
344 | } else { /* RANGE is x1 */ |
345 | if (min_uV < 500000) | |
346 | min_uV = 500000; | |
ad02e846 | 347 | ret = DIV_ROUND_UP(min_uV - 500000, 10000) + 6; |
8a165df7 | 348 | } |
e5ce4208 GG |
349 | |
350 | /* Map back into a voltage to verify we're still in bounds */ | |
351 | voltage = palmas_list_voltage_smps(rdev, ret); | |
352 | if (voltage < min_uV || voltage > max_uV) | |
353 | return -EINVAL; | |
354 | ||
355 | return ret; | |
356 | } | |
357 | ||
358 | static struct regulator_ops palmas_ops_smps = { | |
359 | .is_enabled = palmas_is_enabled_smps, | |
360 | .enable = palmas_enable_smps, | |
361 | .disable = palmas_disable_smps, | |
362 | .set_mode = palmas_set_mode_smps, | |
363 | .get_mode = palmas_get_mode_smps, | |
bdc4baac AL |
364 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
365 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
e5ce4208 GG |
366 | .list_voltage = palmas_list_voltage_smps, |
367 | .map_voltage = palmas_map_voltage_smps, | |
368 | }; | |
369 | ||
e5ce4208 GG |
370 | static struct regulator_ops palmas_ops_smps10 = { |
371 | .is_enabled = regulator_is_enabled_regmap, | |
372 | .enable = regulator_enable_regmap, | |
373 | .disable = regulator_disable_regmap, | |
374 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
375 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
8029a006 AL |
376 | .list_voltage = regulator_list_voltage_linear, |
377 | .map_voltage = regulator_map_voltage_linear, | |
e5ce4208 GG |
378 | }; |
379 | ||
380 | static int palmas_is_enabled_ldo(struct regulator_dev *dev) | |
381 | { | |
382 | struct palmas_pmic *pmic = rdev_get_drvdata(dev); | |
383 | int id = rdev_get_id(dev); | |
384 | unsigned int reg; | |
385 | ||
386 | palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, ®); | |
387 | ||
388 | reg &= PALMAS_LDO1_CTRL_STATUS; | |
389 | ||
390 | return !!(reg); | |
391 | } | |
392 | ||
e5ce4208 GG |
393 | static struct regulator_ops palmas_ops_ldo = { |
394 | .is_enabled = palmas_is_enabled_ldo, | |
395 | .enable = regulator_enable_regmap, | |
396 | .disable = regulator_disable_regmap, | |
4a247a96 AL |
397 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
398 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
9119ff6a AL |
399 | .list_voltage = regulator_list_voltage_linear, |
400 | .map_voltage = regulator_map_voltage_linear, | |
e5ce4208 GG |
401 | }; |
402 | ||
403 | /* | |
404 | * setup the hardware based sleep configuration of the SMPS/LDO regulators | |
405 | * from the platform data. This is different to the software based control | |
406 | * supported by the regulator framework as it is controlled by toggling | |
407 | * pins on the PMIC such as PREQ, SYSEN, ... | |
408 | */ | |
409 | static int palmas_smps_init(struct palmas *palmas, int id, | |
410 | struct palmas_reg_init *reg_init) | |
411 | { | |
412 | unsigned int reg; | |
413 | unsigned int addr; | |
414 | int ret; | |
415 | ||
416 | addr = palmas_regs_info[id].ctrl_addr; | |
417 | ||
418 | ret = palmas_smps_read(palmas, addr, ®); | |
419 | if (ret) | |
420 | return ret; | |
421 | ||
fedd89b1 AL |
422 | switch (id) { |
423 | case PALMAS_REG_SMPS10: | |
424 | if (reg_init->mode_sleep) { | |
425 | reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK; | |
426 | reg |= reg_init->mode_sleep << | |
427 | PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT; | |
428 | } | |
429 | break; | |
430 | default: | |
e5ce4208 GG |
431 | if (reg_init->warm_reset) |
432 | reg |= PALMAS_SMPS12_CTRL_WR_S; | |
433 | ||
434 | if (reg_init->roof_floor) | |
435 | reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; | |
436 | ||
437 | if (reg_init->mode_sleep) { | |
438 | reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK; | |
439 | reg |= reg_init->mode_sleep << | |
440 | PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT; | |
441 | } | |
e5ce4208 | 442 | } |
fedd89b1 | 443 | |
e5ce4208 GG |
444 | ret = palmas_smps_write(palmas, addr, reg); |
445 | if (ret) | |
446 | return ret; | |
447 | ||
448 | if (palmas_regs_info[id].tstep_addr && reg_init->tstep) { | |
449 | addr = palmas_regs_info[id].tstep_addr; | |
450 | ||
451 | reg = reg_init->tstep & PALMAS_SMPS12_TSTEP_TSTEP_MASK; | |
452 | ||
453 | ret = palmas_smps_write(palmas, addr, reg); | |
454 | if (ret) | |
455 | return ret; | |
456 | } | |
457 | ||
458 | if (palmas_regs_info[id].vsel_addr && reg_init->vsel) { | |
459 | addr = palmas_regs_info[id].vsel_addr; | |
460 | ||
461 | reg = reg_init->vsel; | |
462 | ||
463 | ret = palmas_smps_write(palmas, addr, reg); | |
464 | if (ret) | |
465 | return ret; | |
466 | } | |
467 | ||
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
472 | static int palmas_ldo_init(struct palmas *palmas, int id, | |
473 | struct palmas_reg_init *reg_init) | |
474 | { | |
475 | unsigned int reg; | |
476 | unsigned int addr; | |
477 | int ret; | |
478 | ||
479 | addr = palmas_regs_info[id].ctrl_addr; | |
480 | ||
2735daeb | 481 | ret = palmas_ldo_read(palmas, addr, ®); |
e5ce4208 GG |
482 | if (ret) |
483 | return ret; | |
484 | ||
485 | if (reg_init->warm_reset) | |
486 | reg |= PALMAS_LDO1_CTRL_WR_S; | |
487 | ||
488 | if (reg_init->mode_sleep) | |
489 | reg |= PALMAS_LDO1_CTRL_MODE_SLEEP; | |
490 | ||
2735daeb | 491 | ret = palmas_ldo_write(palmas, addr, reg); |
e5ce4208 GG |
492 | if (ret) |
493 | return ret; | |
494 | ||
495 | return 0; | |
496 | } | |
497 | ||
a361cd9f GG |
498 | static struct of_regulator_match palmas_matches[] = { |
499 | { .name = "smps12", }, | |
500 | { .name = "smps123", }, | |
501 | { .name = "smps3", }, | |
502 | { .name = "smps45", }, | |
503 | { .name = "smps457", }, | |
504 | { .name = "smps6", }, | |
505 | { .name = "smps7", }, | |
506 | { .name = "smps8", }, | |
507 | { .name = "smps9", }, | |
508 | { .name = "smps10", }, | |
509 | { .name = "ldo1", }, | |
510 | { .name = "ldo2", }, | |
511 | { .name = "ldo3", }, | |
512 | { .name = "ldo4", }, | |
513 | { .name = "ldo5", }, | |
514 | { .name = "ldo6", }, | |
515 | { .name = "ldo7", }, | |
516 | { .name = "ldo8", }, | |
517 | { .name = "ldo9", }, | |
518 | { .name = "ldoln", }, | |
519 | { .name = "ldousb", }, | |
520 | }; | |
521 | ||
a5023574 | 522 | static void palmas_dt_to_pdata(struct device *dev, |
a361cd9f GG |
523 | struct device_node *node, |
524 | struct palmas_pmic_platform_data *pdata) | |
525 | { | |
526 | struct device_node *regulators; | |
527 | u32 prop; | |
528 | int idx, ret; | |
529 | ||
c92f5dd2 | 530 | node = of_node_get(node); |
a361cd9f GG |
531 | regulators = of_find_node_by_name(node, "regulators"); |
532 | if (!regulators) { | |
533 | dev_info(dev, "regulator node not found\n"); | |
534 | return; | |
535 | } | |
536 | ||
537 | ret = of_regulator_match(dev, regulators, palmas_matches, | |
538 | PALMAS_NUM_REGS); | |
c92f5dd2 | 539 | of_node_put(regulators); |
a361cd9f GG |
540 | if (ret < 0) { |
541 | dev_err(dev, "Error parsing regulator init data: %d\n", ret); | |
542 | return; | |
543 | } | |
544 | ||
545 | for (idx = 0; idx < PALMAS_NUM_REGS; idx++) { | |
546 | if (!palmas_matches[idx].init_data || | |
547 | !palmas_matches[idx].of_node) | |
548 | continue; | |
549 | ||
550 | pdata->reg_data[idx] = palmas_matches[idx].init_data; | |
551 | ||
552 | pdata->reg_init[idx] = devm_kzalloc(dev, | |
553 | sizeof(struct palmas_reg_init), GFP_KERNEL); | |
554 | ||
7be859f7 | 555 | pdata->reg_init[idx]->warm_reset = |
71f2146f AL |
556 | of_property_read_bool(palmas_matches[idx].of_node, |
557 | "ti,warm-reset"); | |
a361cd9f | 558 | |
7be859f7 GG |
559 | pdata->reg_init[idx]->roof_floor = |
560 | of_property_read_bool(palmas_matches[idx].of_node, | |
561 | "ti,roof-floor"); | |
a361cd9f GG |
562 | |
563 | ret = of_property_read_u32(palmas_matches[idx].of_node, | |
3c870e3f | 564 | "ti,mode-sleep", &prop); |
a361cd9f GG |
565 | if (!ret) |
566 | pdata->reg_init[idx]->mode_sleep = prop; | |
567 | ||
a361cd9f GG |
568 | ret = of_property_read_u32(palmas_matches[idx].of_node, |
569 | "ti,tstep", &prop); | |
570 | if (!ret) | |
571 | pdata->reg_init[idx]->tstep = prop; | |
572 | ||
7be859f7 GG |
573 | ret = of_property_read_bool(palmas_matches[idx].of_node, |
574 | "ti,smps-range"); | |
575 | if (ret) | |
576 | pdata->reg_init[idx]->vsel = | |
577 | PALMAS_SMPS12_VOLTAGE_RANGE; | |
a361cd9f GG |
578 | } |
579 | ||
7be859f7 | 580 | pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); |
a361cd9f GG |
581 | } |
582 | ||
583 | ||
bbcf50b1 | 584 | static int palmas_regulators_probe(struct platform_device *pdev) |
e5ce4208 GG |
585 | { |
586 | struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); | |
587 | struct palmas_pmic_platform_data *pdata = pdev->dev.platform_data; | |
a361cd9f | 588 | struct device_node *node = pdev->dev.of_node; |
e5ce4208 GG |
589 | struct regulator_dev *rdev; |
590 | struct regulator_config config = { }; | |
591 | struct palmas_pmic *pmic; | |
592 | struct palmas_reg_init *reg_init; | |
593 | int id = 0, ret; | |
594 | unsigned int addr, reg; | |
595 | ||
a361cd9f GG |
596 | if (node && !pdata) { |
597 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | |
598 | ||
599 | if (!pdata) | |
600 | return -ENOMEM; | |
601 | ||
602 | palmas_dt_to_pdata(&pdev->dev, node, pdata); | |
603 | } | |
e5ce4208 GG |
604 | |
605 | pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); | |
606 | if (!pmic) | |
607 | return -ENOMEM; | |
608 | ||
609 | pmic->dev = &pdev->dev; | |
610 | pmic->palmas = palmas; | |
611 | palmas->pmic = pmic; | |
612 | platform_set_drvdata(pdev, pmic); | |
613 | ||
614 | ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®); | |
615 | if (ret) | |
1c9d2d71 | 616 | return ret; |
e5ce4208 GG |
617 | |
618 | if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) | |
619 | pmic->smps123 = 1; | |
620 | ||
621 | if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) | |
622 | pmic->smps457 = 1; | |
623 | ||
624 | config.regmap = palmas->regmap[REGULATOR_SLAVE]; | |
625 | config.dev = &pdev->dev; | |
626 | config.driver_data = pmic; | |
627 | ||
628 | for (id = 0; id < PALMAS_REG_LDO1; id++) { | |
629 | ||
630 | /* | |
631 | * Miss out regulators which are not available due | |
632 | * to slaving configurations. | |
633 | */ | |
634 | switch (id) { | |
635 | case PALMAS_REG_SMPS12: | |
636 | case PALMAS_REG_SMPS3: | |
637 | if (pmic->smps123) | |
638 | continue; | |
639 | break; | |
640 | case PALMAS_REG_SMPS123: | |
641 | if (!pmic->smps123) | |
642 | continue; | |
643 | break; | |
644 | case PALMAS_REG_SMPS45: | |
645 | case PALMAS_REG_SMPS7: | |
646 | if (pmic->smps457) | |
647 | continue; | |
648 | break; | |
649 | case PALMAS_REG_SMPS457: | |
650 | if (!pmic->smps457) | |
651 | continue; | |
652 | } | |
653 | ||
bdc4baac AL |
654 | /* Initialise sleep/init values from platform data */ |
655 | if (pdata && pdata->reg_init[id]) { | |
656 | reg_init = pdata->reg_init[id]; | |
657 | ret = palmas_smps_init(palmas, id, reg_init); | |
658 | if (ret) | |
659 | goto err_unregister_regulator; | |
660 | } | |
661 | ||
e5ce4208 GG |
662 | /* Register the regulators */ |
663 | pmic->desc[id].name = palmas_regs_info[id].name; | |
664 | pmic->desc[id].id = id; | |
665 | ||
fedd89b1 AL |
666 | switch (id) { |
667 | case PALMAS_REG_SMPS10: | |
e5ce4208 GG |
668 | pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; |
669 | pmic->desc[id].ops = &palmas_ops_smps10; | |
12565b16 AL |
670 | pmic->desc[id].vsel_reg = |
671 | PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, | |
672 | PALMAS_SMPS10_CTRL); | |
e5ce4208 | 673 | pmic->desc[id].vsel_mask = SMPS10_VSEL; |
a68de074 GG |
674 | pmic->desc[id].enable_reg = |
675 | PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, | |
676 | PALMAS_SMPS10_STATUS); | |
e5ce4208 | 677 | pmic->desc[id].enable_mask = SMPS10_BOOST_EN; |
8029a006 AL |
678 | pmic->desc[id].min_uV = 3750000; |
679 | pmic->desc[id].uV_step = 1250000; | |
fedd89b1 AL |
680 | break; |
681 | default: | |
bdc4baac AL |
682 | /* |
683 | * Read and store the RANGE bit for later use | |
684 | * This must be done before regulator is probed, | |
685 | * otherwise we error in probe with unsupportable ranges. | |
686 | */ | |
e5ce4208 GG |
687 | addr = palmas_regs_info[id].vsel_addr; |
688 | ||
689 | ret = palmas_smps_read(pmic->palmas, addr, ®); | |
690 | if (ret) | |
691 | goto err_unregister_regulator; | |
692 | if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) | |
693 | pmic->range[id] = 1; | |
bdc4baac AL |
694 | |
695 | pmic->desc[id].ops = &palmas_ops_smps; | |
696 | pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES; | |
697 | pmic->desc[id].vsel_reg = | |
698 | PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, | |
699 | palmas_regs_info[id].vsel_addr); | |
700 | pmic->desc[id].vsel_mask = | |
701 | PALMAS_SMPS12_VOLTAGE_VSEL_MASK; | |
e5ce4208 GG |
702 | } |
703 | ||
bdc4baac AL |
704 | pmic->desc[id].type = REGULATOR_VOLTAGE; |
705 | pmic->desc[id].owner = THIS_MODULE; | |
706 | ||
a361cd9f | 707 | if (pdata) |
e5ce4208 GG |
708 | config.init_data = pdata->reg_data[id]; |
709 | else | |
710 | config.init_data = NULL; | |
711 | ||
a361cd9f GG |
712 | config.of_node = palmas_matches[id].of_node; |
713 | ||
e5ce4208 GG |
714 | rdev = regulator_register(&pmic->desc[id], &config); |
715 | if (IS_ERR(rdev)) { | |
716 | dev_err(&pdev->dev, | |
717 | "failed to register %s regulator\n", | |
718 | pdev->name); | |
719 | ret = PTR_ERR(rdev); | |
720 | goto err_unregister_regulator; | |
721 | } | |
722 | ||
723 | /* Save regulator for cleanup */ | |
724 | pmic->rdev[id] = rdev; | |
725 | } | |
726 | ||
727 | /* Start this loop from the id left from previous loop */ | |
728 | for (; id < PALMAS_NUM_REGS; id++) { | |
729 | ||
730 | /* Miss out regulators which are not available due | |
731 | * to alternate functions. | |
732 | */ | |
733 | ||
734 | /* Register the regulators */ | |
735 | pmic->desc[id].name = palmas_regs_info[id].name; | |
736 | pmic->desc[id].id = id; | |
737 | pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES; | |
738 | ||
739 | pmic->desc[id].ops = &palmas_ops_ldo; | |
740 | ||
741 | pmic->desc[id].type = REGULATOR_VOLTAGE; | |
742 | pmic->desc[id].owner = THIS_MODULE; | |
9119ff6a AL |
743 | pmic->desc[id].min_uV = 900000; |
744 | pmic->desc[id].uV_step = 50000; | |
745 | pmic->desc[id].linear_min_sel = 1; | |
4a247a96 AL |
746 | pmic->desc[id].vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, |
747 | palmas_regs_info[id].vsel_addr); | |
748 | pmic->desc[id].vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; | |
a68de074 GG |
749 | pmic->desc[id].enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, |
750 | palmas_regs_info[id].ctrl_addr); | |
e5ce4208 GG |
751 | pmic->desc[id].enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; |
752 | ||
a361cd9f | 753 | if (pdata) |
e5ce4208 GG |
754 | config.init_data = pdata->reg_data[id]; |
755 | else | |
756 | config.init_data = NULL; | |
757 | ||
a361cd9f GG |
758 | config.of_node = palmas_matches[id].of_node; |
759 | ||
e5ce4208 GG |
760 | rdev = regulator_register(&pmic->desc[id], &config); |
761 | if (IS_ERR(rdev)) { | |
762 | dev_err(&pdev->dev, | |
763 | "failed to register %s regulator\n", | |
764 | pdev->name); | |
765 | ret = PTR_ERR(rdev); | |
766 | goto err_unregister_regulator; | |
767 | } | |
768 | ||
769 | /* Save regulator for cleanup */ | |
770 | pmic->rdev[id] = rdev; | |
771 | ||
772 | /* Initialise sleep/init values from platform data */ | |
a361cd9f | 773 | if (pdata) { |
e5ce4208 GG |
774 | reg_init = pdata->reg_init[id]; |
775 | if (reg_init) { | |
776 | ret = palmas_ldo_init(palmas, id, reg_init); | |
1c9d2d71 AL |
777 | if (ret) { |
778 | regulator_unregister(pmic->rdev[id]); | |
e5ce4208 | 779 | goto err_unregister_regulator; |
1c9d2d71 | 780 | } |
e5ce4208 GG |
781 | } |
782 | } | |
783 | } | |
784 | ||
785 | return 0; | |
786 | ||
787 | err_unregister_regulator: | |
788 | while (--id >= 0) | |
789 | regulator_unregister(pmic->rdev[id]); | |
e5ce4208 GG |
790 | return ret; |
791 | } | |
792 | ||
bbcf50b1 | 793 | static int palmas_regulators_remove(struct platform_device *pdev) |
e5ce4208 GG |
794 | { |
795 | struct palmas_pmic *pmic = platform_get_drvdata(pdev); | |
796 | int id; | |
797 | ||
798 | for (id = 0; id < PALMAS_NUM_REGS; id++) | |
799 | regulator_unregister(pmic->rdev[id]); | |
e5ce4208 GG |
800 | return 0; |
801 | } | |
802 | ||
3d68dfe3 | 803 | static struct of_device_id of_palmas_match_tbl[] = { |
a361cd9f | 804 | { .compatible = "ti,palmas-pmic", }, |
7be859f7 GG |
805 | { .compatible = "ti,twl6035-pmic", }, |
806 | { .compatible = "ti,twl6036-pmic", }, | |
807 | { .compatible = "ti,twl6037-pmic", }, | |
808 | { .compatible = "ti,tps65913-pmic", }, | |
809 | { .compatible = "ti,tps65914-pmic", }, | |
810 | { .compatible = "ti,tps80036-pmic", }, | |
a361cd9f GG |
811 | { /* end */ } |
812 | }; | |
813 | ||
e5ce4208 GG |
814 | static struct platform_driver palmas_driver = { |
815 | .driver = { | |
816 | .name = "palmas-pmic", | |
a361cd9f | 817 | .of_match_table = of_palmas_match_tbl, |
e5ce4208 GG |
818 | .owner = THIS_MODULE, |
819 | }, | |
bbcf50b1 LD |
820 | .probe = palmas_regulators_probe, |
821 | .remove = palmas_regulators_remove, | |
e5ce4208 GG |
822 | }; |
823 | ||
824 | static int __init palmas_init(void) | |
825 | { | |
826 | return platform_driver_register(&palmas_driver); | |
827 | } | |
828 | subsys_initcall(palmas_init); | |
829 | ||
830 | static void __exit palmas_exit(void) | |
831 | { | |
832 | platform_driver_unregister(&palmas_driver); | |
833 | } | |
834 | module_exit(palmas_exit); | |
835 | ||
836 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); | |
837 | MODULE_DESCRIPTION("Palmas voltage regulator driver"); | |
838 | MODULE_LICENSE("GPL"); | |
839 | MODULE_ALIAS("platform:palmas-pmic"); | |
a361cd9f | 840 | MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); |