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1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * mpq7920.h - Regulator definitions for mpq7920 | |
4 | * | |
5 | * Copyright 2019 Monolithic Power Systems, Inc | |
6 | * | |
7 | */ | |
8 | ||
9 | #ifndef __MPQ7920_H__ | |
10 | #define __MPQ7920_H__ | |
11 | ||
12 | #define MPQ7920_REG_CTL0 0x00 | |
13 | #define MPQ7920_REG_CTL1 0x01 | |
14 | #define MPQ7920_REG_CTL2 0x02 | |
15 | #define MPQ7920_BUCK1_REG_A 0x03 | |
16 | #define MPQ7920_BUCK1_REG_B 0x04 | |
17 | #define MPQ7920_BUCK1_REG_C 0x05 | |
18 | #define MPQ7920_BUCK1_REG_D 0x06 | |
19 | #define MPQ7920_BUCK2_REG_A 0x07 | |
20 | #define MPQ7920_BUCK2_REG_B 0x08 | |
21 | #define MPQ7920_BUCK2_REG_C 0x09 | |
22 | #define MPQ7920_BUCK2_REG_D 0x0a | |
23 | #define MPQ7920_BUCK3_REG_A 0x0b | |
24 | #define MPQ7920_BUCK3_REG_B 0x0c | |
25 | #define MPQ7920_BUCK3_REG_C 0x0d | |
26 | #define MPQ7920_BUCK3_REG_D 0x0e | |
27 | #define MPQ7920_BUCK4_REG_A 0x0f | |
28 | #define MPQ7920_BUCK4_REG_B 0x10 | |
29 | #define MPQ7920_BUCK4_REG_C 0x11 | |
30 | #define MPQ7920_BUCK4_REG_D 0x12 | |
31 | #define MPQ7920_LDO1_REG_A 0x13 | |
32 | #define MPQ7920_LDO1_REG_B 0x0 | |
33 | #define MPQ7920_LDO2_REG_A 0x14 | |
34 | #define MPQ7920_LDO2_REG_B 0x15 | |
35 | #define MPQ7920_LDO2_REG_C 0x16 | |
36 | #define MPQ7920_LDO3_REG_A 0x17 | |
37 | #define MPQ7920_LDO3_REG_B 0x18 | |
38 | #define MPQ7920_LDO3_REG_C 0x19 | |
39 | #define MPQ7920_LDO4_REG_A 0x1a | |
40 | #define MPQ7920_LDO4_REG_B 0x1b | |
41 | #define MPQ7920_LDO4_REG_C 0x1c | |
42 | #define MPQ7920_LDO5_REG_A 0x1d | |
43 | #define MPQ7920_LDO5_REG_B 0x1e | |
44 | #define MPQ7920_LDO5_REG_C 0x1f | |
45 | #define MPQ7920_REG_MODE 0x20 | |
6501c1f5 SS |
46 | #define MPQ7920_REG_REGULATOR_EN 0x22 |
47 | ||
48 | #define MPQ7920_MASK_VREF 0x7f | |
53ba2f1a | 49 | #define MPQ7920_MASK_BUCK_ILIM 0xc0 |
6501c1f5 SS |
50 | #define MPQ7920_MASK_LDO_ILIM BIT(6) |
51 | #define MPQ7920_MASK_DISCHARGE BIT(5) | |
52 | #define MPQ7920_MASK_MODE 0xc0 | |
53 | #define MPQ7920_MASK_SOFTSTART 0x0c | |
54 | #define MPQ7920_MASK_SWITCH_FREQ 0x30 | |
55 | #define MPQ7920_MASK_BUCK_PHASE_DEALY 0x30 | |
56 | #define MPQ7920_MASK_DVS_SLEWRATE 0xc0 | |
686f6361 SS |
57 | #define MPQ7920_MASK_OVP 0x40 |
58 | #define MPQ7920_OVP_DISABLE ~(0x40) | |
53ba2f1a | 59 | #define MPQ7920_DISCHARGE_ON BIT(5) |
6501c1f5 SS |
60 | |
61 | #define MPQ7920_REGULATOR_EN_OFFSET 7 | |
62 | ||
63 | /* values in mV */ | |
64 | #define MPQ7920_BUCK_VOLT_MIN 400000 | |
65 | #define MPQ7920_LDO_VOLT_MIN 650000 | |
66 | #define MPQ7920_VOLT_MAX 3587500 | |
67 | #define MPQ7920_VOLT_STEP 12500 | |
68 | ||
69 | #endif /* __MPQ7920_H__ */ |