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regulator: virtual: add devicetree support
[linux-block.git] / drivers / regulator / max8973-regulator.c
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5928f538 1/*
f1e5ecc5 2 * max8973-regulator.c -- Maxim max8973A
5928f538 3 *
f1e5ecc5 4 * Regulator driver for MAXIM 8973A DC-DC step-down switching regulator.
5928f538
LD		 5 *
6 * Copyright (c) 2012, NVIDIA Corporation.
7 *
8 * Author: Laxman Dewangan <ldewangan@nvidia.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation version 2.
13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
15 * whether express or implied; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307, USA
23 */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/err.h>
42dc3023 29#include <linux/of.h>
0f7d6ece 30#include <linux/of_device.h>
5928f538
LD		 31#include <linux/platform_device.h>
32#include <linux/regulator/driver.h>
33#include <linux/regulator/machine.h>
34#include <linux/regulator/max8973-regulator.h>
42dc3023 35#include <linux/regulator/of_regulator.h>
5928f538 36#include <linux/gpio.h>
e7d2be69 37#include <linux/gpio/consumer.h>
c2ffa973 38#include <linux/of_gpio.h>
5928f538
LD		 39#include <linux/i2c.h>
40#include <linux/slab.h>
41#include <linux/regmap.h>
d2d5437b
LD		 42#include <linux/thermal.h>
43#include <linux/irq.h>
44#include <linux/interrupt.h>
5928f538
LD		 45
46/* Register definitions */
47#define MAX8973_VOUT 0x0
48#define MAX8973_VOUT_DVS 0x1
49#define MAX8973_CONTROL1 0x2
50#define MAX8973_CONTROL2 0x3
51#define MAX8973_CHIPID1 0x4
52#define MAX8973_CHIPID2 0x5
53
54#define MAX8973_MAX_VOUT_REG 2
55
56/* MAX8973_VOUT */
57#define MAX8973_VOUT_ENABLE BIT(7)
58#define MAX8973_VOUT_MASK 0x7F
59
60/* MAX8973_VOUT_DVS */
61#define MAX8973_DVS_VOUT_MASK 0x7F
62
63/* MAX8973_CONTROL1 */
64#define MAX8973_SNS_ENABLE BIT(7)
65#define MAX8973_FPWM_EN_M BIT(6)
66#define MAX8973_NFSR_ENABLE BIT(5)
67#define MAX8973_AD_ENABLE BIT(4)
68#define MAX8973_BIAS_ENABLE BIT(3)
69#define MAX8973_FREQSHIFT_9PER BIT(2)
70
71#define MAX8973_RAMP_12mV_PER_US 0x0
72#define MAX8973_RAMP_25mV_PER_US 0x1
73#define MAX8973_RAMP_50mV_PER_US 0x2
74#define MAX8973_RAMP_200mV_PER_US 0x3
3064c1f3 75#define MAX8973_RAMP_MASK 0x3
5928f538
LD		 76
77/* MAX8973_CONTROL2 */
78#define MAX8973_WDTMR_ENABLE BIT(6)
79#define MAX8973_DISCH_ENBABLE BIT(5)
80#define MAX8973_FT_ENABLE BIT(4)
d2d5437b 81#define MAX77621_T_JUNCTION_120 BIT(7)
5928f538 82
ffaab991 83#define MAX8973_CKKADV_TRIP_MASK 0xC
5928f538
LD		 84#define MAX8973_CKKADV_TRIP_DISABLE 0xC
85#define MAX8973_CKKADV_TRIP_75mV_PER_US 0x0
86#define MAX8973_CKKADV_TRIP_150mV_PER_US 0x4
87#define MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8
88#define MAX8973_CONTROL_CLKADV_TRIP_MASK 0x00030000
89
90#define MAX8973_INDUCTOR_MIN_30_PER 0x0
91#define MAX8973_INDUCTOR_NOMINAL 0x1
92#define MAX8973_INDUCTOR_PLUS_30_PER 0x2
93#define MAX8973_INDUCTOR_PLUS_60_PER 0x3
94#define MAX8973_CONTROL_INDUCTOR_VALUE_MASK 0x00300000
95
96#define MAX8973_MIN_VOLATGE 606250
97#define MAX8973_MAX_VOLATGE 1400000
98#define MAX8973_VOLATGE_STEP 6250
99#define MAX8973_BUCK_N_VOLTAGE 0x80
100
d2d5437b
LD		 101#define MAX77621_CHIPID_TJINT_S BIT(0)
102
103#define MAX77621_NORMAL_OPERATING_TEMP 100000
104#define MAX77621_TJINT_WARNING_TEMP_120 120000
105#define MAX77621_TJINT_WARNING_TEMP_140 140000
106
0f7d6ece
LD		 107enum device_id {
108 MAX8973,
109 MAX77621
110};
111
5928f538
LD		 112/* Maxim 8973 chip information */
113struct max8973_chip {
114 struct device *dev;
115 struct regulator_desc desc;
5928f538
LD		 116 struct regmap *regmap;
117 bool enable_external_control;
118 int dvs_gpio;
119 int lru_index[MAX8973_MAX_VOUT_REG];
120 int curr_vout_val[MAX8973_MAX_VOUT_REG];
121 int curr_vout_reg;
122 int curr_gpio_val;
db892ff6 123 struct regulator_ops ops;
0f7d6ece 124 enum device_id id;
d2d5437b
LD		 125 int junction_temp_warning;
126 int irq;
127 struct thermal_zone_device *tz_device;
5928f538
LD		 128};
129
130/*
131 * find_voltage_set_register: Find new voltage configuration register (VOUT).
132 * The finding of the new VOUT register will be based on the LRU mechanism.
133 * Each VOUT register will have different voltage configured . This
134 * Function will look if any of the VOUT register have requested voltage set
135 * or not.
136 * - If it is already there then it will make that register as most
137 * recently used and return as found so that caller need not to set
138 * the VOUT register but need to set the proper gpios to select this
139 * VOUT register.
140 * - If requested voltage is not found then it will use the least
141 * recently mechanism to get new VOUT register for new configuration
142 * and will return not_found so that caller need to set new VOUT
143 * register and then gpios (both).
144 */
145static bool find_voltage_set_register(struct max8973_chip *tps,
146 int req_vsel, int *vout_reg, int *gpio_val)
147{
148 int i;
149 bool found = false;
150 int new_vout_reg = tps->lru_index[MAX8973_MAX_VOUT_REG - 1];
151 int found_index = MAX8973_MAX_VOUT_REG - 1;
152
153 for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i) {
154 if (tps->curr_vout_val[tps->lru_index[i]] == req_vsel) {
155 new_vout_reg = tps->lru_index[i];
156 found_index = i;
157 found = true;
158 goto update_lru_index;
159 }
160 }
161
162update_lru_index:
163 for (i = found_index; i > 0; i--)
164 tps->lru_index[i] = tps->lru_index[i - 1];
165
166 tps->lru_index[0] = new_vout_reg;
167 *gpio_val = new_vout_reg;
168 *vout_reg = MAX8973_VOUT + new_vout_reg;
169 return found;
170}
171
172static int max8973_dcdc_get_voltage_sel(struct regulator_dev *rdev)
173{
174 struct max8973_chip *max = rdev_get_drvdata(rdev);
175 unsigned int data;
176 int ret;
177
178 ret = regmap_read(max->regmap, max->curr_vout_reg, &data);
179 if (ret < 0) {
180 dev_err(max->dev, "register %d read failed, err = %d\n",
181 max->curr_vout_reg, ret);
182 return ret;
183 }
184 return data & MAX8973_VOUT_MASK;
185}
186
187static int max8973_dcdc_set_voltage_sel(struct regulator_dev *rdev,
188 unsigned vsel)
189{
190 struct max8973_chip *max = rdev_get_drvdata(rdev);
191 int ret;
192 bool found = false;
193 int vout_reg = max->curr_vout_reg;
194 int gpio_val = max->curr_gpio_val;
195
196 /*
197 * If gpios are available to select the VOUT register then least
198 * recently used register for new configuration.
199 */
fa5f509f 200 if (gpio_is_valid(max->dvs_gpio))
5928f538
LD		 201 found = find_voltage_set_register(max, vsel,
202 &vout_reg, &gpio_val);
203
204 if (!found) {
205 ret = regmap_update_bits(max->regmap, vout_reg,
206 MAX8973_VOUT_MASK, vsel);
207 if (ret < 0) {
208 dev_err(max->dev, "register %d update failed, err %d\n",
209 vout_reg, ret);
210 return ret;
211 }
212 max->curr_vout_reg = vout_reg;
213 max->curr_vout_val[gpio_val] = vsel;
214 }
215
216 /* Select proper VOUT register vio gpios */
fa5f509f 217 if (gpio_is_valid(max->dvs_gpio)) {
5928f538
LD		 218 gpio_set_value_cansleep(max->dvs_gpio, gpio_val & 0x1);
219 max->curr_gpio_val = gpio_val;
220 }
221 return 0;
222}
223
224static int max8973_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
225{
226 struct max8973_chip *max = rdev_get_drvdata(rdev);
227 int ret;
228 int pwm;
229
230 /* Enable force PWM mode in FAST mode only. */
231 switch (mode) {
232 case REGULATOR_MODE_FAST:
233 pwm = MAX8973_FPWM_EN_M;
234 break;
235
236 case REGULATOR_MODE_NORMAL:
237 pwm = 0;
238 break;
239
240 default:
241 return -EINVAL;
242 }
243
244 ret = regmap_update_bits(max->regmap, MAX8973_CONTROL1,
245 MAX8973_FPWM_EN_M, pwm);
246 if (ret < 0)
247 dev_err(max->dev, "register %d update failed, err %d\n",
248 MAX8973_CONTROL1, ret);
249 return ret;
250}
251
252static unsigned int max8973_dcdc_get_mode(struct regulator_dev *rdev)
253{
254 struct max8973_chip *max = rdev_get_drvdata(rdev);
255 unsigned int data;
256 int ret;
257
258 ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data);
259 if (ret < 0) {
260 dev_err(max->dev, "register %d read failed, err %d\n",
261 MAX8973_CONTROL1, ret);
262 return ret;
263 }
264 return (data & MAX8973_FPWM_EN_M) ?
265 REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
266}
267
ffaab991
LD		 268static int max8973_set_current_limit(struct regulator_dev *rdev,
269 int min_ua, int max_ua)
270{
271 struct max8973_chip *max = rdev_get_drvdata(rdev);
272 unsigned int val;
273 int ret;
274
275 if (max_ua <= 9000000)
276 val = MAX8973_CKKADV_TRIP_75mV_PER_US;
277 else if (max_ua <= 12000000)
278 val = MAX8973_CKKADV_TRIP_150mV_PER_US;
279 else
280 val = MAX8973_CKKADV_TRIP_DISABLE;
281
282 ret = regmap_update_bits(max->regmap, MAX8973_CONTROL2,
283 MAX8973_CKKADV_TRIP_MASK, val);
284 if (ret < 0) {
285 dev_err(max->dev, "register %d update failed: %d\n",
286 MAX8973_CONTROL2, ret);
287 return ret;
288 }
289 return 0;
290}
291
292static int max8973_get_current_limit(struct regulator_dev *rdev)
293{
294 struct max8973_chip *max = rdev_get_drvdata(rdev);
295 unsigned int control2;
296 int ret;
297
298 ret = regmap_read(max->regmap, MAX8973_CONTROL2, &control2);
299 if (ret < 0) {
300 dev_err(max->dev, "register %d read failed: %d\n",
301 MAX8973_CONTROL2, ret);
302 return ret;
303 }
304 switch (control2 & MAX8973_CKKADV_TRIP_MASK) {
305 case MAX8973_CKKADV_TRIP_DISABLE:
306 return 15000000;
307 case MAX8973_CKKADV_TRIP_150mV_PER_US:
308 return 12000000;
309 case MAX8973_CKKADV_TRIP_75mV_PER_US:
310 return 9000000;
311 default:
312 break;
313 }
314 return 9000000;
315}
316
8590ccd4
AL		 317static const unsigned int max8973_buck_ramp_table[] = {
318 12000, 25000, 50000, 200000
319};
320
db892ff6 321static const struct regulator_ops max8973_dcdc_ops = {
5928f538
LD		 322 .get_voltage_sel = max8973_dcdc_get_voltage_sel,
323 .set_voltage_sel = max8973_dcdc_set_voltage_sel,
324 .list_voltage = regulator_list_voltage_linear,
325 .set_mode = max8973_dcdc_set_mode,
326 .get_mode = max8973_dcdc_get_mode,
3064c1f3 327 .set_voltage_time_sel = regulator_set_voltage_time_sel,
8590ccd4 328 .set_ramp_delay = regulator_set_ramp_delay_regmap,
5928f538
LD		 329};
330
3d68dfe3
GKH		 331static int max8973_init_dcdc(struct max8973_chip *max,
332 struct max8973_regulator_platform_data *pdata)
5928f538
LD		 333{
334 int ret;
335 uint8_t control1 = 0;
336 uint8_t control2 = 0;
3064c1f3
LD		 337 unsigned int data;
338
339 ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data);
340 if (ret < 0) {
341 dev_err(max->dev, "register %d read failed, err = %d",
342 MAX8973_CONTROL1, ret);
343 return ret;
344 }
345 control1 = data & MAX8973_RAMP_MASK;
346 switch (control1) {
347 case MAX8973_RAMP_12mV_PER_US:
348 max->desc.ramp_delay = 12000;
349 break;
350 case MAX8973_RAMP_25mV_PER_US:
366604ec 351 max->desc.ramp_delay = 25000;
3064c1f3
LD		 352 break;
353 case MAX8973_RAMP_50mV_PER_US:
354 max->desc.ramp_delay = 50000;
355 break;
356 case MAX8973_RAMP_200mV_PER_US:
357 max->desc.ramp_delay = 200000;
358 break;
359 }
5928f538
LD		 360
361 if (pdata->control_flags & MAX8973_CONTROL_REMOTE_SENSE_ENABLE)
362 control1 |= MAX8973_SNS_ENABLE;
363
364 if (!(pdata->control_flags & MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE))
365 control1 |= MAX8973_NFSR_ENABLE;
366
367 if (pdata->control_flags & MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE)
368 control1 |= MAX8973_AD_ENABLE;
369
dcd9ec6a 370 if (pdata->control_flags & MAX8973_CONTROL_BIAS_ENABLE) {
5928f538 371 control1 |= MAX8973_BIAS_ENABLE;
dcd9ec6a
LD		 372 max->desc.enable_time = 20;
373 } else {
374 max->desc.enable_time = 240;
375 }
5928f538
LD		 376
377 if (pdata->control_flags & MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE)
378 control1 |= MAX8973_FREQSHIFT_9PER;
379
d2d5437b
LD		 380 if ((pdata->junction_temp_warning == MAX77621_TJINT_WARNING_TEMP_120) &&
381 (max->id == MAX77621))
382 control2 |= MAX77621_T_JUNCTION_120;
383
5928f538
LD		 384 if (!(pdata->control_flags & MAX8973_CONTROL_PULL_DOWN_ENABLE))
385 control2 |= MAX8973_DISCH_ENBABLE;
386
387 /* Clock advance trip configuration */
388 switch (pdata->control_flags & MAX8973_CONTROL_CLKADV_TRIP_MASK) {
389 case MAX8973_CONTROL_CLKADV_TRIP_DISABLED:
390 control2 |= MAX8973_CKKADV_TRIP_DISABLE;
391 break;
392
393 case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US:
394 control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US;
395 break;
396
397 case MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US:
398 control2 |= MAX8973_CKKADV_TRIP_150mV_PER_US;
399 break;
400
401 case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US_HIST_DIS:
402 control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS;
403 break;
404 }
405
406 /* Configure inductor value */
407 switch (pdata->control_flags & MAX8973_CONTROL_INDUCTOR_VALUE_MASK) {
408 case MAX8973_CONTROL_INDUCTOR_VALUE_NOMINAL:
409 control2 |= MAX8973_INDUCTOR_NOMINAL;
410 break;
411
412 case MAX8973_CONTROL_INDUCTOR_VALUE_MINUS_30_PER:
413 control2 |= MAX8973_INDUCTOR_MIN_30_PER;
414 break;
415
416 case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_30_PER:
417 control2 |= MAX8973_INDUCTOR_PLUS_30_PER;
418 break;
419
420 case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_60_PER:
421 control2 |= MAX8973_INDUCTOR_PLUS_60_PER;
422 break;
423 }
424
425 ret = regmap_write(max->regmap, MAX8973_CONTROL1, control1);
426 if (ret < 0) {
427 dev_err(max->dev, "register %d write failed, err = %d",
428 MAX8973_CONTROL1, ret);
429 return ret;
430 }
431
432 ret = regmap_write(max->regmap, MAX8973_CONTROL2, control2);
433 if (ret < 0) {
434 dev_err(max->dev, "register %d write failed, err = %d",
435 MAX8973_CONTROL2, ret);
436 return ret;
437 }
438
439 /* If external control is enabled then disable EN bit */
0f7d6ece 440 if (max->enable_external_control && (max->id == MAX8973)) {
5928f538
LD		 441 ret = regmap_update_bits(max->regmap, MAX8973_VOUT,
442 MAX8973_VOUT_ENABLE, 0);
443 if (ret < 0)
444 dev_err(max->dev, "register %d update failed, err = %d",
445 MAX8973_VOUT, ret);
446 }
447 return ret;
448}
449
d2d5437b
LD		 450static int max8973_thermal_read_temp(void *data, int *temp)
451{
452 struct max8973_chip *mchip = data;
453 unsigned int val;
454 int ret;
455
456 ret = regmap_read(mchip->regmap, MAX8973_CHIPID1, &val);
457 if (ret < 0) {
458 dev_err(mchip->dev, "Failed to read register CHIPID1, %d", ret);
459 return ret;
460 }
461
462 /* +1 degC to trigger cool devive */
463 if (val & MAX77621_CHIPID_TJINT_S)
464 *temp = mchip->junction_temp_warning + 1000;
465 else
466 *temp = MAX77621_NORMAL_OPERATING_TEMP;
467
468 return 0;
469}
470
471static irqreturn_t max8973_thermal_irq(int irq, void *data)
472{
473 struct max8973_chip *mchip = data;
474
0e70f466
SP		 475 thermal_zone_device_update(mchip->tz_device,
476 THERMAL_EVENT_UNSPECIFIED);
d2d5437b
LD		 477
478 return IRQ_HANDLED;
479}
480
481static const struct thermal_zone_of_device_ops max77621_tz_ops = {
482 .get_temp = max8973_thermal_read_temp,
483};
484
485static int max8973_thermal_init(struct max8973_chip *mchip)
486{
487 struct thermal_zone_device *tzd;
488 struct irq_data *irq_data;
489 unsigned long irq_flags = 0;
490 int ret;
491
492 if (mchip->id != MAX77621)
493 return 0;
494
495 tzd = devm_thermal_zone_of_sensor_register(mchip->dev, 0, mchip,
496 &max77621_tz_ops);
497 if (IS_ERR(tzd)) {
498 ret = PTR_ERR(tzd);
499 dev_err(mchip->dev, "Failed to register thermal sensor: %d\n",
500 ret);
501 return ret;
502 }
503
504 if (mchip->irq <= 0)
505 return 0;
506
507 irq_data = irq_get_irq_data(mchip->irq);
508 if (irq_data)
509 irq_flags = irqd_get_trigger_type(irq_data);
510
511 ret = devm_request_threaded_irq(mchip->dev, mchip->irq, NULL,
512 max8973_thermal_irq,
513 IRQF_ONESHOT | IRQF_SHARED | irq_flags,
514 dev_name(mchip->dev), mchip);
515 if (ret < 0) {
516 dev_err(mchip->dev, "Failed to request irq %d, %d\n",
517 mchip->irq, ret);
518 return ret;
519 }
520
521 return 0;
522}
523
5928f538
LD		 524static const struct regmap_config max8973_regmap_config = {
525 .reg_bits = 8,
526 .val_bits = 8,
527 .max_register = MAX8973_CHIPID2,
528 .cache_type = REGCACHE_RBTREE,
529};
530
c2ffa973
LD		 531static struct max8973_regulator_platform_data *max8973_parse_dt(
532 struct device *dev)
533{
534 struct max8973_regulator_platform_data *pdata;
535 struct device_node *np = dev->of_node;
536 int ret;
537 u32 pval;
3692db3a
LD		 538 bool etr_enable;
539 bool etr_sensitivity_high;
c2ffa973
LD		 540
541 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
542 if (!pdata)
543 return NULL;
544
545 pdata->enable_ext_control = of_property_read_bool(np,
546 "maxim,externally-enable");
547 pdata->dvs_gpio = of_get_named_gpio(np, "maxim,dvs-gpio", 0);
548
549 ret = of_property_read_u32(np, "maxim,dvs-default-state", &pval);
550 if (!ret)
551 pdata->dvs_def_state = pval;
552
553 if (of_property_read_bool(np, "maxim,enable-remote-sense"))
554 pdata->control_flags |= MAX8973_CONTROL_REMOTE_SENSE_ENABLE;
555
556 if (of_property_read_bool(np, "maxim,enable-falling-slew-rate"))
557 pdata->control_flags |=
558 MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE;
559
560 if (of_property_read_bool(np, "maxim,enable-active-discharge"))
561 pdata->control_flags |=
562 MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE;
563
564 if (of_property_read_bool(np, "maxim,enable-frequency-shift"))
565 pdata->control_flags |= MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE;
566
567 if (of_property_read_bool(np, "maxim,enable-bias-control"))
127e1062 568 pdata->control_flags |= MAX8973_CONTROL_BIAS_ENABLE;
c2ffa973 569
3692db3a
LD		 570 etr_enable = of_property_read_bool(np, "maxim,enable-etr");
571 etr_sensitivity_high = of_property_read_bool(np,
572 "maxim,enable-high-etr-sensitivity");
573 if (etr_sensitivity_high)
574 etr_enable = true;
575
576 if (etr_enable) {
577 if (etr_sensitivity_high)
578 pdata->control_flags |=
579 MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US;
580 else
581 pdata->control_flags |=
582 MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US;
583 } else {
584 pdata->control_flags |= MAX8973_CONTROL_CLKADV_TRIP_DISABLED;
585 }
586
d2d5437b
LD		 587 pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_140;
588 ret = of_property_read_u32(np, "junction-warn-millicelsius", &pval);
589 if (!ret && (pval <= MAX77621_TJINT_WARNING_TEMP_120))
590 pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_120;
591
c2ffa973
LD		 592 return pdata;
593}
594
0f7d6ece
LD		 595static const struct of_device_id of_max8973_match_tbl[] = {
596 { .compatible = "maxim,max8973", .data = (void *)MAX8973, },
597 { .compatible = "maxim,max77621", .data = (void *)MAX77621, },
598 { },
599};
600MODULE_DEVICE_TABLE(of, of_max8973_match_tbl);
601
3d68dfe3
GKH		 602static int max8973_probe(struct i2c_client *client,
603 const struct i2c_device_id *id)
5928f538
LD		 604{
605 struct max8973_regulator_platform_data *pdata;
69eb0980 606 struct regulator_init_data *ridata;
5928f538
LD		 607 struct regulator_config config = { };
608 struct regulator_dev *rdev;
609 struct max8973_chip *max;
c2ffa973 610 bool pdata_from_dt = false;
0f7d6ece 611 unsigned int chip_id;
e7d2be69
LW		 612 struct gpio_desc *gpiod;
613 enum gpiod_flags gflags;
5928f538
LD		 614 int ret;
615
dff91d0b 616 pdata = dev_get_platdata(&client->dev);
42dc3023 617
c2ffa973
LD		 618 if (!pdata && client->dev.of_node) {
619 pdata = max8973_parse_dt(&client->dev);
620 pdata_from_dt = true;
621 }
622
623 if (!pdata) {
5928f538
LD		 624 dev_err(&client->dev, "No Platform data");
625 return -EIO;
626 }
627
e7d2be69 628 if (pdata->dvs_gpio == -EPROBE_DEFER)
c2ffa973
LD		 629 return -EPROBE_DEFER;
630
5928f538 631 max = devm_kzalloc(&client->dev, sizeof(*max), GFP_KERNEL);
21024dee 632 if (!max)
5928f538 633 return -ENOMEM;
5928f538
LD		 634
635 max->regmap = devm_regmap_init_i2c(client, &max8973_regmap_config);
636 if (IS_ERR(max->regmap)) {
637 ret = PTR_ERR(max->regmap);
638 dev_err(&client->dev, "regmap init failed, err %d\n", ret);
639 return ret;
640 }
641
0f7d6ece
LD		 642 if (client->dev.of_node) {
643 const struct of_device_id *match;
644
645 match = of_match_device(of_match_ptr(of_max8973_match_tbl),
646 &client->dev);
647 if (!match)
648 return -ENODATA;
649 max->id = (u32)((uintptr_t)match->data);
650 } else {
651 max->id = id->driver_data;
652 }
653
654 ret = regmap_read(max->regmap, MAX8973_CHIPID1, &chip_id);
655 if (ret < 0) {
656 dev_err(&client->dev, "register CHIPID1 read failed, %d", ret);
657 return ret;
658 }
659
660 dev_info(&client->dev, "CHIP-ID OTP: 0x%02x ID_M: 0x%02x\n",
661 (chip_id >> 4) & 0xF, (chip_id >> 1) & 0x7);
662
5928f538 663 i2c_set_clientdata(client, max);
db892ff6 664 max->ops = max8973_dcdc_ops;
5928f538
LD		 665 max->dev = &client->dev;
666 max->desc.name = id->name;
667 max->desc.id = 0;
db892ff6 668 max->desc.ops = &max->ops;
5928f538
LD		 669 max->desc.type = REGULATOR_VOLTAGE;
670 max->desc.owner = THIS_MODULE;
671 max->desc.min_uV = MAX8973_MIN_VOLATGE;
672 max->desc.uV_step = MAX8973_VOLATGE_STEP;
673 max->desc.n_voltages = MAX8973_BUCK_N_VOLTAGE;
8590ccd4
AL		 674 max->desc.ramp_reg = MAX8973_CONTROL1;
675 max->desc.ramp_mask = MAX8973_RAMP_MASK;
676 max->desc.ramp_delay_table = max8973_buck_ramp_table;
677 max->desc.n_ramp_values = ARRAY_SIZE(max8973_buck_ramp_table);
5928f538 678
69eb0980 679 max->dvs_gpio = (pdata->dvs_gpio) ? pdata->dvs_gpio : -EINVAL;
69eb0980
LD		 680 max->enable_external_control = pdata->enable_ext_control;
681 max->curr_gpio_val = pdata->dvs_def_state;
682 max->curr_vout_reg = MAX8973_VOUT + pdata->dvs_def_state;
d2d5437b 683 max->junction_temp_warning = pdata->junction_temp_warning;
69eb0980 684
5928f538 685 max->lru_index[0] = max->curr_vout_reg;
5928f538
LD		 686
687 if (gpio_is_valid(max->dvs_gpio)) {
688 int gpio_flags;
689 int i;
690
691 gpio_flags = (pdata->dvs_def_state) ?
692 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
693 ret = devm_gpio_request_one(&client->dev, max->dvs_gpio,
694 gpio_flags, "max8973-dvs");
695 if (ret) {
696 dev_err(&client->dev,
697 "gpio_request for gpio %d failed, err = %d\n",
698 max->dvs_gpio, ret);
699 return ret;
700 }
5928f538
LD		 701
702 /*
703 * Initialize the lru index with vout_reg id
704 * The index 0 will be most recently used and
705 * set with the max->curr_vout_reg */
706 for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i)
707 max->lru_index[i] = i;
708 max->lru_index[0] = max->curr_vout_reg;
709 max->lru_index[max->curr_vout_reg] = 0;
b10c7f3c
MP		 710 } else {
711 /*
712 * If there is no DVS GPIO, the VOUT register
713 * address is fixed.
714 */
715 max->ops.set_voltage_sel = regulator_set_voltage_sel_regmap;
716 max->ops.get_voltage_sel = regulator_get_voltage_sel_regmap;
717 max->desc.vsel_reg = max->curr_vout_reg;
718 max->desc.vsel_mask = MAX8973_VOUT_MASK;
5928f538
LD		 719 }
720
c2ffa973
LD		 721 if (pdata_from_dt)
722 pdata->reg_init_data = of_get_regulator_init_data(&client->dev,
723 client->dev.of_node, &max->desc);
724
0f7d6ece
LD		 725 ridata = pdata->reg_init_data;
726 switch (max->id) {
727 case MAX8973:
728 if (!pdata->enable_ext_control) {
729 max->desc.enable_reg = MAX8973_VOUT;
730 max->desc.enable_mask = MAX8973_VOUT_ENABLE;
731 max->ops.enable = regulator_enable_regmap;
732 max->ops.disable = regulator_disable_regmap;
733 max->ops.is_enabled = regulator_is_enabled_regmap;
734 break;
735 }
736
e7d2be69
LW		 737 if (ridata && (ridata->constraints.always_on ||
738 ridata->constraints.boot_on))
739 gflags = GPIOD_OUT_HIGH;
740 else
741 gflags = GPIOD_OUT_LOW;
63239e4b 742 gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE;
e7d2be69
LW		 743 gpiod = devm_gpiod_get_optional(&client->dev,
744 "maxim,enable",
745 gflags);
746 if (IS_ERR(gpiod))
747 return PTR_ERR(gpiod);
748 if (gpiod) {
749 config.ena_gpiod = gpiod;
750 max->enable_external_control = true;
0f7d6ece 751 }
e7d2be69 752
0f7d6ece
LD		 753 break;
754
755 case MAX77621:
e7d2be69
LW		 756 /*
757 * We do not let the core switch this regulator on/off,
758 * we just leave it on.
759 */
760 gpiod = devm_gpiod_get_optional(&client->dev,
761 "maxim,enable",
762 GPIOD_OUT_HIGH);
763 if (IS_ERR(gpiod))
764 return PTR_ERR(gpiod);
765 if (gpiod)
766 max->enable_external_control = true;
0f7d6ece
LD		 767
768 max->desc.enable_reg = MAX8973_VOUT;
769 max->desc.enable_mask = MAX8973_VOUT_ENABLE;
770 max->ops.enable = regulator_enable_regmap;
771 max->ops.disable = regulator_disable_regmap;
772 max->ops.is_enabled = regulator_is_enabled_regmap;
ffaab991
LD		 773 max->ops.set_current_limit = max8973_set_current_limit;
774 max->ops.get_current_limit = max8973_get_current_limit;
0f7d6ece
LD		 775 break;
776 default:
777 break;
778 }
779
c2ffa973
LD		 780 ret = max8973_init_dcdc(max, pdata);
781 if (ret < 0) {
782 dev_err(max->dev, "Max8973 Init failed, err = %d\n", ret);
783 return ret;
5928f538
LD		 784 }
785
786 config.dev = &client->dev;
c2ffa973 787 config.init_data = pdata->reg_init_data;
5928f538
LD		 788 config.driver_data = max;
789 config.of_node = client->dev.of_node;
790 config.regmap = max->regmap;
791
48bd226f
LW		 792 /*
793 * Register the regulators
794 * Turn the GPIO descriptor over to the regulator core for
795 * lifecycle management if we pass an ena_gpiod.
796 */
797 if (config.ena_gpiod)
798 devm_gpiod_unhinge(&client->dev, config.ena_gpiod);
8d581fd0 799 rdev = devm_regulator_register(&client->dev, &max->desc, &config);
5928f538
LD		 800 if (IS_ERR(rdev)) {
801 ret = PTR_ERR(rdev);
802 dev_err(max->dev, "regulator register failed, err %d\n", ret);
803 return ret;
804 }
805
d2d5437b 806 max8973_thermal_init(max);
5928f538
LD		 807 return 0;
808}
809
5928f538 810static const struct i2c_device_id max8973_id[] = {
0f7d6ece
LD		 811 {.name = "max8973", .driver_data = MAX8973},
812 {.name = "max77621", .driver_data = MAX77621},
5928f538
LD		 813 {},
814};
5928f538
LD		 815MODULE_DEVICE_TABLE(i2c, max8973_id);
816
817static struct i2c_driver max8973_i2c_driver = {
818 .driver = {
819 .name = "max8973",
0f7d6ece 820 .of_match_table = of_max8973_match_tbl,
5928f538
LD		 821 },
822 .probe = max8973_probe,
5928f538
LD		 823 .id_table = max8973_id,
824};
825
826static int __init max8973_init(void)
827{
828 return i2c_add_driver(&max8973_i2c_driver);
829}
830subsys_initcall(max8973_init);
831
832static void __exit max8973_cleanup(void)
833{
834 i2c_del_driver(&max8973_i2c_driver);
835}
836module_exit(max8973_cleanup);
837
838MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
839MODULE_DESCRIPTION("MAX8973 voltage regulator driver");
840MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)