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e634cf4e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
5928f538 | 2 | /* |
f1e5ecc5 | 3 | * max8973-regulator.c -- Maxim max8973A |
5928f538 | 4 | * |
f1e5ecc5 | 5 | * Regulator driver for MAXIM 8973A DC-DC step-down switching regulator. |
5928f538 LD |
6 | * |
7 | * Copyright (c) 2012, NVIDIA Corporation. | |
8 | * | |
9 | * Author: Laxman Dewangan <ldewangan@nvidia.com> | |
5928f538 LD |
10 | */ |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/err.h> | |
42dc3023 | 16 | #include <linux/of.h> |
0f7d6ece | 17 | #include <linux/of_device.h> |
5928f538 LD |
18 | #include <linux/platform_device.h> |
19 | #include <linux/regulator/driver.h> | |
20 | #include <linux/regulator/machine.h> | |
21 | #include <linux/regulator/max8973-regulator.h> | |
42dc3023 | 22 | #include <linux/regulator/of_regulator.h> |
e7d2be69 | 23 | #include <linux/gpio/consumer.h> |
5928f538 LD |
24 | #include <linux/i2c.h> |
25 | #include <linux/slab.h> | |
26 | #include <linux/regmap.h> | |
d2d5437b LD |
27 | #include <linux/thermal.h> |
28 | #include <linux/irq.h> | |
29 | #include <linux/interrupt.h> | |
5928f538 LD |
30 | |
31 | /* Register definitions */ | |
32 | #define MAX8973_VOUT 0x0 | |
33 | #define MAX8973_VOUT_DVS 0x1 | |
34 | #define MAX8973_CONTROL1 0x2 | |
35 | #define MAX8973_CONTROL2 0x3 | |
36 | #define MAX8973_CHIPID1 0x4 | |
37 | #define MAX8973_CHIPID2 0x5 | |
38 | ||
39 | #define MAX8973_MAX_VOUT_REG 2 | |
40 | ||
41 | /* MAX8973_VOUT */ | |
42 | #define MAX8973_VOUT_ENABLE BIT(7) | |
43 | #define MAX8973_VOUT_MASK 0x7F | |
44 | ||
45 | /* MAX8973_VOUT_DVS */ | |
46 | #define MAX8973_DVS_VOUT_MASK 0x7F | |
47 | ||
48 | /* MAX8973_CONTROL1 */ | |
49 | #define MAX8973_SNS_ENABLE BIT(7) | |
50 | #define MAX8973_FPWM_EN_M BIT(6) | |
51 | #define MAX8973_NFSR_ENABLE BIT(5) | |
52 | #define MAX8973_AD_ENABLE BIT(4) | |
53 | #define MAX8973_BIAS_ENABLE BIT(3) | |
54 | #define MAX8973_FREQSHIFT_9PER BIT(2) | |
55 | ||
56 | #define MAX8973_RAMP_12mV_PER_US 0x0 | |
57 | #define MAX8973_RAMP_25mV_PER_US 0x1 | |
58 | #define MAX8973_RAMP_50mV_PER_US 0x2 | |
59 | #define MAX8973_RAMP_200mV_PER_US 0x3 | |
3064c1f3 | 60 | #define MAX8973_RAMP_MASK 0x3 |
5928f538 LD |
61 | |
62 | /* MAX8973_CONTROL2 */ | |
63 | #define MAX8973_WDTMR_ENABLE BIT(6) | |
64 | #define MAX8973_DISCH_ENBABLE BIT(5) | |
65 | #define MAX8973_FT_ENABLE BIT(4) | |
d2d5437b | 66 | #define MAX77621_T_JUNCTION_120 BIT(7) |
5928f538 | 67 | |
ffaab991 | 68 | #define MAX8973_CKKADV_TRIP_MASK 0xC |
5928f538 LD |
69 | #define MAX8973_CKKADV_TRIP_DISABLE 0xC |
70 | #define MAX8973_CKKADV_TRIP_75mV_PER_US 0x0 | |
71 | #define MAX8973_CKKADV_TRIP_150mV_PER_US 0x4 | |
72 | #define MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8 | |
73 | #define MAX8973_CONTROL_CLKADV_TRIP_MASK 0x00030000 | |
74 | ||
75 | #define MAX8973_INDUCTOR_MIN_30_PER 0x0 | |
76 | #define MAX8973_INDUCTOR_NOMINAL 0x1 | |
77 | #define MAX8973_INDUCTOR_PLUS_30_PER 0x2 | |
78 | #define MAX8973_INDUCTOR_PLUS_60_PER 0x3 | |
79 | #define MAX8973_CONTROL_INDUCTOR_VALUE_MASK 0x00300000 | |
80 | ||
81 | #define MAX8973_MIN_VOLATGE 606250 | |
82 | #define MAX8973_MAX_VOLATGE 1400000 | |
83 | #define MAX8973_VOLATGE_STEP 6250 | |
84 | #define MAX8973_BUCK_N_VOLTAGE 0x80 | |
85 | ||
d2d5437b LD |
86 | #define MAX77621_CHIPID_TJINT_S BIT(0) |
87 | ||
88 | #define MAX77621_NORMAL_OPERATING_TEMP 100000 | |
89 | #define MAX77621_TJINT_WARNING_TEMP_120 120000 | |
90 | #define MAX77621_TJINT_WARNING_TEMP_140 140000 | |
91 | ||
0f7d6ece LD |
92 | enum device_id { |
93 | MAX8973, | |
94 | MAX77621 | |
95 | }; | |
96 | ||
5928f538 LD |
97 | /* Maxim 8973 chip information */ |
98 | struct max8973_chip { | |
99 | struct device *dev; | |
100 | struct regulator_desc desc; | |
5928f538 LD |
101 | struct regmap *regmap; |
102 | bool enable_external_control; | |
4d52f575 | 103 | struct gpio_desc *dvs_gpiod; |
5928f538 LD |
104 | int lru_index[MAX8973_MAX_VOUT_REG]; |
105 | int curr_vout_val[MAX8973_MAX_VOUT_REG]; | |
106 | int curr_vout_reg; | |
107 | int curr_gpio_val; | |
db892ff6 | 108 | struct regulator_ops ops; |
0f7d6ece | 109 | enum device_id id; |
d2d5437b LD |
110 | int junction_temp_warning; |
111 | int irq; | |
112 | struct thermal_zone_device *tz_device; | |
5928f538 LD |
113 | }; |
114 | ||
115 | /* | |
116 | * find_voltage_set_register: Find new voltage configuration register (VOUT). | |
117 | * The finding of the new VOUT register will be based on the LRU mechanism. | |
118 | * Each VOUT register will have different voltage configured . This | |
119 | * Function will look if any of the VOUT register have requested voltage set | |
120 | * or not. | |
121 | * - If it is already there then it will make that register as most | |
122 | * recently used and return as found so that caller need not to set | |
123 | * the VOUT register but need to set the proper gpios to select this | |
124 | * VOUT register. | |
125 | * - If requested voltage is not found then it will use the least | |
126 | * recently mechanism to get new VOUT register for new configuration | |
127 | * and will return not_found so that caller need to set new VOUT | |
128 | * register and then gpios (both). | |
129 | */ | |
130 | static bool find_voltage_set_register(struct max8973_chip *tps, | |
131 | int req_vsel, int *vout_reg, int *gpio_val) | |
132 | { | |
133 | int i; | |
134 | bool found = false; | |
135 | int new_vout_reg = tps->lru_index[MAX8973_MAX_VOUT_REG - 1]; | |
136 | int found_index = MAX8973_MAX_VOUT_REG - 1; | |
137 | ||
138 | for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i) { | |
139 | if (tps->curr_vout_val[tps->lru_index[i]] == req_vsel) { | |
140 | new_vout_reg = tps->lru_index[i]; | |
141 | found_index = i; | |
142 | found = true; | |
143 | goto update_lru_index; | |
144 | } | |
145 | } | |
146 | ||
147 | update_lru_index: | |
148 | for (i = found_index; i > 0; i--) | |
149 | tps->lru_index[i] = tps->lru_index[i - 1]; | |
150 | ||
151 | tps->lru_index[0] = new_vout_reg; | |
152 | *gpio_val = new_vout_reg; | |
153 | *vout_reg = MAX8973_VOUT + new_vout_reg; | |
154 | return found; | |
155 | } | |
156 | ||
157 | static int max8973_dcdc_get_voltage_sel(struct regulator_dev *rdev) | |
158 | { | |
159 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
160 | unsigned int data; | |
161 | int ret; | |
162 | ||
163 | ret = regmap_read(max->regmap, max->curr_vout_reg, &data); | |
164 | if (ret < 0) { | |
165 | dev_err(max->dev, "register %d read failed, err = %d\n", | |
166 | max->curr_vout_reg, ret); | |
167 | return ret; | |
168 | } | |
169 | return data & MAX8973_VOUT_MASK; | |
170 | } | |
171 | ||
172 | static int max8973_dcdc_set_voltage_sel(struct regulator_dev *rdev, | |
173 | unsigned vsel) | |
174 | { | |
175 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
176 | int ret; | |
177 | bool found = false; | |
178 | int vout_reg = max->curr_vout_reg; | |
179 | int gpio_val = max->curr_gpio_val; | |
180 | ||
181 | /* | |
182 | * If gpios are available to select the VOUT register then least | |
183 | * recently used register for new configuration. | |
184 | */ | |
4d52f575 | 185 | if (max->dvs_gpiod) |
5928f538 LD |
186 | found = find_voltage_set_register(max, vsel, |
187 | &vout_reg, &gpio_val); | |
188 | ||
189 | if (!found) { | |
190 | ret = regmap_update_bits(max->regmap, vout_reg, | |
191 | MAX8973_VOUT_MASK, vsel); | |
192 | if (ret < 0) { | |
193 | dev_err(max->dev, "register %d update failed, err %d\n", | |
194 | vout_reg, ret); | |
195 | return ret; | |
196 | } | |
197 | max->curr_vout_reg = vout_reg; | |
198 | max->curr_vout_val[gpio_val] = vsel; | |
199 | } | |
200 | ||
201 | /* Select proper VOUT register vio gpios */ | |
4d52f575 LW |
202 | if (max->dvs_gpiod) { |
203 | gpiod_set_value_cansleep(max->dvs_gpiod, gpio_val & 0x1); | |
5928f538 LD |
204 | max->curr_gpio_val = gpio_val; |
205 | } | |
206 | return 0; | |
207 | } | |
208 | ||
209 | static int max8973_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
210 | { | |
211 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
212 | int ret; | |
213 | int pwm; | |
214 | ||
215 | /* Enable force PWM mode in FAST mode only. */ | |
216 | switch (mode) { | |
217 | case REGULATOR_MODE_FAST: | |
218 | pwm = MAX8973_FPWM_EN_M; | |
219 | break; | |
220 | ||
221 | case REGULATOR_MODE_NORMAL: | |
222 | pwm = 0; | |
223 | break; | |
224 | ||
225 | default: | |
226 | return -EINVAL; | |
227 | } | |
228 | ||
229 | ret = regmap_update_bits(max->regmap, MAX8973_CONTROL1, | |
230 | MAX8973_FPWM_EN_M, pwm); | |
231 | if (ret < 0) | |
232 | dev_err(max->dev, "register %d update failed, err %d\n", | |
233 | MAX8973_CONTROL1, ret); | |
234 | return ret; | |
235 | } | |
236 | ||
237 | static unsigned int max8973_dcdc_get_mode(struct regulator_dev *rdev) | |
238 | { | |
239 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
240 | unsigned int data; | |
241 | int ret; | |
242 | ||
243 | ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data); | |
244 | if (ret < 0) { | |
245 | dev_err(max->dev, "register %d read failed, err %d\n", | |
246 | MAX8973_CONTROL1, ret); | |
247 | return ret; | |
248 | } | |
249 | return (data & MAX8973_FPWM_EN_M) ? | |
250 | REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; | |
251 | } | |
252 | ||
ffaab991 LD |
253 | static int max8973_set_current_limit(struct regulator_dev *rdev, |
254 | int min_ua, int max_ua) | |
255 | { | |
256 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
257 | unsigned int val; | |
258 | int ret; | |
259 | ||
260 | if (max_ua <= 9000000) | |
261 | val = MAX8973_CKKADV_TRIP_75mV_PER_US; | |
262 | else if (max_ua <= 12000000) | |
263 | val = MAX8973_CKKADV_TRIP_150mV_PER_US; | |
264 | else | |
265 | val = MAX8973_CKKADV_TRIP_DISABLE; | |
266 | ||
267 | ret = regmap_update_bits(max->regmap, MAX8973_CONTROL2, | |
268 | MAX8973_CKKADV_TRIP_MASK, val); | |
269 | if (ret < 0) { | |
270 | dev_err(max->dev, "register %d update failed: %d\n", | |
271 | MAX8973_CONTROL2, ret); | |
272 | return ret; | |
273 | } | |
274 | return 0; | |
275 | } | |
276 | ||
277 | static int max8973_get_current_limit(struct regulator_dev *rdev) | |
278 | { | |
279 | struct max8973_chip *max = rdev_get_drvdata(rdev); | |
280 | unsigned int control2; | |
281 | int ret; | |
282 | ||
283 | ret = regmap_read(max->regmap, MAX8973_CONTROL2, &control2); | |
284 | if (ret < 0) { | |
285 | dev_err(max->dev, "register %d read failed: %d\n", | |
286 | MAX8973_CONTROL2, ret); | |
287 | return ret; | |
288 | } | |
289 | switch (control2 & MAX8973_CKKADV_TRIP_MASK) { | |
290 | case MAX8973_CKKADV_TRIP_DISABLE: | |
291 | return 15000000; | |
292 | case MAX8973_CKKADV_TRIP_150mV_PER_US: | |
293 | return 12000000; | |
294 | case MAX8973_CKKADV_TRIP_75mV_PER_US: | |
295 | return 9000000; | |
296 | default: | |
297 | break; | |
298 | } | |
299 | return 9000000; | |
300 | } | |
301 | ||
8590ccd4 AL |
302 | static const unsigned int max8973_buck_ramp_table[] = { |
303 | 12000, 25000, 50000, 200000 | |
304 | }; | |
305 | ||
db892ff6 | 306 | static const struct regulator_ops max8973_dcdc_ops = { |
5928f538 LD |
307 | .get_voltage_sel = max8973_dcdc_get_voltage_sel, |
308 | .set_voltage_sel = max8973_dcdc_set_voltage_sel, | |
309 | .list_voltage = regulator_list_voltage_linear, | |
310 | .set_mode = max8973_dcdc_set_mode, | |
311 | .get_mode = max8973_dcdc_get_mode, | |
3064c1f3 | 312 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
8590ccd4 | 313 | .set_ramp_delay = regulator_set_ramp_delay_regmap, |
5928f538 LD |
314 | }; |
315 | ||
3d68dfe3 GKH |
316 | static int max8973_init_dcdc(struct max8973_chip *max, |
317 | struct max8973_regulator_platform_data *pdata) | |
5928f538 LD |
318 | { |
319 | int ret; | |
320 | uint8_t control1 = 0; | |
321 | uint8_t control2 = 0; | |
3064c1f3 LD |
322 | unsigned int data; |
323 | ||
324 | ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data); | |
325 | if (ret < 0) { | |
326 | dev_err(max->dev, "register %d read failed, err = %d", | |
327 | MAX8973_CONTROL1, ret); | |
328 | return ret; | |
329 | } | |
330 | control1 = data & MAX8973_RAMP_MASK; | |
331 | switch (control1) { | |
332 | case MAX8973_RAMP_12mV_PER_US: | |
333 | max->desc.ramp_delay = 12000; | |
334 | break; | |
335 | case MAX8973_RAMP_25mV_PER_US: | |
366604ec | 336 | max->desc.ramp_delay = 25000; |
3064c1f3 LD |
337 | break; |
338 | case MAX8973_RAMP_50mV_PER_US: | |
339 | max->desc.ramp_delay = 50000; | |
340 | break; | |
341 | case MAX8973_RAMP_200mV_PER_US: | |
342 | max->desc.ramp_delay = 200000; | |
343 | break; | |
344 | } | |
5928f538 LD |
345 | |
346 | if (pdata->control_flags & MAX8973_CONTROL_REMOTE_SENSE_ENABLE) | |
347 | control1 |= MAX8973_SNS_ENABLE; | |
348 | ||
349 | if (!(pdata->control_flags & MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE)) | |
350 | control1 |= MAX8973_NFSR_ENABLE; | |
351 | ||
352 | if (pdata->control_flags & MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE) | |
353 | control1 |= MAX8973_AD_ENABLE; | |
354 | ||
dcd9ec6a | 355 | if (pdata->control_flags & MAX8973_CONTROL_BIAS_ENABLE) { |
5928f538 | 356 | control1 |= MAX8973_BIAS_ENABLE; |
dcd9ec6a LD |
357 | max->desc.enable_time = 20; |
358 | } else { | |
359 | max->desc.enable_time = 240; | |
360 | } | |
5928f538 LD |
361 | |
362 | if (pdata->control_flags & MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE) | |
363 | control1 |= MAX8973_FREQSHIFT_9PER; | |
364 | ||
d2d5437b LD |
365 | if ((pdata->junction_temp_warning == MAX77621_TJINT_WARNING_TEMP_120) && |
366 | (max->id == MAX77621)) | |
367 | control2 |= MAX77621_T_JUNCTION_120; | |
368 | ||
5928f538 LD |
369 | if (!(pdata->control_flags & MAX8973_CONTROL_PULL_DOWN_ENABLE)) |
370 | control2 |= MAX8973_DISCH_ENBABLE; | |
371 | ||
372 | /* Clock advance trip configuration */ | |
373 | switch (pdata->control_flags & MAX8973_CONTROL_CLKADV_TRIP_MASK) { | |
374 | case MAX8973_CONTROL_CLKADV_TRIP_DISABLED: | |
375 | control2 |= MAX8973_CKKADV_TRIP_DISABLE; | |
376 | break; | |
377 | ||
378 | case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US: | |
379 | control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US; | |
380 | break; | |
381 | ||
382 | case MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US: | |
383 | control2 |= MAX8973_CKKADV_TRIP_150mV_PER_US; | |
384 | break; | |
385 | ||
386 | case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US_HIST_DIS: | |
387 | control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS; | |
388 | break; | |
389 | } | |
390 | ||
391 | /* Configure inductor value */ | |
392 | switch (pdata->control_flags & MAX8973_CONTROL_INDUCTOR_VALUE_MASK) { | |
393 | case MAX8973_CONTROL_INDUCTOR_VALUE_NOMINAL: | |
394 | control2 |= MAX8973_INDUCTOR_NOMINAL; | |
395 | break; | |
396 | ||
397 | case MAX8973_CONTROL_INDUCTOR_VALUE_MINUS_30_PER: | |
398 | control2 |= MAX8973_INDUCTOR_MIN_30_PER; | |
399 | break; | |
400 | ||
401 | case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_30_PER: | |
402 | control2 |= MAX8973_INDUCTOR_PLUS_30_PER; | |
403 | break; | |
404 | ||
405 | case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_60_PER: | |
406 | control2 |= MAX8973_INDUCTOR_PLUS_60_PER; | |
407 | break; | |
408 | } | |
409 | ||
410 | ret = regmap_write(max->regmap, MAX8973_CONTROL1, control1); | |
411 | if (ret < 0) { | |
412 | dev_err(max->dev, "register %d write failed, err = %d", | |
413 | MAX8973_CONTROL1, ret); | |
414 | return ret; | |
415 | } | |
416 | ||
417 | ret = regmap_write(max->regmap, MAX8973_CONTROL2, control2); | |
418 | if (ret < 0) { | |
419 | dev_err(max->dev, "register %d write failed, err = %d", | |
420 | MAX8973_CONTROL2, ret); | |
421 | return ret; | |
422 | } | |
423 | ||
424 | /* If external control is enabled then disable EN bit */ | |
0f7d6ece | 425 | if (max->enable_external_control && (max->id == MAX8973)) { |
5928f538 LD |
426 | ret = regmap_update_bits(max->regmap, MAX8973_VOUT, |
427 | MAX8973_VOUT_ENABLE, 0); | |
428 | if (ret < 0) | |
429 | dev_err(max->dev, "register %d update failed, err = %d", | |
430 | MAX8973_VOUT, ret); | |
431 | } | |
432 | return ret; | |
433 | } | |
434 | ||
826855ff | 435 | static int max8973_thermal_read_temp(struct thermal_zone_device *tz, int *temp) |
d2d5437b | 436 | { |
3d4e1bad | 437 | struct max8973_chip *mchip = thermal_zone_device_priv(tz); |
d2d5437b LD |
438 | unsigned int val; |
439 | int ret; | |
440 | ||
441 | ret = regmap_read(mchip->regmap, MAX8973_CHIPID1, &val); | |
442 | if (ret < 0) { | |
443 | dev_err(mchip->dev, "Failed to read register CHIPID1, %d", ret); | |
444 | return ret; | |
445 | } | |
446 | ||
bbc7ba0f | 447 | /* +1 degC to trigger cool device */ |
d2d5437b LD |
448 | if (val & MAX77621_CHIPID_TJINT_S) |
449 | *temp = mchip->junction_temp_warning + 1000; | |
450 | else | |
451 | *temp = MAX77621_NORMAL_OPERATING_TEMP; | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | static irqreturn_t max8973_thermal_irq(int irq, void *data) | |
457 | { | |
458 | struct max8973_chip *mchip = data; | |
459 | ||
0e70f466 SP |
460 | thermal_zone_device_update(mchip->tz_device, |
461 | THERMAL_EVENT_UNSPECIFIED); | |
d2d5437b LD |
462 | |
463 | return IRQ_HANDLED; | |
464 | } | |
465 | ||
826855ff | 466 | static const struct thermal_zone_device_ops max77621_tz_ops = { |
d2d5437b LD |
467 | .get_temp = max8973_thermal_read_temp, |
468 | }; | |
469 | ||
470 | static int max8973_thermal_init(struct max8973_chip *mchip) | |
471 | { | |
472 | struct thermal_zone_device *tzd; | |
473 | struct irq_data *irq_data; | |
474 | unsigned long irq_flags = 0; | |
475 | int ret; | |
476 | ||
477 | if (mchip->id != MAX77621) | |
478 | return 0; | |
479 | ||
826855ff DL |
480 | tzd = devm_thermal_of_zone_register(mchip->dev, 0, mchip, |
481 | &max77621_tz_ops); | |
d2d5437b LD |
482 | if (IS_ERR(tzd)) { |
483 | ret = PTR_ERR(tzd); | |
484 | dev_err(mchip->dev, "Failed to register thermal sensor: %d\n", | |
485 | ret); | |
486 | return ret; | |
487 | } | |
488 | ||
489 | if (mchip->irq <= 0) | |
490 | return 0; | |
491 | ||
492 | irq_data = irq_get_irq_data(mchip->irq); | |
493 | if (irq_data) | |
494 | irq_flags = irqd_get_trigger_type(irq_data); | |
495 | ||
496 | ret = devm_request_threaded_irq(mchip->dev, mchip->irq, NULL, | |
497 | max8973_thermal_irq, | |
498 | IRQF_ONESHOT | IRQF_SHARED | irq_flags, | |
499 | dev_name(mchip->dev), mchip); | |
500 | if (ret < 0) { | |
501 | dev_err(mchip->dev, "Failed to request irq %d, %d\n", | |
502 | mchip->irq, ret); | |
503 | return ret; | |
504 | } | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
5928f538 LD |
509 | static const struct regmap_config max8973_regmap_config = { |
510 | .reg_bits = 8, | |
511 | .val_bits = 8, | |
512 | .max_register = MAX8973_CHIPID2, | |
513 | .cache_type = REGCACHE_RBTREE, | |
514 | }; | |
515 | ||
c2ffa973 LD |
516 | static struct max8973_regulator_platform_data *max8973_parse_dt( |
517 | struct device *dev) | |
518 | { | |
519 | struct max8973_regulator_platform_data *pdata; | |
520 | struct device_node *np = dev->of_node; | |
521 | int ret; | |
522 | u32 pval; | |
3692db3a LD |
523 | bool etr_enable; |
524 | bool etr_sensitivity_high; | |
c2ffa973 LD |
525 | |
526 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
527 | if (!pdata) | |
528 | return NULL; | |
529 | ||
530 | pdata->enable_ext_control = of_property_read_bool(np, | |
531 | "maxim,externally-enable"); | |
c2ffa973 LD |
532 | |
533 | ret = of_property_read_u32(np, "maxim,dvs-default-state", &pval); | |
534 | if (!ret) | |
535 | pdata->dvs_def_state = pval; | |
536 | ||
537 | if (of_property_read_bool(np, "maxim,enable-remote-sense")) | |
538 | pdata->control_flags |= MAX8973_CONTROL_REMOTE_SENSE_ENABLE; | |
539 | ||
540 | if (of_property_read_bool(np, "maxim,enable-falling-slew-rate")) | |
541 | pdata->control_flags |= | |
542 | MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE; | |
543 | ||
544 | if (of_property_read_bool(np, "maxim,enable-active-discharge")) | |
545 | pdata->control_flags |= | |
546 | MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE; | |
547 | ||
548 | if (of_property_read_bool(np, "maxim,enable-frequency-shift")) | |
549 | pdata->control_flags |= MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE; | |
550 | ||
551 | if (of_property_read_bool(np, "maxim,enable-bias-control")) | |
127e1062 | 552 | pdata->control_flags |= MAX8973_CONTROL_BIAS_ENABLE; |
c2ffa973 | 553 | |
3692db3a LD |
554 | etr_enable = of_property_read_bool(np, "maxim,enable-etr"); |
555 | etr_sensitivity_high = of_property_read_bool(np, | |
556 | "maxim,enable-high-etr-sensitivity"); | |
557 | if (etr_sensitivity_high) | |
558 | etr_enable = true; | |
559 | ||
560 | if (etr_enable) { | |
561 | if (etr_sensitivity_high) | |
562 | pdata->control_flags |= | |
563 | MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US; | |
564 | else | |
565 | pdata->control_flags |= | |
566 | MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US; | |
567 | } else { | |
568 | pdata->control_flags |= MAX8973_CONTROL_CLKADV_TRIP_DISABLED; | |
569 | } | |
570 | ||
d2d5437b LD |
571 | pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_140; |
572 | ret = of_property_read_u32(np, "junction-warn-millicelsius", &pval); | |
573 | if (!ret && (pval <= MAX77621_TJINT_WARNING_TEMP_120)) | |
574 | pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_120; | |
575 | ||
c2ffa973 LD |
576 | return pdata; |
577 | } | |
578 | ||
0f7d6ece LD |
579 | static const struct of_device_id of_max8973_match_tbl[] = { |
580 | { .compatible = "maxim,max8973", .data = (void *)MAX8973, }, | |
581 | { .compatible = "maxim,max77621", .data = (void *)MAX77621, }, | |
582 | { }, | |
583 | }; | |
584 | MODULE_DEVICE_TABLE(of, of_max8973_match_tbl); | |
585 | ||
4e85e5d6 | 586 | static int max8973_probe(struct i2c_client *client) |
5928f538 | 587 | { |
4e85e5d6 | 588 | const struct i2c_device_id *id = i2c_client_get_device_id(client); |
5928f538 | 589 | struct max8973_regulator_platform_data *pdata; |
69eb0980 | 590 | struct regulator_init_data *ridata; |
5928f538 LD |
591 | struct regulator_config config = { }; |
592 | struct regulator_dev *rdev; | |
593 | struct max8973_chip *max; | |
c2ffa973 | 594 | bool pdata_from_dt = false; |
0f7d6ece | 595 | unsigned int chip_id; |
e7d2be69 LW |
596 | struct gpio_desc *gpiod; |
597 | enum gpiod_flags gflags; | |
5928f538 LD |
598 | int ret; |
599 | ||
dff91d0b | 600 | pdata = dev_get_platdata(&client->dev); |
42dc3023 | 601 | |
c2ffa973 LD |
602 | if (!pdata && client->dev.of_node) { |
603 | pdata = max8973_parse_dt(&client->dev); | |
604 | pdata_from_dt = true; | |
605 | } | |
606 | ||
607 | if (!pdata) { | |
5928f538 LD |
608 | dev_err(&client->dev, "No Platform data"); |
609 | return -EIO; | |
610 | } | |
611 | ||
612 | max = devm_kzalloc(&client->dev, sizeof(*max), GFP_KERNEL); | |
21024dee | 613 | if (!max) |
5928f538 | 614 | return -ENOMEM; |
5928f538 | 615 | |
4d52f575 LW |
616 | max->dvs_gpiod = devm_gpiod_get_optional(&client->dev, "maxim,dvs", |
617 | (pdata->dvs_def_state) ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); | |
618 | if (IS_ERR(max->dvs_gpiod)) | |
619 | return dev_err_probe(&client->dev, PTR_ERR(max->dvs_gpiod), | |
620 | "failed to obtain dvs gpio\n"); | |
621 | gpiod_set_consumer_name(max->dvs_gpiod, "max8973-dvs"); | |
622 | ||
5928f538 LD |
623 | max->regmap = devm_regmap_init_i2c(client, &max8973_regmap_config); |
624 | if (IS_ERR(max->regmap)) { | |
625 | ret = PTR_ERR(max->regmap); | |
626 | dev_err(&client->dev, "regmap init failed, err %d\n", ret); | |
627 | return ret; | |
628 | } | |
629 | ||
0f7d6ece LD |
630 | if (client->dev.of_node) { |
631 | const struct of_device_id *match; | |
632 | ||
633 | match = of_match_device(of_match_ptr(of_max8973_match_tbl), | |
634 | &client->dev); | |
635 | if (!match) | |
636 | return -ENODATA; | |
637 | max->id = (u32)((uintptr_t)match->data); | |
638 | } else { | |
639 | max->id = id->driver_data; | |
640 | } | |
641 | ||
642 | ret = regmap_read(max->regmap, MAX8973_CHIPID1, &chip_id); | |
643 | if (ret < 0) { | |
644 | dev_err(&client->dev, "register CHIPID1 read failed, %d", ret); | |
645 | return ret; | |
646 | } | |
647 | ||
648 | dev_info(&client->dev, "CHIP-ID OTP: 0x%02x ID_M: 0x%02x\n", | |
649 | (chip_id >> 4) & 0xF, (chip_id >> 1) & 0x7); | |
650 | ||
5928f538 | 651 | i2c_set_clientdata(client, max); |
db892ff6 | 652 | max->ops = max8973_dcdc_ops; |
5928f538 LD |
653 | max->dev = &client->dev; |
654 | max->desc.name = id->name; | |
655 | max->desc.id = 0; | |
db892ff6 | 656 | max->desc.ops = &max->ops; |
5928f538 LD |
657 | max->desc.type = REGULATOR_VOLTAGE; |
658 | max->desc.owner = THIS_MODULE; | |
659 | max->desc.min_uV = MAX8973_MIN_VOLATGE; | |
660 | max->desc.uV_step = MAX8973_VOLATGE_STEP; | |
661 | max->desc.n_voltages = MAX8973_BUCK_N_VOLTAGE; | |
8590ccd4 AL |
662 | max->desc.ramp_reg = MAX8973_CONTROL1; |
663 | max->desc.ramp_mask = MAX8973_RAMP_MASK; | |
664 | max->desc.ramp_delay_table = max8973_buck_ramp_table; | |
665 | max->desc.n_ramp_values = ARRAY_SIZE(max8973_buck_ramp_table); | |
5928f538 | 666 | |
69eb0980 LD |
667 | max->enable_external_control = pdata->enable_ext_control; |
668 | max->curr_gpio_val = pdata->dvs_def_state; | |
669 | max->curr_vout_reg = MAX8973_VOUT + pdata->dvs_def_state; | |
d2d5437b | 670 | max->junction_temp_warning = pdata->junction_temp_warning; |
69eb0980 | 671 | |
5928f538 | 672 | max->lru_index[0] = max->curr_vout_reg; |
5928f538 | 673 | |
4d52f575 | 674 | if (max->dvs_gpiod) { |
5928f538 LD |
675 | int i; |
676 | ||
5928f538 LD |
677 | /* |
678 | * Initialize the lru index with vout_reg id | |
679 | * The index 0 will be most recently used and | |
680 | * set with the max->curr_vout_reg */ | |
681 | for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i) | |
682 | max->lru_index[i] = i; | |
683 | max->lru_index[0] = max->curr_vout_reg; | |
684 | max->lru_index[max->curr_vout_reg] = 0; | |
b10c7f3c MP |
685 | } else { |
686 | /* | |
687 | * If there is no DVS GPIO, the VOUT register | |
688 | * address is fixed. | |
689 | */ | |
690 | max->ops.set_voltage_sel = regulator_set_voltage_sel_regmap; | |
691 | max->ops.get_voltage_sel = regulator_get_voltage_sel_regmap; | |
692 | max->desc.vsel_reg = max->curr_vout_reg; | |
693 | max->desc.vsel_mask = MAX8973_VOUT_MASK; | |
5928f538 LD |
694 | } |
695 | ||
c2ffa973 LD |
696 | if (pdata_from_dt) |
697 | pdata->reg_init_data = of_get_regulator_init_data(&client->dev, | |
698 | client->dev.of_node, &max->desc); | |
699 | ||
0f7d6ece LD |
700 | ridata = pdata->reg_init_data; |
701 | switch (max->id) { | |
702 | case MAX8973: | |
703 | if (!pdata->enable_ext_control) { | |
704 | max->desc.enable_reg = MAX8973_VOUT; | |
705 | max->desc.enable_mask = MAX8973_VOUT_ENABLE; | |
706 | max->ops.enable = regulator_enable_regmap; | |
707 | max->ops.disable = regulator_disable_regmap; | |
708 | max->ops.is_enabled = regulator_is_enabled_regmap; | |
709 | break; | |
710 | } | |
711 | ||
e7d2be69 LW |
712 | if (ridata && (ridata->constraints.always_on || |
713 | ridata->constraints.boot_on)) | |
714 | gflags = GPIOD_OUT_HIGH; | |
715 | else | |
716 | gflags = GPIOD_OUT_LOW; | |
63239e4b | 717 | gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE; |
e7d2be69 LW |
718 | gpiod = devm_gpiod_get_optional(&client->dev, |
719 | "maxim,enable", | |
720 | gflags); | |
721 | if (IS_ERR(gpiod)) | |
722 | return PTR_ERR(gpiod); | |
723 | if (gpiod) { | |
724 | config.ena_gpiod = gpiod; | |
725 | max->enable_external_control = true; | |
0f7d6ece | 726 | } |
e7d2be69 | 727 | |
0f7d6ece LD |
728 | break; |
729 | ||
730 | case MAX77621: | |
e7d2be69 LW |
731 | /* |
732 | * We do not let the core switch this regulator on/off, | |
733 | * we just leave it on. | |
734 | */ | |
735 | gpiod = devm_gpiod_get_optional(&client->dev, | |
736 | "maxim,enable", | |
737 | GPIOD_OUT_HIGH); | |
738 | if (IS_ERR(gpiod)) | |
739 | return PTR_ERR(gpiod); | |
740 | if (gpiod) | |
741 | max->enable_external_control = true; | |
0f7d6ece LD |
742 | |
743 | max->desc.enable_reg = MAX8973_VOUT; | |
744 | max->desc.enable_mask = MAX8973_VOUT_ENABLE; | |
745 | max->ops.enable = regulator_enable_regmap; | |
746 | max->ops.disable = regulator_disable_regmap; | |
747 | max->ops.is_enabled = regulator_is_enabled_regmap; | |
ffaab991 LD |
748 | max->ops.set_current_limit = max8973_set_current_limit; |
749 | max->ops.get_current_limit = max8973_get_current_limit; | |
0f7d6ece LD |
750 | break; |
751 | default: | |
752 | break; | |
753 | } | |
754 | ||
c2ffa973 LD |
755 | ret = max8973_init_dcdc(max, pdata); |
756 | if (ret < 0) { | |
757 | dev_err(max->dev, "Max8973 Init failed, err = %d\n", ret); | |
758 | return ret; | |
5928f538 LD |
759 | } |
760 | ||
761 | config.dev = &client->dev; | |
c2ffa973 | 762 | config.init_data = pdata->reg_init_data; |
5928f538 LD |
763 | config.driver_data = max; |
764 | config.of_node = client->dev.of_node; | |
765 | config.regmap = max->regmap; | |
766 | ||
48bd226f LW |
767 | /* |
768 | * Register the regulators | |
769 | * Turn the GPIO descriptor over to the regulator core for | |
770 | * lifecycle management if we pass an ena_gpiod. | |
771 | */ | |
772 | if (config.ena_gpiod) | |
773 | devm_gpiod_unhinge(&client->dev, config.ena_gpiod); | |
8d581fd0 | 774 | rdev = devm_regulator_register(&client->dev, &max->desc, &config); |
5928f538 LD |
775 | if (IS_ERR(rdev)) { |
776 | ret = PTR_ERR(rdev); | |
777 | dev_err(max->dev, "regulator register failed, err %d\n", ret); | |
778 | return ret; | |
779 | } | |
780 | ||
d2d5437b | 781 | max8973_thermal_init(max); |
5928f538 LD |
782 | return 0; |
783 | } | |
784 | ||
5928f538 | 785 | static const struct i2c_device_id max8973_id[] = { |
0f7d6ece LD |
786 | {.name = "max8973", .driver_data = MAX8973}, |
787 | {.name = "max77621", .driver_data = MAX77621}, | |
5928f538 LD |
788 | {}, |
789 | }; | |
5928f538 LD |
790 | MODULE_DEVICE_TABLE(i2c, max8973_id); |
791 | ||
792 | static struct i2c_driver max8973_i2c_driver = { | |
793 | .driver = { | |
794 | .name = "max8973", | |
259b93b2 | 795 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
0f7d6ece | 796 | .of_match_table = of_max8973_match_tbl, |
5928f538 | 797 | }, |
964e1865 | 798 | .probe = max8973_probe, |
5928f538 LD |
799 | .id_table = max8973_id, |
800 | }; | |
801 | ||
802 | static int __init max8973_init(void) | |
803 | { | |
804 | return i2c_add_driver(&max8973_i2c_driver); | |
805 | } | |
806 | subsys_initcall(max8973_init); | |
807 | ||
808 | static void __exit max8973_cleanup(void) | |
809 | { | |
810 | i2c_del_driver(&max8973_i2c_driver); | |
811 | } | |
812 | module_exit(max8973_cleanup); | |
813 | ||
814 | MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); | |
815 | MODULE_DESCRIPTION("MAX8973 voltage regulator driver"); | |
816 | MODULE_LICENSE("GPL v2"); |