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0cbdf7bc MS |
1 | /* |
2 | * Regulator driver for National Semiconductors LP3971 PMIC chip | |
3 | * | |
4 | * Copyright (C) 2009 Samsung Electronics | |
5 | * Author: Marek Szyprowski <m.szyprowski@samsung.com> | |
6 | * | |
7 | * Based on wm8350.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/bug.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/kernel.h> | |
65602c32 | 19 | #include <linux/module.h> |
0cbdf7bc MS |
20 | #include <linux/regulator/driver.h> |
21 | #include <linux/regulator/lp3971.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
0cbdf7bc MS |
23 | |
24 | struct lp3971 { | |
25 | struct device *dev; | |
26 | struct mutex io_lock; | |
27 | struct i2c_client *i2c; | |
28 | int num_regulators; | |
29 | struct regulator_dev **rdev; | |
30 | }; | |
31 | ||
32 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg); | |
33 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val); | |
34 | ||
35 | #define LP3971_SYS_CONTROL1_REG 0x07 | |
36 | ||
37 | /* System control register 1 initial value, | |
38 | bits 4 and 5 are EPROM programmable */ | |
39 | #define SYS_CONTROL1_INIT_VAL 0x40 | |
40 | #define SYS_CONTROL1_INIT_MASK 0xCF | |
41 | ||
42 | #define LP3971_BUCK_VOL_ENABLE_REG 0x10 | |
43 | #define LP3971_BUCK_VOL_CHANGE_REG 0x20 | |
44 | ||
45 | /* Voltage control registers shift: | |
46 | LP3971_BUCK1 -> 0 | |
47 | LP3971_BUCK2 -> 4 | |
48 | LP3971_BUCK3 -> 6 | |
49 | */ | |
451a73cd | 50 | #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) |
0cbdf7bc MS |
51 | #define BUCK_VOL_CHANGE_FLAG_GO 0x01 |
52 | #define BUCK_VOL_CHANGE_FLAG_TARGET 0x02 | |
53 | #define BUCK_VOL_CHANGE_FLAG_MASK 0x03 | |
54 | ||
55 | #define LP3971_BUCK1_BASE 0x23 | |
56 | #define LP3971_BUCK2_BASE 0x29 | |
57 | #define LP3971_BUCK3_BASE 0x32 | |
58 | ||
6faa7e0a | 59 | static const int buck_base_addr[] = { |
0cbdf7bc MS |
60 | LP3971_BUCK1_BASE, |
61 | LP3971_BUCK2_BASE, | |
62 | LP3971_BUCK3_BASE, | |
63 | }; | |
64 | ||
65 | #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) | |
66 | #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) | |
67 | ||
6faa7e0a | 68 | static const int buck_voltage_map[] = { |
0cbdf7bc MS |
69 | 0, 800, 850, 900, 950, 1000, 1050, 1100, |
70 | 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500, | |
71 | 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800, | |
72 | 3000, 3300, | |
73 | }; | |
74 | ||
75 | #define BUCK_TARGET_VOL_MASK 0x3f | |
76 | #define BUCK_TARGET_VOL_MIN_IDX 0x01 | |
77 | #define BUCK_TARGET_VOL_MAX_IDX 0x19 | |
78 | ||
79 | #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) | |
80 | ||
81 | #define LP3971_LDO_ENABLE_REG 0x12 | |
82 | #define LP3971_LDO_VOL_CONTR_BASE 0x39 | |
83 | ||
84 | /* Voltage control registers: | |
85 | LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
86 | LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
87 | LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
88 | LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
89 | LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2 | |
90 | */ | |
91 | #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) | |
92 | ||
93 | /* Voltage control registers shift: | |
94 | LP3971_LDO1 -> 0, LP3971_LDO2 -> 4 | |
95 | LP3971_LDO3 -> 0, LP3971_LDO4 -> 4 | |
96 | LP3971_LDO5 -> 0 | |
97 | */ | |
98 | #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) | |
99 | #define LDO_VOL_CONTR_MASK 0x0f | |
100 | ||
6faa7e0a | 101 | static const int ldo45_voltage_map[] = { |
0cbdf7bc MS |
102 | 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350, |
103 | 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300, | |
104 | }; | |
105 | ||
6faa7e0a | 106 | static const int ldo123_voltage_map[] = { |
0cbdf7bc MS |
107 | 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, |
108 | 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300, | |
109 | }; | |
110 | ||
6faa7e0a | 111 | static const int *ldo_voltage_map[] = { |
0cbdf7bc MS |
112 | ldo123_voltage_map, /* LDO1 */ |
113 | ldo123_voltage_map, /* LDO2 */ | |
114 | ldo123_voltage_map, /* LDO3 */ | |
115 | ldo45_voltage_map, /* LDO4 */ | |
116 | ldo45_voltage_map, /* LDO5 */ | |
117 | }; | |
118 | ||
119 | #define LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[(x - LP3971_LDO1)]) | |
120 | ||
121 | #define LDO_VOL_MIN_IDX 0x00 | |
122 | #define LDO_VOL_MAX_IDX 0x0f | |
123 | ||
124 | static int lp3971_ldo_list_voltage(struct regulator_dev *dev, unsigned index) | |
125 | { | |
126 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
127 | return 1000 * LDO_VOL_VALUE_MAP(ldo)[index]; | |
128 | } | |
129 | ||
130 | static int lp3971_ldo_is_enabled(struct regulator_dev *dev) | |
131 | { | |
132 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
133 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
134 | u16 mask = 1 << (1 + ldo); | |
135 | u16 val; | |
136 | ||
137 | val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG); | |
138 | return (val & mask) != 0; | |
139 | } | |
140 | ||
141 | static int lp3971_ldo_enable(struct regulator_dev *dev) | |
142 | { | |
143 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
144 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
145 | u16 mask = 1 << (1 + ldo); | |
146 | ||
147 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask); | |
148 | } | |
149 | ||
150 | static int lp3971_ldo_disable(struct regulator_dev *dev) | |
151 | { | |
152 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
153 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
154 | u16 mask = 1 << (1 + ldo); | |
155 | ||
156 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0); | |
157 | } | |
158 | ||
159 | static int lp3971_ldo_get_voltage(struct regulator_dev *dev) | |
160 | { | |
161 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
162 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
163 | u16 val, reg; | |
164 | ||
165 | reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo)); | |
166 | val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK; | |
167 | ||
168 | return 1000 * LDO_VOL_VALUE_MAP(ldo)[val]; | |
169 | } | |
170 | ||
171 | static int lp3971_ldo_set_voltage(struct regulator_dev *dev, | |
3a93f2a9 MB |
172 | int min_uV, int max_uV, |
173 | unsigned int *selector) | |
0cbdf7bc MS |
174 | { |
175 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
176 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
177 | int min_vol = min_uV / 1000, max_vol = max_uV / 1000; | |
178 | const int *vol_map = LDO_VOL_VALUE_MAP(ldo); | |
179 | u16 val; | |
180 | ||
181 | if (min_vol < vol_map[LDO_VOL_MIN_IDX] || | |
182 | min_vol > vol_map[LDO_VOL_MAX_IDX]) | |
183 | return -EINVAL; | |
184 | ||
185 | for (val = LDO_VOL_MIN_IDX; val <= LDO_VOL_MAX_IDX; val++) | |
186 | if (vol_map[val] >= min_vol) | |
187 | break; | |
188 | ||
62737d44 | 189 | if (val > LDO_VOL_MAX_IDX || vol_map[val] > max_vol) |
0cbdf7bc MS |
190 | return -EINVAL; |
191 | ||
3a93f2a9 MB |
192 | *selector = val; |
193 | ||
0cbdf7bc | 194 | return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), |
cdb868f5 AL |
195 | LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo), |
196 | val << LDO_VOL_CONTR_SHIFT(ldo)); | |
0cbdf7bc MS |
197 | } |
198 | ||
199 | static struct regulator_ops lp3971_ldo_ops = { | |
200 | .list_voltage = lp3971_ldo_list_voltage, | |
201 | .is_enabled = lp3971_ldo_is_enabled, | |
202 | .enable = lp3971_ldo_enable, | |
203 | .disable = lp3971_ldo_disable, | |
204 | .get_voltage = lp3971_ldo_get_voltage, | |
205 | .set_voltage = lp3971_ldo_set_voltage, | |
206 | }; | |
207 | ||
208 | static int lp3971_dcdc_list_voltage(struct regulator_dev *dev, unsigned index) | |
209 | { | |
210 | return 1000 * buck_voltage_map[index]; | |
211 | } | |
212 | ||
213 | static int lp3971_dcdc_is_enabled(struct regulator_dev *dev) | |
214 | { | |
215 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
216 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
217 | u16 mask = 1 << (buck * 2); | |
218 | u16 val; | |
219 | ||
220 | val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG); | |
221 | return (val & mask) != 0; | |
222 | } | |
223 | ||
224 | static int lp3971_dcdc_enable(struct regulator_dev *dev) | |
225 | { | |
226 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
227 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
228 | u16 mask = 1 << (buck * 2); | |
229 | ||
230 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask); | |
231 | } | |
232 | ||
233 | static int lp3971_dcdc_disable(struct regulator_dev *dev) | |
234 | { | |
235 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
236 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
237 | u16 mask = 1 << (buck * 2); | |
238 | ||
239 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0); | |
240 | } | |
241 | ||
242 | static int lp3971_dcdc_get_voltage(struct regulator_dev *dev) | |
243 | { | |
244 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
245 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
246 | u16 reg; | |
247 | int val; | |
248 | ||
249 | reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck)); | |
250 | reg &= BUCK_TARGET_VOL_MASK; | |
251 | ||
252 | if (reg <= BUCK_TARGET_VOL_MAX_IDX) | |
253 | val = 1000 * buck_voltage_map[reg]; | |
254 | else { | |
255 | val = 0; | |
256 | dev_warn(&dev->dev, "chip reported incorrect voltage value.\n"); | |
257 | } | |
258 | ||
259 | return val; | |
260 | } | |
261 | ||
262 | static int lp3971_dcdc_set_voltage(struct regulator_dev *dev, | |
3a93f2a9 MB |
263 | int min_uV, int max_uV, |
264 | unsigned int *selector) | |
0cbdf7bc MS |
265 | { |
266 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
267 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
268 | int min_vol = min_uV / 1000, max_vol = max_uV / 1000; | |
269 | const int *vol_map = buck_voltage_map; | |
270 | u16 val; | |
271 | int ret; | |
272 | ||
273 | if (min_vol < vol_map[BUCK_TARGET_VOL_MIN_IDX] || | |
274 | min_vol > vol_map[BUCK_TARGET_VOL_MAX_IDX]) | |
275 | return -EINVAL; | |
276 | ||
277 | for (val = BUCK_TARGET_VOL_MIN_IDX; val <= BUCK_TARGET_VOL_MAX_IDX; | |
278 | val++) | |
279 | if (vol_map[val] >= min_vol) | |
280 | break; | |
281 | ||
62737d44 | 282 | if (val > BUCK_TARGET_VOL_MAX_IDX || vol_map[val] > max_vol) |
0cbdf7bc MS |
283 | return -EINVAL; |
284 | ||
3a93f2a9 MB |
285 | *selector = val; |
286 | ||
0cbdf7bc MS |
287 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), |
288 | BUCK_TARGET_VOL_MASK, val); | |
289 | if (ret) | |
290 | return ret; | |
291 | ||
292 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
293 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
294 | BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck)); | |
295 | if (ret) | |
296 | return ret; | |
297 | ||
298 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
299 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
300 | 0 << BUCK_VOL_CHANGE_SHIFT(buck)); | |
301 | } | |
302 | ||
303 | static struct regulator_ops lp3971_dcdc_ops = { | |
304 | .list_voltage = lp3971_dcdc_list_voltage, | |
305 | .is_enabled = lp3971_dcdc_is_enabled, | |
306 | .enable = lp3971_dcdc_enable, | |
307 | .disable = lp3971_dcdc_disable, | |
308 | .get_voltage = lp3971_dcdc_get_voltage, | |
309 | .set_voltage = lp3971_dcdc_set_voltage, | |
310 | }; | |
311 | ||
312 | static struct regulator_desc regulators[] = { | |
313 | { | |
314 | .name = "LDO1", | |
315 | .id = LP3971_LDO1, | |
316 | .ops = &lp3971_ldo_ops, | |
317 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
318 | .type = REGULATOR_VOLTAGE, | |
319 | .owner = THIS_MODULE, | |
320 | }, | |
321 | { | |
322 | .name = "LDO2", | |
323 | .id = LP3971_LDO2, | |
324 | .ops = &lp3971_ldo_ops, | |
325 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
326 | .type = REGULATOR_VOLTAGE, | |
327 | .owner = THIS_MODULE, | |
328 | }, | |
329 | { | |
330 | .name = "LDO3", | |
331 | .id = LP3971_LDO3, | |
332 | .ops = &lp3971_ldo_ops, | |
333 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
334 | .type = REGULATOR_VOLTAGE, | |
335 | .owner = THIS_MODULE, | |
336 | }, | |
337 | { | |
338 | .name = "LDO4", | |
339 | .id = LP3971_LDO4, | |
340 | .ops = &lp3971_ldo_ops, | |
341 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
342 | .type = REGULATOR_VOLTAGE, | |
343 | .owner = THIS_MODULE, | |
344 | }, | |
345 | { | |
346 | .name = "LDO5", | |
347 | .id = LP3971_LDO5, | |
348 | .ops = &lp3971_ldo_ops, | |
349 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
350 | .type = REGULATOR_VOLTAGE, | |
351 | .owner = THIS_MODULE, | |
352 | }, | |
353 | { | |
354 | .name = "DCDC1", | |
355 | .id = LP3971_DCDC1, | |
356 | .ops = &lp3971_dcdc_ops, | |
357 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
358 | .type = REGULATOR_VOLTAGE, | |
359 | .owner = THIS_MODULE, | |
360 | }, | |
361 | { | |
362 | .name = "DCDC2", | |
363 | .id = LP3971_DCDC2, | |
364 | .ops = &lp3971_dcdc_ops, | |
365 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
366 | .type = REGULATOR_VOLTAGE, | |
367 | .owner = THIS_MODULE, | |
368 | }, | |
369 | { | |
370 | .name = "DCDC3", | |
371 | .id = LP3971_DCDC3, | |
372 | .ops = &lp3971_dcdc_ops, | |
373 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
374 | .type = REGULATOR_VOLTAGE, | |
375 | .owner = THIS_MODULE, | |
376 | }, | |
377 | }; | |
378 | ||
379 | static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count, | |
380 | u16 *dest) | |
381 | { | |
382 | int ret; | |
383 | ||
384 | if (count != 1) | |
385 | return -EIO; | |
386 | ret = i2c_smbus_read_byte_data(i2c, reg); | |
27ef7f00 | 387 | if (ret < 0) |
0cbdf7bc MS |
388 | return -EIO; |
389 | ||
390 | *dest = ret; | |
391 | return 0; | |
392 | } | |
393 | ||
394 | static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count, | |
395 | const u16 *src) | |
396 | { | |
0cbdf7bc MS |
397 | if (count != 1) |
398 | return -EIO; | |
1bddc2f5 | 399 | return i2c_smbus_write_byte_data(i2c, reg, *src); |
0cbdf7bc MS |
400 | } |
401 | ||
402 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg) | |
403 | { | |
404 | u16 val = 0; | |
405 | ||
406 | mutex_lock(&lp3971->io_lock); | |
407 | ||
408 | lp3971_i2c_read(lp3971->i2c, reg, 1, &val); | |
409 | ||
410 | dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, | |
411 | (unsigned)val&0xff); | |
412 | ||
413 | mutex_unlock(&lp3971->io_lock); | |
414 | ||
415 | return val & 0xff; | |
416 | } | |
417 | ||
418 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val) | |
419 | { | |
420 | u16 tmp; | |
421 | int ret; | |
422 | ||
423 | mutex_lock(&lp3971->io_lock); | |
424 | ||
425 | ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp); | |
426 | tmp = (tmp & ~mask) | val; | |
427 | if (ret == 0) { | |
428 | ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp); | |
429 | dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, | |
430 | (unsigned)val&0xff); | |
431 | } | |
432 | mutex_unlock(&lp3971->io_lock); | |
433 | ||
434 | return ret; | |
435 | } | |
436 | ||
ebbed04f DT |
437 | static int __devinit setup_regulators(struct lp3971 *lp3971, |
438 | struct lp3971_platform_data *pdata) | |
0cbdf7bc MS |
439 | { |
440 | int i, err; | |
ebbed04f DT |
441 | |
442 | lp3971->num_regulators = pdata->num_regulators; | |
443 | lp3971->rdev = kcalloc(pdata->num_regulators, | |
444 | sizeof(struct regulator_dev *), GFP_KERNEL); | |
67e46f34 DC |
445 | if (!lp3971->rdev) { |
446 | err = -ENOMEM; | |
447 | goto err_nomem; | |
448 | } | |
0cbdf7bc MS |
449 | |
450 | /* Instantiate the regulators */ | |
ebbed04f DT |
451 | for (i = 0; i < pdata->num_regulators; i++) { |
452 | struct lp3971_regulator_subdev *reg = &pdata->regulators[i]; | |
453 | lp3971->rdev[i] = regulator_register(®ulators[reg->id], | |
2c043bcb | 454 | lp3971->dev, reg->initdata, lp3971, NULL); |
0cbdf7bc | 455 | |
d662fc82 JL |
456 | if (IS_ERR(lp3971->rdev[i])) { |
457 | err = PTR_ERR(lp3971->rdev[i]); | |
0cbdf7bc MS |
458 | dev_err(lp3971->dev, "regulator init failed: %d\n", |
459 | err); | |
460 | goto error; | |
461 | } | |
462 | } | |
463 | ||
464 | return 0; | |
ebbed04f | 465 | |
0cbdf7bc | 466 | error: |
ebbed04f DT |
467 | while (--i >= 0) |
468 | regulator_unregister(lp3971->rdev[i]); | |
0cbdf7bc MS |
469 | kfree(lp3971->rdev); |
470 | lp3971->rdev = NULL; | |
67e46f34 | 471 | err_nomem: |
0cbdf7bc MS |
472 | return err; |
473 | } | |
474 | ||
475 | static int __devinit lp3971_i2c_probe(struct i2c_client *i2c, | |
476 | const struct i2c_device_id *id) | |
477 | { | |
478 | struct lp3971 *lp3971; | |
479 | struct lp3971_platform_data *pdata = i2c->dev.platform_data; | |
480 | int ret; | |
481 | u16 val; | |
482 | ||
ebbed04f DT |
483 | if (!pdata) { |
484 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); | |
485 | return -ENODEV; | |
0cbdf7bc MS |
486 | } |
487 | ||
ebbed04f DT |
488 | lp3971 = kzalloc(sizeof(struct lp3971), GFP_KERNEL); |
489 | if (lp3971 == NULL) | |
490 | return -ENOMEM; | |
491 | ||
0cbdf7bc MS |
492 | lp3971->i2c = i2c; |
493 | lp3971->dev = &i2c->dev; | |
0cbdf7bc MS |
494 | |
495 | mutex_init(&lp3971->io_lock); | |
496 | ||
497 | /* Detect LP3971 */ | |
498 | ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val); | |
499 | if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) | |
500 | ret = -ENODEV; | |
501 | if (ret < 0) { | |
502 | dev_err(&i2c->dev, "failed to detect device\n"); | |
503 | goto err_detect; | |
504 | } | |
505 | ||
ebbed04f DT |
506 | ret = setup_regulators(lp3971, pdata); |
507 | if (ret < 0) | |
508 | goto err_detect; | |
0cbdf7bc | 509 | |
ebbed04f | 510 | i2c_set_clientdata(i2c, lp3971); |
0cbdf7bc MS |
511 | return 0; |
512 | ||
513 | err_detect: | |
0cbdf7bc | 514 | kfree(lp3971); |
0cbdf7bc MS |
515 | return ret; |
516 | } | |
517 | ||
518 | static int __devexit lp3971_i2c_remove(struct i2c_client *i2c) | |
519 | { | |
520 | struct lp3971 *lp3971 = i2c_get_clientdata(i2c); | |
521 | int i; | |
ebbed04f | 522 | |
0cbdf7bc | 523 | for (i = 0; i < lp3971->num_regulators; i++) |
ebbed04f DT |
524 | regulator_unregister(lp3971->rdev[i]); |
525 | ||
0cbdf7bc | 526 | kfree(lp3971->rdev); |
0cbdf7bc MS |
527 | kfree(lp3971); |
528 | ||
529 | return 0; | |
530 | } | |
531 | ||
532 | static const struct i2c_device_id lp3971_i2c_id[] = { | |
533 | { "lp3971", 0 }, | |
534 | { } | |
535 | }; | |
536 | MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id); | |
537 | ||
538 | static struct i2c_driver lp3971_i2c_driver = { | |
539 | .driver = { | |
540 | .name = "LP3971", | |
541 | .owner = THIS_MODULE, | |
542 | }, | |
543 | .probe = lp3971_i2c_probe, | |
6113c3a5 | 544 | .remove = __devexit_p(lp3971_i2c_remove), |
0cbdf7bc MS |
545 | .id_table = lp3971_i2c_id, |
546 | }; | |
547 | ||
548 | static int __init lp3971_module_init(void) | |
549 | { | |
12a1d933 | 550 | int ret; |
0cbdf7bc MS |
551 | |
552 | ret = i2c_add_driver(&lp3971_i2c_driver); | |
553 | if (ret != 0) | |
554 | pr_err("Failed to register I2C driver: %d\n", ret); | |
555 | ||
556 | return ret; | |
557 | } | |
558 | module_init(lp3971_module_init); | |
559 | ||
560 | static void __exit lp3971_module_exit(void) | |
561 | { | |
562 | i2c_del_driver(&lp3971_i2c_driver); | |
563 | } | |
564 | module_exit(lp3971_module_exit); | |
565 | ||
566 | MODULE_LICENSE("GPL"); | |
567 | MODULE_AUTHOR("Marek Szyprowski <m.szyprowski@samsung.com>"); | |
568 | MODULE_DESCRIPTION("LP3971 PMIC driver"); |