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Merge tag 'mailbox-v6.5' of git://git.linaro.org/landing-teams/working/fujitsu/integr...
[linux-block.git] / drivers / regulator / da9121-regulator.c
CommitLineData
e6ff10f2 1// SPDX-License-Identifier: GPL-2.0-only
c860476b
AW		 2//
3// DA9121 Single-channel dual-phase 10A buck converter
4//
5// Copyright (C) 2020 Axis Communications AB
6//
7// DA9130 Single-channel dual-phase 10A buck converter (Automotive)
8// DA9217 Single-channel dual-phase 6A buck converter
9// DA9122 Dual-channel single-phase 5A buck converter
10// DA9131 Dual-channel single-phase 5A buck converter (Automotive)
11// DA9220 Dual-channel single-phase 3A buck converter
12// DA9132 Dual-channel single-phase 3A buck converter (Automotive)
13//
14// Copyright (C) 2020 Dialog Semiconductor
e6ff10f2
VW		 15
16#include <linux/of_device.h>
46c413d5 17#include <linux/of_gpio.h>
b4b27776 18#include <linux/gpio/consumer.h>
e6ff10f2
VW		 19#include <linux/regulator/of_regulator.h>
20#include <linux/regulator/machine.h>
21#include <linux/regulator/driver.h>
22#include <linux/module.h>
23#include <linux/regmap.h>
24#include <linux/err.h>
25#include <linux/i2c.h>
c860476b 26#include <linux/regulator/da9121.h>
40bb5b02
AW		 27#include <linux/interrupt.h>
28#include <linux/workqueue.h>
c860476b 29
86f162c9 30#include "da9121-regulator.h"
e6ff10f2 31
f3fbd556
AW		 32/* Chip data */
33struct da9121 {
34 struct device *dev;
40bb5b02 35 struct delayed_work work;
46c413d5 36 struct da9121_pdata *pdata;
c860476b 37 struct regmap *regmap;
9929900d 38 struct regulator_dev *rdev[DA9121_IDX_MAX];
40bb5b02
AW		 39 unsigned int persistent[2];
40 unsigned int passive_delay;
41 int chip_irq;
f3fbd556 42 int variant_id;
013592be 43 int subvariant_id;
f3fbd556
AW		 44};
45
46c413d5
AW		 46/* Define ranges for different variants, enabling translation to/from
47 * registers. Maximums give scope to allow for transients.
48 */
49struct da9121_range {
50 int val_min;
51 int val_max;
52 int val_stp;
53 int reg_min;
54 int reg_max;
55};
56
c8dbf2f2 57static struct da9121_range da9121_10A_2phase_current = {
46c413d5
AW		 58 .val_min = 7000000,
59 .val_max = 20000000,
60 .val_stp = 1000000,
61 .reg_min = 1,
62 .reg_max = 14,
63};
64
c8dbf2f2 65static struct da9121_range da9121_6A_2phase_current = {
46c413d5
AW		 66 .val_min = 7000000,
67 .val_max = 12000000,
68 .val_stp = 1000000,
69 .reg_min = 1,
70 .reg_max = 6,
71};
72
c8dbf2f2 73static struct da9121_range da9121_5A_1phase_current = {
46c413d5
AW		 74 .val_min = 3500000,
75 .val_max = 10000000,
76 .val_stp = 500000,
77 .reg_min = 1,
78 .reg_max = 14,
79};
80
c8dbf2f2 81static struct da9121_range da9121_3A_1phase_current = {
46c413d5
AW		 82 .val_min = 3500000,
83 .val_max = 6000000,
84 .val_stp = 500000,
85 .reg_min = 1,
86 .reg_max = 6,
87};
88
c5187a24 89static struct da9121_range da914x_40A_4phase_current = {
f0fdfc04
AW		 90 .val_min = 26000000,
91 .val_max = 78000000,
92 .val_stp = 4000000,
c5187a24
AW		 93 .reg_min = 1,
94 .reg_max = 14,
95};
96
97static struct da9121_range da914x_20A_2phase_current = {
f0fdfc04
AW		 98 .val_min = 13000000,
99 .val_max = 39000000,
c5187a24
AW		 100 .val_stp = 2000000,
101 .reg_min = 1,
102 .reg_max = 14,
103};
104
46c413d5
AW		 105struct da9121_variant_info {
106 int num_bucks;
107 int num_phases;
108 struct da9121_range *current_range;
109};
110
111static const struct da9121_variant_info variant_parameters[] = {
112 { 1, 2, &da9121_10A_2phase_current }, //DA9121_TYPE_DA9121_DA9130
113 { 2, 1, &da9121_3A_1phase_current }, //DA9121_TYPE_DA9220_DA9132
114 { 2, 1, &da9121_5A_1phase_current }, //DA9121_TYPE_DA9122_DA9131
115 { 1, 2, &da9121_6A_2phase_current }, //DA9121_TYPE_DA9217
c5187a24
AW		 116 { 1, 4, &da914x_40A_4phase_current }, //DA9121_TYPE_DA9141
117 { 1, 2, &da914x_20A_2phase_current }, //DA9121_TYPE_DA9142
46c413d5
AW		 118};
119
5c4b62af
AW		 120struct da9121_field {
121 unsigned int reg;
122 unsigned int msk;
123};
124
125static const struct da9121_field da9121_current_field[2] = {
126 { DA9121_REG_BUCK_BUCK1_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
127 { DA9xxx_REG_BUCK_BUCK2_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
128};
129
65ac9704
AW		 130static const struct da9121_field da9121_mode_field[2] = {
131 { DA9121_REG_BUCK_BUCK1_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
132 { DA9xxx_REG_BUCK_BUCK2_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
133};
134
40bb5b02
AW		 135struct status_event_data {
136 int buck_id; /* 0=core, 1/2-buck */
137 int reg_index; /* index for status/event/mask register selection */
138 int status_bit; /* bit masks... */
139 int event_bit;
140 int mask_bit;
141 unsigned long notification; /* Notification for status inception */
142 char *warn; /* if NULL, notify - otherwise dev_warn this string */
143};
144
145#define DA9121_STATUS(id, bank, name, notification, warning) \
146 { id, bank, \
147 DA9121_MASK_SYS_STATUS_##bank##_##name, \
148 DA9121_MASK_SYS_EVENT_##bank##_E_##name, \
149 DA9121_MASK_SYS_MASK_##bank##_M_##name, \
150 notification, warning }
151
152/* For second buck related event bits that are specific to DA9122, DA9220 variants */
153#define DA9xxx_STATUS(id, bank, name, notification, warning) \
154 { id, bank, \
155 DA9xxx_MASK_SYS_STATUS_##bank##_##name, \
156 DA9xxx_MASK_SYS_EVENT_##bank##_E_##name, \
157 DA9xxx_MASK_SYS_MASK_##bank##_M_##name, \
158 notification, warning }
159
160/* The status signals that may need servicing, depending on device variant.
161 * After assertion, they persist; so event is notified, the IRQ disabled,
162 * and status polled until clear again and IRQ is reenabled.
163 *
164 * SG/PG1/PG2 should be set when device first powers up and should never
165 * re-occur. When this driver starts, it is expected that these will have
166 * self-cleared for when the IRQs are enabled, so these should never be seen.
167 * If seen, the implication is that the device has reset.
168 *
169 * GPIO0/1/2 are not configured for use by default, so should not be seen.
170 */
c8dbf2f2 171static const struct status_event_data status_event_handling[] = {
40bb5b02
AW		 172 DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"),
173 DA9121_STATUS(0, 0, TEMP_CRIT, (REGULATOR_EVENT_OVER_TEMP|REGULATOR_EVENT_DISABLE), NULL),
174 DA9121_STATUS(0, 0, TEMP_WARN, REGULATOR_EVENT_OVER_TEMP, NULL),
175 DA9121_STATUS(1, 1, PG1, 0, "Handled E_PG1\n"),
176 DA9121_STATUS(1, 1, OV1, REGULATOR_EVENT_REGULATION_OUT, NULL),
177 DA9121_STATUS(1, 1, UV1, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
178 DA9121_STATUS(1, 1, OC1, REGULATOR_EVENT_OVER_CURRENT, NULL),
179 DA9xxx_STATUS(2, 1, PG2, 0, "Handled E_PG2\n"),
180 DA9xxx_STATUS(2, 1, OV2, REGULATOR_EVENT_REGULATION_OUT, NULL),
181 DA9xxx_STATUS(2, 1, UV2, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
182 DA9xxx_STATUS(2, 1, OC2, REGULATOR_EVENT_OVER_CURRENT, NULL),
183 DA9121_STATUS(0, 2, GPIO0, 0, "Handled E_GPIO0\n"),
184 DA9121_STATUS(0, 2, GPIO1, 0, "Handled E_GPIO1\n"),
185 DA9121_STATUS(0, 2, GPIO2, 0, "Handled E_GPIO2\n"),
186};
187
5c4b62af
AW		 188static int da9121_get_current_limit(struct regulator_dev *rdev)
189{
190 struct da9121 *chip = rdev_get_drvdata(rdev);
191 int id = rdev_get_id(rdev);
192 struct da9121_range *range =
193 variant_parameters[chip->variant_id].current_range;
194 unsigned int val = 0;
195 int ret = 0;
196
197 ret = regmap_read(chip->regmap, da9121_current_field[id].reg, &val);
198 if (ret < 0) {
199 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
200 goto error;
201 }
202
203 if (val < range->reg_min) {
204 ret = -EACCES;
205 goto error;
206 }
207
208 if (val > range->reg_max) {
209 ret = -EINVAL;
210 goto error;
211 }
212
213 return range->val_min + (range->val_stp * (val - range->reg_min));
214error:
215 return ret;
216}
217
218static int da9121_ceiling_selector(struct regulator_dev *rdev,
219 int min, int max,
220 unsigned int *selector)
221{
222 struct da9121 *chip = rdev_get_drvdata(rdev);
223 struct da9121_range *range =
224 variant_parameters[chip->variant_id].current_range;
225 unsigned int level;
226 unsigned int i = 0;
227 unsigned int sel = 0;
228 int ret = 0;
229
230 if (range->val_min > max || range->val_max < min) {
231 dev_err(chip->dev,
232 "Requested current out of regulator capability\n");
233 ret = -EINVAL;
234 goto error;
235 }
236
237 level = range->val_max;
238 for (i = range->reg_max; i >= range->reg_min; i--) {
239 if (level <= max) {
240 sel = i;
241 break;
242 }
243 level -= range->val_stp;
244 }
245
246 if (level < min) {
247 dev_err(chip->dev,
248 "Best match falls below minimum requested current\n");
249 ret = -EINVAL;
250 goto error;
251 }
252
253 *selector = sel;
254error:
255 return ret;
256}
257
258static int da9121_set_current_limit(struct regulator_dev *rdev,
259 int min_ua, int max_ua)
260{
261 struct da9121 *chip = rdev_get_drvdata(rdev);
262 int id = rdev_get_id(rdev);
263 struct da9121_range *range =
264 variant_parameters[chip->variant_id].current_range;
265 unsigned int sel = 0;
266 int ret = 0;
267
268 if (min_ua < range->val_min ||
269 max_ua > range->val_max) {
270 ret = -EINVAL;
271 goto error;
272 }
273
24f08532
AW		 274 if (rdev->desc->ops->is_enabled(rdev)) {
275 ret = -EBUSY;
276 goto error;
277 }
278
5c4b62af
AW		 279 ret = da9121_ceiling_selector(rdev, min_ua, max_ua, &sel);
280 if (ret < 0)
281 goto error;
282
283 ret = regmap_update_bits(chip->regmap,
284 da9121_current_field[id].reg,
285 da9121_current_field[id].msk,
286 (unsigned int)sel);
287 if (ret < 0)
288 dev_err(chip->dev, "Cannot update BUCK current limit, err: %d\n", ret);
289
290error:
291 return ret;
292}
293
65ac9704
AW		 294static unsigned int da9121_map_mode(unsigned int mode)
295{
296 switch (mode) {
297 case DA9121_BUCK_MODE_FORCE_PWM:
298 return REGULATOR_MODE_FAST;
299 case DA9121_BUCK_MODE_FORCE_PWM_SHEDDING:
300 return REGULATOR_MODE_NORMAL;
301 case DA9121_BUCK_MODE_AUTO:
302 return REGULATOR_MODE_IDLE;
303 case DA9121_BUCK_MODE_FORCE_PFM:
304 return REGULATOR_MODE_STANDBY;
305 default:
0b1e5526 306 return REGULATOR_MODE_INVALID;
65ac9704
AW		 307 }
308}
309
310static int da9121_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
311{
312 struct da9121 *chip = rdev_get_drvdata(rdev);
313 int id = rdev_get_id(rdev);
314 unsigned int val;
315
316 switch (mode) {
317 case REGULATOR_MODE_FAST:
318 val = DA9121_BUCK_MODE_FORCE_PWM;
319 break;
320 case REGULATOR_MODE_NORMAL:
321 val = DA9121_BUCK_MODE_FORCE_PWM_SHEDDING;
322 break;
323 case REGULATOR_MODE_IDLE:
324 val = DA9121_BUCK_MODE_AUTO;
325 break;
326 case REGULATOR_MODE_STANDBY:
327 val = DA9121_BUCK_MODE_FORCE_PFM;
328 break;
329 default:
330 return -EINVAL;
331 }
332
333 return regmap_update_bits(chip->regmap,
334 da9121_mode_field[id].reg,
335 da9121_mode_field[id].msk,
336 val);
337}
338
339static unsigned int da9121_buck_get_mode(struct regulator_dev *rdev)
340{
341 struct da9121 *chip = rdev_get_drvdata(rdev);
342 int id = rdev_get_id(rdev);
0b1e5526 343 unsigned int val, mode;
65ac9704
AW		 344 int ret = 0;
345
346 ret = regmap_read(chip->regmap, da9121_mode_field[id].reg, &val);
347 if (ret < 0) {
348 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
349 return -EINVAL;
350 }
351
0b1e5526
AL		 352 mode = da9121_map_mode(val & da9121_mode_field[id].msk);
353 if (mode == REGULATOR_MODE_INVALID)
354 return -EINVAL;
355
356 return mode;
65ac9704
AW		 357}
358
e6ff10f2
VW		 359static const struct regulator_ops da9121_buck_ops = {
360 .enable = regulator_enable_regmap,
361 .disable = regulator_disable_regmap,
362 .is_enabled = regulator_is_enabled_regmap,
363 .set_voltage_sel = regulator_set_voltage_sel_regmap,
364 .get_voltage_sel = regulator_get_voltage_sel_regmap,
365 .list_voltage = regulator_list_voltage_linear,
5c4b62af
AW		 366 .get_current_limit = da9121_get_current_limit,
367 .set_current_limit = da9121_set_current_limit,
65ac9704
AW		 368 .set_mode = da9121_buck_set_mode,
369 .get_mode = da9121_buck_get_mode,
e6ff10f2
VW		 370};
371
91863239
AW		 372static struct of_regulator_match da9121_matches[] = {
373 [DA9121_IDX_BUCK1] = { .name = "buck1" },
374 [DA9121_IDX_BUCK2] = { .name = "buck2" },
375};
376
46c413d5
AW		 377static int da9121_of_parse_cb(struct device_node *np,
378 const struct regulator_desc *desc,
379 struct regulator_config *config)
380{
381 struct da9121 *chip = config->driver_data;
382 struct da9121_pdata *pdata;
383 struct gpio_desc *ena_gpiod;
384
385 if (chip->pdata == NULL) {
386 pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
387 if (!pdata)
388 return -ENOMEM;
389 } else {
390 pdata = chip->pdata;
391 }
392
393 pdata->num_buck++;
394
395 if (pdata->num_buck > variant_parameters[chip->variant_id].num_bucks) {
396 dev_err(chip->dev, "Error: excessive regulators for device\n");
397 return -ENODEV;
398 }
399
400 ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0,
401 GPIOD_OUT_HIGH |
402 GPIOD_FLAGS_BIT_NONEXCLUSIVE,
403 "da9121-enable");
404 if (!IS_ERR(ena_gpiod))
405 config->ena_gpiod = ena_gpiod;
406
407 if (variant_parameters[chip->variant_id].num_bucks == 2) {
408 uint32_t ripple_cancel;
409 uint32_t ripple_reg;
410 int ret;
411
9536ce63 412 if (of_property_read_u32(da9121_matches[pdata->num_buck-1].of_node,
46c413d5
AW		 413 "dlg,ripple-cancel", &ripple_cancel)) {
414 if (pdata->num_buck > 1)
415 ripple_reg = DA9xxx_REG_BUCK_BUCK2_7;
416 else
417 ripple_reg = DA9121_REG_BUCK_BUCK1_7;
418
419 ret = regmap_update_bits(chip->regmap, ripple_reg,
420 DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL,
421 ripple_cancel);
422 if (ret < 0)
423 dev_err(chip->dev, "Cannot set ripple mode, err: %d\n", ret);
424 }
425 }
426
427 return 0;
428}
429
c860476b
AW		 430#define DA9121_MIN_MV 300
431#define DA9121_MAX_MV 1900
432#define DA9121_STEP_MV 10
433#define DA9121_MIN_SEL (DA9121_MIN_MV / DA9121_STEP_MV)
434#define DA9121_N_VOLTAGES (((DA9121_MAX_MV - DA9121_MIN_MV) / DA9121_STEP_MV) \
435 + 1 + DA9121_MIN_SEL)
436
e6ff10f2 437static const struct regulator_desc da9121_reg = {
91863239 438 .id = DA9121_IDX_BUCK1,
e6ff10f2
VW		 439 .name = "da9121",
440 .of_match = "buck1",
46c413d5 441 .of_parse_cb = da9121_of_parse_cb,
e6ff10f2 442 .owner = THIS_MODULE,
91863239 443 .regulators_node = of_match_ptr("regulators"),
65ac9704 444 .of_map_mode = da9121_map_mode,
e6ff10f2
VW		 445 .ops = &da9121_buck_ops,
446 .type = REGULATOR_VOLTAGE,
447 .n_voltages = DA9121_N_VOLTAGES,
448 .min_uV = DA9121_MIN_MV * 1000,
449 .uV_step = DA9121_STEP_MV * 1000,
450 .linear_min_sel = DA9121_MIN_SEL,
86f162c9
AW		 451 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
452 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
453 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
454 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
e6ff10f2
VW		 455 /* Default value of BUCK_BUCK1_0.CH1_SRC_DVC_UP */
456 .ramp_delay = 20000,
457 /* tBUCK_EN */
458 .enable_time = 20,
459};
460
91863239
AW		 461static const struct regulator_desc da9220_reg[2] = {
462 {
463 .id = DA9121_IDX_BUCK1,
464 .name = "DA9220/DA9132 BUCK1",
465 .of_match = "buck1",
46c413d5 466 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 467 .owner = THIS_MODULE,
468 .regulators_node = of_match_ptr("regulators"),
65ac9704 469 .of_map_mode = da9121_map_mode,
91863239
AW		 470 .ops = &da9121_buck_ops,
471 .type = REGULATOR_VOLTAGE,
472 .n_voltages = DA9121_N_VOLTAGES,
473 .min_uV = DA9121_MIN_MV * 1000,
474 .uV_step = DA9121_STEP_MV * 1000,
475 .linear_min_sel = DA9121_MIN_SEL,
476 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
477 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
478 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
479 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
480 },
481 {
482 .id = DA9121_IDX_BUCK2,
483 .name = "DA9220/DA9132 BUCK2",
484 .of_match = "buck2",
46c413d5 485 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 486 .owner = THIS_MODULE,
487 .regulators_node = of_match_ptr("regulators"),
65ac9704 488 .of_map_mode = da9121_map_mode,
91863239
AW		 489 .ops = &da9121_buck_ops,
490 .type = REGULATOR_VOLTAGE,
491 .n_voltages = DA9121_N_VOLTAGES,
492 .min_uV = DA9121_MIN_MV * 1000,
493 .uV_step = DA9121_STEP_MV * 1000,
494 .linear_min_sel = DA9121_MIN_SEL,
495 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
496 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
497 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
498 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
499 }
500};
501
502static const struct regulator_desc da9122_reg[2] = {
503 {
504 .id = DA9121_IDX_BUCK1,
505 .name = "DA9122/DA9131 BUCK1",
506 .of_match = "buck1",
46c413d5 507 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 508 .owner = THIS_MODULE,
509 .regulators_node = of_match_ptr("regulators"),
65ac9704 510 .of_map_mode = da9121_map_mode,
91863239
AW		 511 .ops = &da9121_buck_ops,
512 .type = REGULATOR_VOLTAGE,
513 .n_voltages = DA9121_N_VOLTAGES,
514 .min_uV = DA9121_MIN_MV * 1000,
515 .uV_step = DA9121_STEP_MV * 1000,
516 .linear_min_sel = DA9121_MIN_SEL,
517 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
518 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
519 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
520 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
521 },
522 {
523 .id = DA9121_IDX_BUCK2,
524 .name = "DA9122/DA9131 BUCK2",
525 .of_match = "buck2",
46c413d5 526 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 527 .owner = THIS_MODULE,
528 .regulators_node = of_match_ptr("regulators"),
65ac9704 529 .of_map_mode = da9121_map_mode,
91863239
AW		 530 .ops = &da9121_buck_ops,
531 .type = REGULATOR_VOLTAGE,
532 .n_voltages = DA9121_N_VOLTAGES,
533 .min_uV = DA9121_MIN_MV * 1000,
534 .uV_step = DA9121_STEP_MV * 1000,
535 .linear_min_sel = DA9121_MIN_SEL,
536 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
537 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
538 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
539 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
540 }
541};
542
543static const struct regulator_desc da9217_reg = {
544 .id = DA9121_IDX_BUCK1,
545 .name = "DA9217 BUCK1",
546 .of_match = "buck1",
46c413d5 547 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 548 .owner = THIS_MODULE,
549 .regulators_node = of_match_ptr("regulators"),
65ac9704 550 .of_map_mode = da9121_map_mode,
91863239
AW		 551 .ops = &da9121_buck_ops,
552 .type = REGULATOR_VOLTAGE,
553 .n_voltages = DA9121_N_VOLTAGES,
554 .min_uV = DA9121_MIN_MV * 1000,
555 .uV_step = DA9121_STEP_MV * 1000,
556 .linear_min_sel = DA9121_MIN_SEL,
557 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
558 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
559 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
560 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
561};
562
c5187a24 563#define DA914X_MIN_MV 500
c8c57fbc 564#define DA914X_MAX_MV 1300
c5187a24
AW		 565#define DA914X_STEP_MV 10
566#define DA914X_MIN_SEL (DA914X_MIN_MV / DA914X_STEP_MV)
567#define DA914X_N_VOLTAGES (((DA914X_MAX_MV - DA914X_MIN_MV) / DA914X_STEP_MV) \
568 + 1 + DA914X_MIN_SEL)
569
570static const struct regulator_desc da9141_reg = {
571 .id = DA9121_IDX_BUCK1,
572 .name = "DA9141",
573 .of_match = "buck1",
574 .of_parse_cb = da9121_of_parse_cb,
575 .owner = THIS_MODULE,
576 .regulators_node = of_match_ptr("regulators"),
577 .of_map_mode = da9121_map_mode,
578 .ops = &da9121_buck_ops,
579 .type = REGULATOR_VOLTAGE,
580 .n_voltages = DA914X_N_VOLTAGES,
581 .min_uV = DA914X_MIN_MV * 1000,
582 .uV_step = DA914X_STEP_MV * 1000,
583 .linear_min_sel = DA914X_MIN_SEL,
584 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
585 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
586 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
587 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
c5187a24
AW		 588};
589
590static const struct regulator_desc da9142_reg = {
591 .id = DA9121_IDX_BUCK1,
592 .name = "DA9142 BUCK1",
593 .of_match = "buck1",
594 .of_parse_cb = da9121_of_parse_cb,
595 .owner = THIS_MODULE,
596 .regulators_node = of_match_ptr("regulators"),
597 .of_map_mode = da9121_map_mode,
598 .ops = &da9121_buck_ops,
599 .type = REGULATOR_VOLTAGE,
600 .n_voltages = DA914X_N_VOLTAGES,
601 .min_uV = DA914X_MIN_MV * 1000,
602 .uV_step = DA914X_STEP_MV * 1000,
603 .linear_min_sel = DA914X_MIN_SEL,
604 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
605 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
606 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
607 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
608};
609
610
91863239
AW		 611static const struct regulator_desc *local_da9121_regulators[][DA9121_IDX_MAX] = {
612 [DA9121_TYPE_DA9121_DA9130] = { &da9121_reg, NULL },
613 [DA9121_TYPE_DA9220_DA9132] = { &da9220_reg[0], &da9220_reg[1] },
614 [DA9121_TYPE_DA9122_DA9131] = { &da9122_reg[0], &da9122_reg[1] },
615 [DA9121_TYPE_DA9217] = { &da9217_reg, NULL },
c5187a24
AW		 616 [DA9121_TYPE_DA9141] = { &da9141_reg, NULL },
617 [DA9121_TYPE_DA9142] = { &da9142_reg, NULL },
91863239
AW		 618};
619
40bb5b02
AW		 620static void da9121_status_poll_on(struct work_struct *work)
621{
622 struct da9121 *chip = container_of(work, struct da9121, work.work);
623 int status[3] = {0};
624 int clear[3] = {0};
625 unsigned long delay;
626 int i;
627 int ret;
628
629 ret = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_STATUS_0, status, 2);
630 if (ret < 0) {
631 dev_err(chip->dev,
632 "Failed to read STATUS registers: %d\n", ret);
633 goto error;
634 }
635
636 /* Possible events are tested to be within range for the variant, potentially
637 * masked by the IRQ handler (not just warned about), as having been masked,
638 * and the respective state cleared - then flagged to unmask for next IRQ.
639 */
640 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
641 const struct status_event_data *item = &status_event_handling[i];
642 int reg_idx = item->reg_index;
643 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
644 bool supported = (item->warn == NULL);
645 bool persisting = (chip->persistent[reg_idx] & item->event_bit);
646 bool now_cleared = !(status[reg_idx] & item->status_bit);
647
648 if (relevant && supported && persisting && now_cleared) {
649 clear[reg_idx] |= item->mask_bit;
650 chip->persistent[reg_idx] &= ~item->event_bit;
651 }
652 }
653
654 for (i = 0; i < 2; i++) {
655 if (clear[i]) {
656 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
657 unsigned int mbit = clear[i];
658
659 ret = regmap_update_bits(chip->regmap, reg, mbit, 0);
660 if (ret < 0) {
661 dev_err(chip->dev,
662 "Failed to unmask 0x%02x %d\n",
663 reg, ret);
664 goto error;
665 }
666 }
667 }
668
669 if (chip->persistent[0] | chip->persistent[1]) {
670 delay = msecs_to_jiffies(chip->passive_delay);
671 queue_delayed_work(system_freezable_wq, &chip->work, delay);
672 }
673
674error:
675 return;
676}
677
678static irqreturn_t da9121_irq_handler(int irq, void *data)
679{
680 struct da9121 *chip = data;
681 struct regulator_dev *rdev;
682 int event[3] = {0};
683 int handled[3] = {0};
684 int mask[3] = {0};
685 int ret = IRQ_NONE;
686 int i;
687 int err;
688
689 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_EVENT_0, event, 3);
690 if (err < 0) {
691 dev_err(chip->dev, "Failed to read EVENT registers %d\n", err);
692 ret = IRQ_NONE;
693 goto error;
694 }
695
696 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_MASK_0, mask, 3);
697 if (err < 0) {
698 dev_err(chip->dev,
699 "Failed to read MASK registers: %d\n", ret);
700 ret = IRQ_NONE;
701 goto error;
702 }
703
704 rdev = chip->rdev[DA9121_IDX_BUCK1];
705
706 /* Possible events are tested to be within range for the variant, currently
707 * enabled, and having triggered this IRQ. The event may then be notified,
708 * or a warning given for unexpected events - those from device POR, and
709 * currently unsupported GPIO configurations.
710 */
711 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
712 const struct status_event_data *item = &status_event_handling[i];
713 int reg_idx = item->reg_index;
714 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
715 bool enabled = !(mask[reg_idx] & item->mask_bit);
716 bool active = (event[reg_idx] & item->event_bit);
717 bool notify = (item->warn == NULL);
718
719 if (relevant && enabled && active) {
720 if (notify) {
721 chip->persistent[reg_idx] |= item->event_bit;
722 regulator_notifier_call_chain(rdev, item->notification, NULL);
723 } else {
724 dev_warn(chip->dev, item->warn);
725 handled[reg_idx] |= item->event_bit;
726 ret = IRQ_HANDLED;
727 }
728 }
729 }
730
731 for (i = 0; i < 3; i++) {
732 if (event[i] != handled[i]) {
733 dev_warn(chip->dev,
734 "Unhandled event(s) in bank%d 0x%02x\n", i,
735 event[i] ^ handled[i]);
736 }
737 }
738
739 /* Mask the interrupts for persistent events OV, OC, UV, WARN, CRIT */
740 for (i = 0; i < 2; i++) {
741 if (handled[i]) {
742 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
743 unsigned int mbit = handled[i];
744
745 err = regmap_update_bits(chip->regmap, reg, mbit, mbit);
746 if (err < 0) {
747 dev_err(chip->dev,
748 "Failed to mask 0x%02x interrupt %d\n",
749 reg, err);
750 ret = IRQ_NONE;
751 goto error;
752 }
753 }
754 }
755
756 /* clear the events */
757 if (handled[0] | handled[1] | handled[2]) {
758 err = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_EVENT_0, handled, 3);
759 if (err < 0) {
760 dev_err(chip->dev, "Fail to write EVENTs %d\n", err);
761 ret = IRQ_NONE;
762 goto error;
763 }
764 }
765
766 queue_delayed_work(system_freezable_wq, &chip->work, 0);
767error:
768 return ret;
769}
770
9929900d
AW		 771static int da9121_set_regulator_config(struct da9121 *chip)
772{
773 struct regulator_config config = { };
774 unsigned int max_matches = variant_parameters[chip->variant_id].num_bucks;
775 int ret = 0;
776 int i;
777
778 for (i = 0; i < max_matches; i++) {
779 const struct regulator_desc *regl_desc =
780 local_da9121_regulators[chip->variant_id][i];
781
782 config.dev = chip->dev;
783 config.driver_data = chip;
784 config.regmap = chip->regmap;
785
786 chip->rdev[i] = devm_regulator_register(chip->dev,
787 regl_desc, &config);
788 if (IS_ERR(chip->rdev[i])) {
789 dev_err(chip->dev, "Failed to register regulator %s, %d/%d\n",
790 regl_desc->name, (i+1), max_matches);
791 ret = PTR_ERR(chip->rdev[i]);
792 goto error;
793 }
794 }
795
796error:
797 return ret;
798}
799
c860476b
AW		 800/* DA9121 chip register model */
801static const struct regmap_range da9121_1ch_readable_ranges[] = {
802 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
803 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
804 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
805 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
806 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
807};
808
809static const struct regmap_access_table da9121_1ch_readable_table = {
810 .yes_ranges = da9121_1ch_readable_ranges,
811 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_readable_ranges),
812};
813
814static const struct regmap_range da9121_2ch_readable_ranges[] = {
815 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
816 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
817 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
818 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_7),
819 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_7),
820 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
821};
822
823static const struct regmap_access_table da9121_2ch_readable_table = {
824 .yes_ranges = da9121_2ch_readable_ranges,
825 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_readable_ranges),
826};
827
828static const struct regmap_range da9121_1ch_writeable_ranges[] = {
829 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
830 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
831 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
832 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
833 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_6),
834};
835
836static const struct regmap_access_table da9121_1ch_writeable_table = {
837 .yes_ranges = da9121_1ch_writeable_ranges,
838 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_writeable_ranges),
839};
840
841static const struct regmap_range da9121_2ch_writeable_ranges[] = {
842 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
843 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
844 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
845 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
846 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_7),
847 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_2),
848 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_4, DA9xxx_REG_BUCK_BUCK2_7),
849};
850
851static const struct regmap_access_table da9121_2ch_writeable_table = {
852 .yes_ranges = da9121_2ch_writeable_ranges,
853 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_writeable_ranges),
854};
855
856
857static const struct regmap_range da9121_volatile_ranges[] = {
858 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2),
859 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
860 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
861};
862
863static const struct regmap_access_table da9121_volatile_table = {
864 .yes_ranges = da9121_volatile_ranges,
865 .n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges),
866};
867
868/* DA9121 regmap config for 1 channel variants */
869static struct regmap_config da9121_1ch_regmap_config = {
870 .reg_bits = 8,
871 .val_bits = 8,
872 .max_register = DA9121_REG_OTP_CONFIG_ID,
873 .rd_table = &da9121_1ch_readable_table,
874 .wr_table = &da9121_1ch_writeable_table,
875 .volatile_table = &da9121_volatile_table,
876 .cache_type = REGCACHE_RBTREE,
877};
878
879/* DA9121 regmap config for 2 channel variants */
880static struct regmap_config da9121_2ch_regmap_config = {
881 .reg_bits = 8,
882 .val_bits = 8,
883 .max_register = DA9121_REG_OTP_CONFIG_ID,
884 .rd_table = &da9121_2ch_readable_table,
885 .wr_table = &da9121_2ch_writeable_table,
886 .volatile_table = &da9121_volatile_table,
887 .cache_type = REGCACHE_RBTREE,
888};
889
890static int da9121_check_device_type(struct i2c_client *i2c, struct da9121 *chip)
891{
892 u32 device_id;
c860476b
AW		 893 u32 variant_id;
894 u8 variant_mrc, variant_vrc;
895 char *type;
c860476b
AW		 896 bool config_match = false;
897 int ret = 0;
898
899 ret = regmap_read(chip->regmap, DA9121_REG_OTP_DEVICE_ID, &device_id);
900 if (ret < 0) {
901 dev_err(chip->dev, "Cannot read device ID: %d\n", ret);
902 goto error;
903 }
904
905 ret = regmap_read(chip->regmap, DA9121_REG_OTP_VARIANT_ID, &variant_id);
906 if (ret < 0) {
907 dev_err(chip->dev, "Cannot read variant ID: %d\n", ret);
908 goto error;
909 }
910
c5187a24 911 if ((device_id != DA9121_DEVICE_ID) && (device_id != DA914x_DEVICE_ID)) {
c860476b
AW		 912 dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
913 ret = -ENODEV;
914 goto error;
915 }
916
917 variant_vrc = variant_id & DA9121_MASK_OTP_VARIANT_ID_VRC;
918
013592be
AW		 919 switch (chip->subvariant_id) {
920 case DA9121_SUBTYPE_DA9121:
921 type = "DA9121";
922 config_match = (variant_vrc == DA9121_VARIANT_VRC);
c860476b 923 break;
013592be
AW		 924 case DA9121_SUBTYPE_DA9130:
925 type = "DA9130";
926 config_match = (variant_vrc == DA9130_VARIANT_VRC);
c860476b 927 break;
013592be
AW		 928 case DA9121_SUBTYPE_DA9220:
929 type = "DA9220";
930 config_match = (variant_vrc == DA9220_VARIANT_VRC);
c860476b 931 break;
013592be
AW		 932 case DA9121_SUBTYPE_DA9132:
933 type = "DA9132";
934 config_match = (variant_vrc == DA9132_VARIANT_VRC);
935 break;
936 case DA9121_SUBTYPE_DA9122:
937 type = "DA9122";
938 config_match = (variant_vrc == DA9122_VARIANT_VRC);
939 break;
940 case DA9121_SUBTYPE_DA9131:
941 type = "DA9131";
942 config_match = (variant_vrc == DA9131_VARIANT_VRC);
943 break;
944 case DA9121_SUBTYPE_DA9217:
c860476b 945 type = "DA9217";
013592be 946 config_match = (variant_vrc == DA9217_VARIANT_VRC);
c860476b
AW		 947 break;
948 default:
949 type = "Unknown";
950 break;
951 }
952
c5187a24
AW		 953 if (device_id == DA914x_DEVICE_ID) {
954 switch (chip->subvariant_id) {
955 case DA9121_SUBTYPE_DA9141:
956 type = "DA9141";
957 config_match = (variant_vrc == DA9141_VARIANT_VRC);
958 break;
959 case DA9121_SUBTYPE_DA9142:
960 type = "DA9142";
961 config_match = (variant_vrc == DA9142_VARIANT_VRC);
962 break;
963 default:
964 type = "Unknown";
965 break;
966 }
967 }
968
c860476b
AW		 969 dev_info(chip->dev,
970 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n",
971 device_id, variant_id, type);
972
973 if (!config_match) {
416c29e9 974 dev_err(chip->dev, "Device tree configuration does not match detected device.\n");
c860476b
AW		 975 ret = -EINVAL;
976 goto error;
977 }
978
979 variant_mrc = (variant_id & DA9121_MASK_OTP_VARIANT_ID_MRC)
980 >> DA9121_SHIFT_OTP_VARIANT_ID_MRC;
981
c5187a24
AW		 982 if (((device_id == DA9121_DEVICE_ID) &&
983 (variant_mrc < DA9121_VARIANT_MRC_BASE)) ||
984 ((device_id == DA914x_DEVICE_ID) &&
985 (variant_mrc != DA914x_VARIANT_MRC_BASE))) {
c860476b
AW		 986 dev_err(chip->dev,
987 "Cannot support variant MRC: 0x%02X\n", variant_mrc);
988 ret = -EINVAL;
989 }
990error:
991 return ret;
992}
993
994static int da9121_assign_chip_model(struct i2c_client *i2c,
995 struct da9121 *chip)
996{
997 struct regmap_config *regmap;
998 int ret = 0;
999
1000 chip->dev = &i2c->dev;
1001
013592be
AW		 1002 /* Use configured subtype to select the regulator descriptor index and
1003 * register map, common to both consumer and automotive grade variants
1004 */
1005 switch (chip->subvariant_id) {
1006 case DA9121_SUBTYPE_DA9121:
1007 case DA9121_SUBTYPE_DA9130:
1008 chip->variant_id = DA9121_TYPE_DA9121_DA9130;
c860476b
AW		 1009 regmap = &da9121_1ch_regmap_config;
1010 break;
013592be
AW		 1011 case DA9121_SUBTYPE_DA9217:
1012 chip->variant_id = DA9121_TYPE_DA9217;
1013 regmap = &da9121_1ch_regmap_config;
1014 break;
1015 case DA9121_SUBTYPE_DA9122:
1016 case DA9121_SUBTYPE_DA9131:
1017 chip->variant_id = DA9121_TYPE_DA9122_DA9131;
1018 regmap = &da9121_2ch_regmap_config;
1019 break;
1020 case DA9121_SUBTYPE_DA9220:
1021 case DA9121_SUBTYPE_DA9132:
1022 chip->variant_id = DA9121_TYPE_DA9220_DA9132;
c860476b
AW		 1023 regmap = &da9121_2ch_regmap_config;
1024 break;
c5187a24
AW		 1025 case DA9121_SUBTYPE_DA9141:
1026 chip->variant_id = DA9121_TYPE_DA9141;
1027 regmap = &da9121_1ch_regmap_config;
1028 break;
1029 case DA9121_SUBTYPE_DA9142:
1030 chip->variant_id = DA9121_TYPE_DA9142;
1031 regmap = &da9121_2ch_regmap_config;
1032 break;
bab76514
WY		 1033 default:
1034 return -EINVAL;
c860476b
AW		 1035 }
1036
91863239
AW		 1037 /* Set these up for of_regulator_match call which may want .of_map_modes */
1038 da9121_matches[0].desc = local_da9121_regulators[chip->variant_id][0];
1039 da9121_matches[1].desc = local_da9121_regulators[chip->variant_id][1];
1040
c860476b
AW		 1041 chip->regmap = devm_regmap_init_i2c(i2c, regmap);
1042 if (IS_ERR(chip->regmap)) {
1043 ret = PTR_ERR(chip->regmap);
1044 dev_err(chip->dev, "Failed to configure a register map: %d\n",
1045 ret);
8db06423 1046 return ret;
c860476b
AW		 1047 }
1048
1049 ret = da9121_check_device_type(i2c, chip);
1050
1051 return ret;
1052}
1053
40bb5b02
AW		 1054static int da9121_config_irq(struct i2c_client *i2c,
1055 struct da9121 *chip)
1056{
1057 unsigned int p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
1058 const int mask_all[4] = { 0, 0, 0xFF, 0xFF };
1059 int ret = 0;
1060
1061 chip->chip_irq = i2c->irq;
1062
1063 if (chip->chip_irq != 0) {
1064 if (!of_property_read_u32(chip->dev->of_node,
1065 "dlg,irq-polling-delay-passive-ms",
1066 &p_delay)) {
1067 if (p_delay < DA9121_MIN_POLLING_PERIOD_MS ||
1068 p_delay > DA9121_MAX_POLLING_PERIOD_MS) {
1069 dev_warn(chip->dev,
1070 "Out-of-range polling period %d ms\n",
1071 p_delay);
1072 p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
1073 }
1074 }
1075
1076 chip->passive_delay = p_delay;
1077
5e191d2e 1078 ret = request_threaded_irq(chip->chip_irq, NULL,
40bb5b02
AW		 1079 da9121_irq_handler,
1080 IRQF_TRIGGER_LOW|IRQF_ONESHOT,
1081 "da9121", chip);
1082 if (ret != 0) {
1083 dev_err(chip->dev, "Failed IRQ request: %d\n",
1084 chip->chip_irq);
1085 goto error;
1086 }
1087
1088 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1089 if (ret != 0) {
1090 dev_err(chip->dev, "Failed to set IRQ masks: %d\n",
1091 ret);
5e191d2e 1092 goto regmap_error;
40bb5b02
AW		 1093 }
1094
1095 INIT_DELAYED_WORK(&chip->work, da9121_status_poll_on);
1096 dev_info(chip->dev, "Interrupt polling period set at %d ms\n",
1097 chip->passive_delay);
1098 }
1099error:
1100 return ret;
5e191d2e
AW		 1101regmap_error:
1102 free_irq(chip->chip_irq, chip);
1103 return ret;
40bb5b02
AW		 1104}
1105
e6ff10f2 1106static const struct of_device_id da9121_dt_ids[] = {
013592be
AW		 1107 { .compatible = "dlg,da9121", .data = (void *) DA9121_SUBTYPE_DA9121 },
1108 { .compatible = "dlg,da9130", .data = (void *) DA9121_SUBTYPE_DA9130 },
1109 { .compatible = "dlg,da9217", .data = (void *) DA9121_SUBTYPE_DA9217 },
1110 { .compatible = "dlg,da9122", .data = (void *) DA9121_SUBTYPE_DA9122 },
1111 { .compatible = "dlg,da9131", .data = (void *) DA9121_SUBTYPE_DA9131 },
1112 { .compatible = "dlg,da9220", .data = (void *) DA9121_SUBTYPE_DA9220 },
1113 { .compatible = "dlg,da9132", .data = (void *) DA9121_SUBTYPE_DA9132 },
c5187a24
AW		 1114 { .compatible = "dlg,da9141", .data = (void *) DA9121_SUBTYPE_DA9141 },
1115 { .compatible = "dlg,da9142", .data = (void *) DA9121_SUBTYPE_DA9142 },
e6ff10f2
VW		 1116 { }
1117};
1118MODULE_DEVICE_TABLE(of, da9121_dt_ids);
1119
f3fbd556
AW		 1120static inline int da9121_of_get_id(struct device *dev)
1121{
1122 const struct of_device_id *id = of_match_device(da9121_dt_ids, dev);
1123
1124 if (!id) {
1125 dev_err(dev, "%s: Failed\n", __func__);
1126 return -EINVAL;
1127 }
1128 return (uintptr_t)id->data;
1129}
1130
020cf73b 1131static int da9121_i2c_probe(struct i2c_client *i2c)
e6ff10f2 1132{
f3fbd556 1133 struct da9121 *chip;
40bb5b02 1134 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
f3fbd556 1135 int ret = 0;
e6ff10f2 1136
f3fbd556
AW		 1137 chip = devm_kzalloc(&i2c->dev, sizeof(struct da9121), GFP_KERNEL);
1138 if (!chip) {
1139 ret = -ENOMEM;
1140 goto error;
1141 }
1142
46c413d5 1143 chip->pdata = i2c->dev.platform_data;
013592be 1144 chip->subvariant_id = da9121_of_get_id(&i2c->dev);
f3fbd556 1145
c860476b
AW		 1146 ret = da9121_assign_chip_model(i2c, chip);
1147 if (ret < 0)
1148 goto error;
e6ff10f2 1149
40bb5b02
AW		 1150 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1151 if (ret != 0) {
1152 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1153 goto error;
1154 }
1155
9929900d 1156 ret = da9121_set_regulator_config(chip);
40bb5b02
AW		 1157 if (ret < 0)
1158 goto error;
1159
1160 ret = da9121_config_irq(i2c, chip);
e6ff10f2 1161
f3fbd556
AW		 1162error:
1163 return ret;
e6ff10f2
VW		 1164}
1165
ed5c2f5f 1166static void da9121_i2c_remove(struct i2c_client *i2c)
40bb5b02
AW		 1167{
1168 struct da9121 *chip = i2c_get_clientdata(i2c);
1169 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
4950486c 1170 int ret;
40bb5b02 1171
5e191d2e 1172 free_irq(chip->chip_irq, chip);
40bb5b02
AW		 1173 cancel_delayed_work_sync(&chip->work);
1174
1175 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1176 if (ret != 0)
1177 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
40bb5b02
AW		 1178}
1179
e6ff10f2 1180static const struct i2c_device_id da9121_i2c_id[] = {
f3fbd556
AW		 1181 {"da9121", DA9121_TYPE_DA9121_DA9130},
1182 {"da9130", DA9121_TYPE_DA9121_DA9130},
1183 {"da9217", DA9121_TYPE_DA9217},
1184 {"da9122", DA9121_TYPE_DA9122_DA9131},
1185 {"da9131", DA9121_TYPE_DA9122_DA9131},
1186 {"da9220", DA9121_TYPE_DA9220_DA9132},
1187 {"da9132", DA9121_TYPE_DA9220_DA9132},
c5187a24
AW		 1188 {"da9141", DA9121_TYPE_DA9141},
1189 {"da9142", DA9121_TYPE_DA9142},
e6ff10f2
VW		 1190 {},
1191};
1192MODULE_DEVICE_TABLE(i2c, da9121_i2c_id);
1193
1194static struct i2c_driver da9121_regulator_driver = {
1195 .driver = {
1196 .name = "da9121",
46600ab1 1197 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
e6ff10f2
VW		 1198 .of_match_table = of_match_ptr(da9121_dt_ids),
1199 },
964e1865 1200 .probe = da9121_i2c_probe,
40bb5b02 1201 .remove = da9121_i2c_remove,
e6ff10f2
VW		 1202 .id_table = da9121_i2c_id,
1203};
1204
1205module_i2c_driver(da9121_regulator_driver);
1206
1207MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)