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fd2f02f9 AL |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // da9052-regulator.c: Regulator driver for DA9052 | |
4 | // | |
5 | // Copyright(c) 2011 Dialog Semiconductor Ltd. | |
6 | // | |
7 | // Author: David Dajun Chen <dchen@diasemi.com> | |
08bf1c0a AJ |
8 | |
9 | #include <linux/module.h> | |
10 | #include <linux/moduleparam.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/err.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/regulator/driver.h> | |
15 | #include <linux/regulator/machine.h> | |
cd22a965 | 16 | #include <linux/of.h> |
88c84c14 | 17 | #include <linux/regulator/of_regulator.h> |
08bf1c0a AJ |
18 | |
19 | #include <linux/mfd/da9052/da9052.h> | |
20 | #include <linux/mfd/da9052/reg.h> | |
21 | #include <linux/mfd/da9052/pdata.h> | |
22 | ||
23 | /* Buck step size */ | |
24 | #define DA9052_BUCK_PERI_3uV_STEP 100000 | |
25 | #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 | |
26 | #define DA9052_CONST_3uV 3000000 | |
27 | ||
28 | #define DA9052_MIN_UA 0 | |
29 | #define DA9052_MAX_UA 3 | |
30 | #define DA9052_CURRENT_RANGE 4 | |
31 | ||
32 | /* Bit masks */ | |
33 | #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c | |
34 | #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 | |
35 | ||
9210f05b AL |
36 | /* DA9052 REGULATOR IDs */ |
37 | #define DA9052_ID_BUCK1 0 | |
38 | #define DA9052_ID_BUCK2 1 | |
39 | #define DA9052_ID_BUCK3 2 | |
40 | #define DA9052_ID_BUCK4 3 | |
41 | #define DA9052_ID_LDO1 4 | |
42 | #define DA9052_ID_LDO2 5 | |
43 | #define DA9052_ID_LDO3 6 | |
44 | #define DA9052_ID_LDO4 7 | |
45 | #define DA9052_ID_LDO5 8 | |
46 | #define DA9052_ID_LDO6 9 | |
47 | #define DA9052_ID_LDO7 10 | |
48 | #define DA9052_ID_LDO8 11 | |
49 | #define DA9052_ID_LDO9 12 | |
50 | #define DA9052_ID_LDO10 13 | |
51 | ||
08bf1c0a AJ |
52 | static const u32 da9052_current_limits[3][4] = { |
53 | {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ | |
54 | {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ | |
55 | {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, | |
56 | * BUCK-MEM and BUCK-PERI | |
57 | */ | |
58 | }; | |
59 | ||
60 | struct da9052_regulator_info { | |
61 | struct regulator_desc reg_desc; | |
62 | int step_uV; | |
63 | int min_uV; | |
64 | int max_uV; | |
d706b1e4 | 65 | unsigned char activate_bit; |
08bf1c0a AJ |
66 | }; |
67 | ||
68 | struct da9052_regulator { | |
69 | struct da9052 *da9052; | |
70 | struct da9052_regulator_info *info; | |
71 | struct regulator_dev *rdev; | |
72 | }; | |
73 | ||
74 | static int verify_range(struct da9052_regulator_info *info, | |
75 | int min_uV, int max_uV) | |
76 | { | |
77 | if (min_uV > info->max_uV || max_uV < info->min_uV) | |
78 | return -EINVAL; | |
79 | ||
80 | return 0; | |
81 | } | |
82 | ||
08bf1c0a AJ |
83 | static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) |
84 | { | |
85 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
86 | int offset = rdev_get_id(rdev); | |
87 | int ret, row = 2; | |
88 | ||
89 | ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); | |
90 | if (ret < 0) | |
91 | return ret; | |
92 | ||
93 | /* Determine the even or odd position of the buck current limit | |
94 | * register field | |
95 | */ | |
96 | if (offset % 2 == 0) | |
97 | ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; | |
98 | else | |
99 | ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; | |
100 | ||
101 | /* Select the appropriate current limit range */ | |
102 | if (regulator->da9052->chip_id == DA9052) | |
103 | row = 0; | |
104 | else if (offset == 0) | |
105 | row = 1; | |
106 | ||
107 | return da9052_current_limits[row][ret]; | |
108 | } | |
109 | ||
110 | static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, | |
111 | int max_uA) | |
112 | { | |
113 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
114 | int offset = rdev_get_id(rdev); | |
115 | int reg_val = 0; | |
116 | int i, row = 2; | |
117 | ||
118 | /* Select the appropriate current limit range */ | |
119 | if (regulator->da9052->chip_id == DA9052) | |
120 | row = 0; | |
121 | else if (offset == 0) | |
122 | row = 1; | |
123 | ||
19d23c21 | 124 | for (i = DA9052_CURRENT_RANGE - 1; i >= 0; i--) { |
1e369bcd AL |
125 | if ((min_uA <= da9052_current_limits[row][i]) && |
126 | (da9052_current_limits[row][i] <= max_uA)) { | |
08bf1c0a AJ |
127 | reg_val = i; |
128 | break; | |
129 | } | |
130 | } | |
131 | ||
1e369bcd AL |
132 | if (i < 0) |
133 | return -EINVAL; | |
134 | ||
08bf1c0a AJ |
135 | /* Determine the even or odd position of the buck current limit |
136 | * register field | |
137 | */ | |
138 | if (offset % 2 == 0) | |
139 | return da9052_reg_update(regulator->da9052, | |
140 | DA9052_BUCKA_REG + offset/2, | |
141 | DA9052_BUCK_ILIM_MASK_EVEN, | |
142 | reg_val << 2); | |
143 | else | |
144 | return da9052_reg_update(regulator->da9052, | |
145 | DA9052_BUCKA_REG + offset/2, | |
146 | DA9052_BUCK_ILIM_MASK_ODD, | |
147 | reg_val << 6); | |
148 | } | |
149 | ||
08bf1c0a AJ |
150 | static int da9052_list_voltage(struct regulator_dev *rdev, |
151 | unsigned int selector) | |
152 | { | |
153 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
154 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 155 | int id = rdev_get_id(rdev); |
08bf1c0a AJ |
156 | int volt_uV; |
157 | ||
0ec446ea AL |
158 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
159 | && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { | |
160 | volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) | |
161 | + info->min_uV); | |
162 | volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) | |
163 | * (DA9052_BUCK_PERI_3uV_STEP); | |
164 | } else { | |
165 | volt_uV = (selector * info->step_uV) + info->min_uV; | |
166 | } | |
08bf1c0a AJ |
167 | |
168 | if (volt_uV > info->max_uV) | |
169 | return -EINVAL; | |
170 | ||
171 | return volt_uV; | |
172 | } | |
173 | ||
4923b48b AL |
174 | static int da9052_map_voltage(struct regulator_dev *rdev, |
175 | int min_uV, int max_uV) | |
08bf1c0a AJ |
176 | { |
177 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
178 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 179 | int id = rdev_get_id(rdev); |
4923b48b | 180 | int ret, sel; |
08bf1c0a AJ |
181 | |
182 | ret = verify_range(info, min_uV, max_uV); | |
183 | if (ret < 0) | |
184 | return ret; | |
185 | ||
186 | if (min_uV < info->min_uV) | |
187 | min_uV = info->min_uV; | |
188 | ||
0ec446ea AL |
189 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
190 | && (min_uV >= DA9052_CONST_3uV)) { | |
4923b48b AL |
191 | sel = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + |
192 | DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, | |
193 | DA9052_BUCK_PERI_3uV_STEP); | |
0ec446ea | 194 | } else { |
4923b48b | 195 | sel = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); |
0ec446ea | 196 | } |
08bf1c0a | 197 | |
4923b48b | 198 | ret = da9052_list_voltage(rdev, sel); |
08bf1c0a AJ |
199 | if (ret < 0) |
200 | return ret; | |
201 | ||
4923b48b AL |
202 | return sel; |
203 | } | |
204 | ||
d706b1e4 AL |
205 | static int da9052_regulator_set_voltage_sel(struct regulator_dev *rdev, |
206 | unsigned int selector) | |
207 | { | |
208 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
209 | struct da9052_regulator_info *info = regulator->info; | |
210 | int id = rdev_get_id(rdev); | |
211 | int ret; | |
212 | ||
213 | ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg, | |
214 | rdev->desc->vsel_mask, selector); | |
215 | if (ret < 0) | |
216 | return ret; | |
217 | ||
218 | /* Some LDOs and DCDCs are DVC controlled which requires enabling of | |
219 | * the activate bit to implment the changes on the output. | |
220 | */ | |
221 | switch (id) { | |
222 | case DA9052_ID_BUCK1: | |
223 | case DA9052_ID_BUCK2: | |
224 | case DA9052_ID_BUCK3: | |
225 | case DA9052_ID_LDO2: | |
226 | case DA9052_ID_LDO3: | |
227 | ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, | |
228 | info->activate_bit, info->activate_bit); | |
229 | break; | |
230 | } | |
231 | ||
232 | return ret; | |
233 | } | |
234 | ||
5c99a7b1 PZ |
235 | static int da9052_regulator_set_voltage_time_sel(struct regulator_dev *rdev, |
236 | unsigned int old_sel, | |
237 | unsigned int new_sel) | |
238 | { | |
239 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
240 | struct da9052_regulator_info *info = regulator->info; | |
241 | int id = rdev_get_id(rdev); | |
242 | int ret = 0; | |
243 | ||
244 | /* The DVC controlled LDOs and DCDCs ramp with 6.25mV/µs after enabling | |
245 | * the activate bit. | |
246 | */ | |
247 | switch (id) { | |
248 | case DA9052_ID_BUCK1: | |
249 | case DA9052_ID_BUCK2: | |
250 | case DA9052_ID_BUCK3: | |
251 | case DA9052_ID_LDO2: | |
252 | case DA9052_ID_LDO3: | |
253 | ret = (new_sel - old_sel) * info->step_uV / 6250; | |
254 | break; | |
255 | } | |
256 | ||
257 | return ret; | |
258 | } | |
259 | ||
71242b49 | 260 | static const struct regulator_ops da9052_dcdc_ops = { |
08bf1c0a AJ |
261 | .get_current_limit = da9052_dcdc_get_current_limit, |
262 | .set_current_limit = da9052_dcdc_set_current_limit, | |
263 | ||
264 | .list_voltage = da9052_list_voltage, | |
4923b48b | 265 | .map_voltage = da9052_map_voltage, |
09812bc4 | 266 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
d706b1e4 | 267 | .set_voltage_sel = da9052_regulator_set_voltage_sel, |
5c99a7b1 | 268 | .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, |
0d481f74 AL |
269 | .is_enabled = regulator_is_enabled_regmap, |
270 | .enable = regulator_enable_regmap, | |
271 | .disable = regulator_disable_regmap, | |
08bf1c0a AJ |
272 | }; |
273 | ||
71242b49 | 274 | static const struct regulator_ops da9052_ldo_ops = { |
08bf1c0a | 275 | .list_voltage = da9052_list_voltage, |
4923b48b | 276 | .map_voltage = da9052_map_voltage, |
09812bc4 | 277 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
d706b1e4 | 278 | .set_voltage_sel = da9052_regulator_set_voltage_sel, |
5c99a7b1 | 279 | .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, |
0d481f74 AL |
280 | .is_enabled = regulator_is_enabled_regmap, |
281 | .enable = regulator_enable_regmap, | |
282 | .disable = regulator_disable_regmap, | |
08bf1c0a AJ |
283 | }; |
284 | ||
45460fe9 | 285 | #define DA9052_LDO(_id, _name, step, min, max, sbits, ebits, abits) \ |
08bf1c0a AJ |
286 | {\ |
287 | .reg_desc = {\ | |
45460fe9 | 288 | .name = #_name,\ |
67ddc68a AL |
289 | .of_match = of_match_ptr(#_name),\ |
290 | .regulators_node = of_match_ptr("regulators"),\ | |
08bf1c0a AJ |
291 | .ops = &da9052_ldo_ops,\ |
292 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 293 | .id = DA9052_ID_##_id,\ |
7b957654 | 294 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a | 295 | .owner = THIS_MODULE,\ |
09812bc4 AL |
296 | .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
297 | .vsel_mask = (1 << (sbits)) - 1,\ | |
0d481f74 AL |
298 | .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
299 | .enable_mask = 1 << (ebits),\ | |
08bf1c0a AJ |
300 | },\ |
301 | .min_uV = (min) * 1000,\ | |
302 | .max_uV = (max) * 1000,\ | |
303 | .step_uV = (step) * 1000,\ | |
d706b1e4 | 304 | .activate_bit = (abits),\ |
08bf1c0a AJ |
305 | } |
306 | ||
45460fe9 | 307 | #define DA9052_DCDC(_id, _name, step, min, max, sbits, ebits, abits) \ |
08bf1c0a AJ |
308 | {\ |
309 | .reg_desc = {\ | |
45460fe9 | 310 | .name = #_name,\ |
67ddc68a AL |
311 | .of_match = of_match_ptr(#_name),\ |
312 | .regulators_node = of_match_ptr("regulators"),\ | |
08bf1c0a AJ |
313 | .ops = &da9052_dcdc_ops,\ |
314 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 315 | .id = DA9052_ID_##_id,\ |
7b957654 | 316 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a | 317 | .owner = THIS_MODULE,\ |
09812bc4 AL |
318 | .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
319 | .vsel_mask = (1 << (sbits)) - 1,\ | |
0d481f74 AL |
320 | .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
321 | .enable_mask = 1 << (ebits),\ | |
08bf1c0a AJ |
322 | },\ |
323 | .min_uV = (min) * 1000,\ | |
324 | .max_uV = (max) * 1000,\ | |
325 | .step_uV = (step) * 1000,\ | |
d706b1e4 | 326 | .activate_bit = (abits),\ |
08bf1c0a AJ |
327 | } |
328 | ||
6242eae9 | 329 | static struct da9052_regulator_info da9052_regulator_info[] = { |
45460fe9 RH |
330 | DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
331 | DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
332 | DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), | |
333 | DA9052_DCDC(BUCK4, buck4, 50, 1800, 3600, 5, 6, 0), | |
334 | DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), | |
335 | DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), | |
336 | DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
337 | DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), | |
338 | DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), | |
339 | DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), | |
340 | DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), | |
341 | DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), | |
342 | DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), | |
343 | DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
344 | }; |
345 | ||
6242eae9 | 346 | static struct da9052_regulator_info da9053_regulator_info[] = { |
45460fe9 RH |
347 | DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
348 | DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
349 | DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), | |
350 | DA9052_DCDC(BUCK4, buck4, 25, 950, 2525, 6, 6, 0), | |
351 | DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), | |
352 | DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), | |
353 | DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
354 | DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), | |
355 | DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), | |
356 | DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), | |
357 | DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), | |
358 | DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), | |
359 | DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), | |
360 | DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
361 | }; |
362 | ||
363 | static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, | |
364 | int id) | |
365 | { | |
366 | struct da9052_regulator_info *info; | |
367 | int i; | |
368 | ||
984b5a6b AJ |
369 | switch (chip_id) { |
370 | case DA9052: | |
08bf1c0a AJ |
371 | for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { |
372 | info = &da9052_regulator_info[i]; | |
373 | if (info->reg_desc.id == id) | |
374 | return info; | |
375 | } | |
984b5a6b AJ |
376 | break; |
377 | case DA9053_AA: | |
378 | case DA9053_BA: | |
379 | case DA9053_BB: | |
8b708144 | 380 | case DA9053_BC: |
08bf1c0a AJ |
381 | for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { |
382 | info = &da9053_regulator_info[i]; | |
383 | if (info->reg_desc.id == id) | |
384 | return info; | |
385 | } | |
984b5a6b | 386 | break; |
08bf1c0a AJ |
387 | } |
388 | ||
389 | return NULL; | |
390 | } | |
391 | ||
a5023574 | 392 | static int da9052_regulator_probe(struct platform_device *pdev) |
08bf1c0a | 393 | { |
e0c21530 | 394 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
c172708d | 395 | struct regulator_config config = { }; |
08bf1c0a AJ |
396 | struct da9052_regulator *regulator; |
397 | struct da9052 *da9052; | |
398 | struct da9052_pdata *pdata; | |
08bf1c0a | 399 | |
984b5a6b AJ |
400 | regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), |
401 | GFP_KERNEL); | |
08bf1c0a AJ |
402 | if (!regulator) |
403 | return -ENOMEM; | |
404 | ||
405 | da9052 = dev_get_drvdata(pdev->dev.parent); | |
dff91d0b | 406 | pdata = dev_get_platdata(da9052->dev); |
08bf1c0a AJ |
407 | regulator->da9052 = da9052; |
408 | ||
409 | regulator->info = find_regulator_info(regulator->da9052->chip_id, | |
e0c21530 | 410 | cell->id); |
08bf1c0a AJ |
411 | if (regulator->info == NULL) { |
412 | dev_err(&pdev->dev, "invalid regulator ID specified\n"); | |
7eb6444f | 413 | return -EINVAL; |
08bf1c0a | 414 | } |
c172708d | 415 | |
67ddc68a | 416 | config.dev = da9052->dev; |
c172708d | 417 | config.driver_data = regulator; |
0d481f74 | 418 | config.regmap = da9052->regmap; |
67ddc68a | 419 | if (pdata) |
e0c21530 | 420 | config.init_data = pdata->regulators[cell->id]; |
c172708d | 421 | |
ea49a5eb AL |
422 | regulator->rdev = devm_regulator_register(&pdev->dev, |
423 | ®ulator->info->reg_desc, | |
424 | &config); | |
08bf1c0a AJ |
425 | if (IS_ERR(regulator->rdev)) { |
426 | dev_err(&pdev->dev, "failed to register regulator %s\n", | |
427 | regulator->info->reg_desc.name); | |
7eb6444f | 428 | return PTR_ERR(regulator->rdev); |
08bf1c0a AJ |
429 | } |
430 | ||
431 | platform_set_drvdata(pdev, regulator); | |
432 | ||
433 | return 0; | |
08bf1c0a AJ |
434 | } |
435 | ||
08bf1c0a AJ |
436 | static struct platform_driver da9052_regulator_driver = { |
437 | .probe = da9052_regulator_probe, | |
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438 | .driver = { |
439 | .name = "da9052-regulator", | |
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440 | }, |
441 | }; | |
442 | ||
443 | static int __init da9052_regulator_init(void) | |
444 | { | |
445 | return platform_driver_register(&da9052_regulator_driver); | |
446 | } | |
447 | subsys_initcall(da9052_regulator_init); | |
448 | ||
449 | static void __exit da9052_regulator_exit(void) | |
450 | { | |
451 | platform_driver_unregister(&da9052_regulator_driver); | |
452 | } | |
453 | module_exit(da9052_regulator_exit); | |
454 | ||
455 | MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); | |
456 | MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); | |
457 | MODULE_LICENSE("GPL"); | |
458 | MODULE_ALIAS("platform:da9052-regulator"); |