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49f53951 | 1 | // SPDX-License-Identifier: GPL-2.0 |
e85c5a15 | 2 | /* |
ceee9dc1 | 3 | * ROHM BD9571MWV-M and BD9574MWF-M regulator driver |
e85c5a15 MV |
4 | * |
5 | * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com> | |
6 | * | |
e85c5a15 MV |
7 | * Based on the TPS65086 driver |
8 | * | |
9 | * NOTE: VD09 is missing | |
10 | */ | |
11 | ||
ceee9dc1 | 12 | #include <linux/mfd/rohm-generic.h> |
e85c5a15 MV |
13 | #include <linux/module.h> |
14 | #include <linux/of.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/regulator/driver.h> | |
17 | ||
18 | #include <linux/mfd/bd9571mwv.h> | |
19 | ||
6eb0bfae | 20 | struct bd9571mwv_reg { |
30402f97 | 21 | struct regmap *regmap; |
6eb0bfae GU |
22 | |
23 | /* DDR Backup Power */ | |
24 | u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */ | |
25 | u8 bkup_mode_cnt_saved; | |
02b3a073 | 26 | bool bkup_mode_enabled; |
6eb0bfae GU |
27 | |
28 | /* Power switch type */ | |
29 | bool rstbmode_level; | |
30 | bool rstbmode_pulse; | |
31 | }; | |
32 | ||
e85c5a15 MV |
33 | enum bd9571mwv_regulators { VD09, VD18, VD25, VD33, DVFS }; |
34 | ||
35 | #define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\ | |
36 | { \ | |
37 | .name = _name, \ | |
38 | .of_match = of_match_ptr(_of), \ | |
39 | .regulators_node = "regulators", \ | |
40 | .id = _id, \ | |
41 | .ops = &_ops, \ | |
42 | .n_voltages = _nv, \ | |
43 | .type = REGULATOR_VOLTAGE, \ | |
44 | .owner = THIS_MODULE, \ | |
45 | .vsel_reg = _vr, \ | |
46 | .vsel_mask = _vm, \ | |
47 | .min_uV = _min, \ | |
48 | .uV_step = _step, \ | |
49 | .linear_min_sel = _lmin, \ | |
50 | } | |
51 | ||
cb42b648 | 52 | static int bd9571mwv_avs_get_moni_state(struct regulator_dev *rdev) |
e85c5a15 MV |
53 | { |
54 | unsigned int val; | |
55 | int ret; | |
56 | ||
57 | ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); | |
58 | if (ret != 0) | |
59 | return ret; | |
60 | ||
61 | return val & BD9571MWV_AVS_SET_MONI_MASK; | |
62 | } | |
63 | ||
cb42b648 AL |
64 | static int bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev *rdev, |
65 | unsigned int sel) | |
e85c5a15 MV |
66 | { |
67 | int ret; | |
68 | ||
69 | ret = bd9571mwv_avs_get_moni_state(rdev); | |
70 | if (ret < 0) | |
71 | return ret; | |
72 | ||
73 | return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), | |
74 | rdev->desc->vsel_mask, sel); | |
75 | } | |
76 | ||
cb42b648 | 77 | static int bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev *rdev) |
e85c5a15 MV |
78 | { |
79 | unsigned int val; | |
80 | int ret; | |
81 | ||
82 | ret = bd9571mwv_avs_get_moni_state(rdev); | |
83 | if (ret < 0) | |
84 | return ret; | |
85 | ||
86 | ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); | |
87 | if (ret != 0) | |
88 | return ret; | |
89 | ||
90 | val &= rdev->desc->vsel_mask; | |
91 | val >>= ffs(rdev->desc->vsel_mask) - 1; | |
92 | ||
93 | return val; | |
94 | } | |
95 | ||
cb42b648 AL |
96 | static int bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev *rdev, |
97 | unsigned int sel) | |
e85c5a15 MV |
98 | { |
99 | return regmap_write_bits(rdev->regmap, BD9571MWV_DVFS_SETVID, | |
100 | rdev->desc->vsel_mask, sel); | |
101 | } | |
102 | ||
103 | /* Operations permitted on AVS voltage regulator */ | |
e109e711 | 104 | static const struct regulator_ops avs_ops = { |
e85c5a15 MV |
105 | .set_voltage_sel = bd9571mwv_avs_set_voltage_sel_regmap, |
106 | .map_voltage = regulator_map_voltage_linear, | |
107 | .get_voltage_sel = bd9571mwv_avs_get_voltage_sel_regmap, | |
108 | .list_voltage = regulator_list_voltage_linear, | |
109 | }; | |
110 | ||
111 | /* Operations permitted on voltage regulators */ | |
e109e711 | 112 | static const struct regulator_ops reg_ops = { |
e85c5a15 MV |
113 | .set_voltage_sel = bd9571mwv_reg_set_voltage_sel_regmap, |
114 | .map_voltage = regulator_map_voltage_linear, | |
115 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
116 | .list_voltage = regulator_list_voltage_linear, | |
117 | }; | |
118 | ||
119 | /* Operations permitted on voltage monitors */ | |
e109e711 | 120 | static const struct regulator_ops vid_ops = { |
e85c5a15 MV |
121 | .map_voltage = regulator_map_voltage_linear, |
122 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
123 | .list_voltage = regulator_list_voltage_linear, | |
124 | }; | |
125 | ||
e109e711 | 126 | static const struct regulator_desc regulators[] = { |
e85c5a15 | 127 | BD9571MWV_REG("VD09", "vd09", VD09, avs_ops, 0, 0x7f, |
3b6e7088 | 128 | 0x6f, 600000, 10000, 0x3c), |
e85c5a15 MV |
129 | BD9571MWV_REG("VD18", "vd18", VD18, vid_ops, BD9571MWV_VD18_VID, 0xf, |
130 | 16, 1625000, 25000, 0), | |
131 | BD9571MWV_REG("VD25", "vd25", VD25, vid_ops, BD9571MWV_VD25_VID, 0xf, | |
132 | 16, 2150000, 50000, 0), | |
133 | BD9571MWV_REG("VD33", "vd33", VD33, vid_ops, BD9571MWV_VD33_VID, 0xf, | |
134 | 11, 2800000, 100000, 0), | |
135 | BD9571MWV_REG("DVFS", "dvfs", DVFS, reg_ops, | |
136 | BD9571MWV_DVFS_MONIVDAC, 0x7f, | |
3b6e7088 | 137 | 0x6f, 600000, 10000, 0x3c), |
e85c5a15 MV |
138 | }; |
139 | ||
6eb0bfae | 140 | #ifdef CONFIG_PM_SLEEP |
30402f97 YS |
141 | static int bd9571mwv_bkup_mode_read(struct bd9571mwv_reg *bdreg, |
142 | unsigned int *mode) | |
6eb0bfae GU |
143 | { |
144 | int ret; | |
145 | ||
30402f97 | 146 | ret = regmap_read(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode); |
6eb0bfae | 147 | if (ret) { |
30402f97 YS |
148 | dev_err(regmap_get_device(bdreg->regmap), |
149 | "failed to read backup mode (%d)\n", ret); | |
6eb0bfae GU |
150 | return ret; |
151 | } | |
152 | ||
153 | return 0; | |
154 | } | |
155 | ||
30402f97 YS |
156 | static int bd9571mwv_bkup_mode_write(struct bd9571mwv_reg *bdreg, |
157 | unsigned int mode) | |
6eb0bfae GU |
158 | { |
159 | int ret; | |
160 | ||
30402f97 | 161 | ret = regmap_write(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode); |
6eb0bfae | 162 | if (ret) { |
30402f97 YS |
163 | dev_err(regmap_get_device(bdreg->regmap), |
164 | "failed to configure backup mode 0x%x (%d)\n", | |
6eb0bfae GU |
165 | mode, ret); |
166 | return ret; | |
167 | } | |
168 | ||
169 | return 0; | |
170 | } | |
171 | ||
02b3a073 GU |
172 | static ssize_t backup_mode_show(struct device *dev, |
173 | struct device_attribute *attr, char *buf) | |
174 | { | |
175 | struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); | |
176 | ||
177 | return sprintf(buf, "%s\n", bdreg->bkup_mode_enabled ? "on" : "off"); | |
178 | } | |
179 | ||
180 | static ssize_t backup_mode_store(struct device *dev, | |
181 | struct device_attribute *attr, | |
182 | const char *buf, size_t count) | |
183 | { | |
184 | struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); | |
e436875f | 185 | unsigned int mode; |
02b3a073 GU |
186 | int ret; |
187 | ||
188 | if (!count) | |
189 | return 0; | |
190 | ||
191 | ret = kstrtobool(buf, &bdreg->bkup_mode_enabled); | |
192 | if (ret) | |
193 | return ret; | |
194 | ||
e436875f GU |
195 | if (!bdreg->rstbmode_level) |
196 | return count; | |
197 | ||
198 | /* | |
199 | * Configure DDR Backup Mode, to change the role of the accessory power | |
200 | * switch from a power switch to a wake-up switch, or vice versa | |
201 | */ | |
30402f97 | 202 | ret = bd9571mwv_bkup_mode_read(bdreg, &mode); |
e436875f GU |
203 | if (ret) |
204 | return ret; | |
205 | ||
206 | mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK; | |
207 | if (bdreg->bkup_mode_enabled) | |
208 | mode |= bdreg->bkup_mode_cnt_keepon; | |
209 | ||
30402f97 | 210 | ret = bd9571mwv_bkup_mode_write(bdreg, mode); |
e436875f GU |
211 | if (ret) |
212 | return ret; | |
213 | ||
02b3a073 GU |
214 | return count; |
215 | } | |
216 | ||
a70a4694 | 217 | static DEVICE_ATTR_RW(backup_mode); |
02b3a073 | 218 | |
6eb0bfae GU |
219 | static int bd9571mwv_suspend(struct device *dev) |
220 | { | |
221 | struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); | |
222 | unsigned int mode; | |
223 | int ret; | |
224 | ||
02b3a073 | 225 | if (!bdreg->bkup_mode_enabled) |
6eb0bfae GU |
226 | return 0; |
227 | ||
228 | /* Save DDR Backup Mode */ | |
30402f97 | 229 | ret = bd9571mwv_bkup_mode_read(bdreg, &mode); |
6eb0bfae GU |
230 | if (ret) |
231 | return ret; | |
232 | ||
233 | bdreg->bkup_mode_cnt_saved = mode; | |
234 | ||
235 | if (!bdreg->rstbmode_pulse) | |
236 | return 0; | |
237 | ||
238 | /* Enable DDR Backup Mode */ | |
239 | mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK; | |
240 | mode |= bdreg->bkup_mode_cnt_keepon; | |
241 | ||
242 | if (mode != bdreg->bkup_mode_cnt_saved) | |
30402f97 | 243 | return bd9571mwv_bkup_mode_write(bdreg, mode); |
6eb0bfae GU |
244 | |
245 | return 0; | |
246 | } | |
247 | ||
248 | static int bd9571mwv_resume(struct device *dev) | |
249 | { | |
250 | struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); | |
251 | ||
02b3a073 | 252 | if (!bdreg->bkup_mode_enabled) |
6eb0bfae GU |
253 | return 0; |
254 | ||
255 | /* Restore DDR Backup Mode */ | |
30402f97 | 256 | return bd9571mwv_bkup_mode_write(bdreg, bdreg->bkup_mode_cnt_saved); |
6eb0bfae GU |
257 | } |
258 | ||
259 | static const struct dev_pm_ops bd9571mwv_pm = { | |
260 | SET_SYSTEM_SLEEP_PM_OPS(bd9571mwv_suspend, bd9571mwv_resume) | |
261 | }; | |
262 | ||
02b3a073 GU |
263 | static int bd9571mwv_regulator_remove(struct platform_device *pdev) |
264 | { | |
265 | device_remove_file(&pdev->dev, &dev_attr_backup_mode); | |
266 | return 0; | |
267 | } | |
6eb0bfae GU |
268 | #define DEV_PM_OPS &bd9571mwv_pm |
269 | #else | |
270 | #define DEV_PM_OPS NULL | |
02b3a073 | 271 | #define bd9571mwv_regulator_remove NULL |
6eb0bfae GU |
272 | #endif /* CONFIG_PM_SLEEP */ |
273 | ||
e85c5a15 MV |
274 | static int bd9571mwv_regulator_probe(struct platform_device *pdev) |
275 | { | |
e85c5a15 | 276 | struct regulator_config config = { }; |
6eb0bfae | 277 | struct bd9571mwv_reg *bdreg; |
e85c5a15 | 278 | struct regulator_dev *rdev; |
6eb0bfae | 279 | unsigned int val; |
e85c5a15 | 280 | int i; |
ceee9dc1 | 281 | enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; |
e85c5a15 | 282 | |
6eb0bfae GU |
283 | bdreg = devm_kzalloc(&pdev->dev, sizeof(*bdreg), GFP_KERNEL); |
284 | if (!bdreg) | |
285 | return -ENOMEM; | |
286 | ||
30402f97 | 287 | bdreg->regmap = dev_get_regmap(pdev->dev.parent, NULL); |
6eb0bfae GU |
288 | |
289 | platform_set_drvdata(pdev, bdreg); | |
e85c5a15 MV |
290 | |
291 | config.dev = &pdev->dev; | |
30402f97 YS |
292 | config.dev->of_node = pdev->dev.parent->of_node; |
293 | config.driver_data = bdreg; | |
294 | config.regmap = bdreg->regmap; | |
e85c5a15 MV |
295 | |
296 | for (i = 0; i < ARRAY_SIZE(regulators); i++) { | |
ceee9dc1 YS |
297 | /* BD9574MWF supports DVFS only */ |
298 | if (chip == ROHM_CHIP_TYPE_BD9574 && regulators[i].id != DVFS) | |
299 | continue; | |
e85c5a15 MV |
300 | rdev = devm_regulator_register(&pdev->dev, ®ulators[i], |
301 | &config); | |
302 | if (IS_ERR(rdev)) { | |
30402f97 | 303 | dev_err(&pdev->dev, "failed to register %s regulator\n", |
9cbc23f7 | 304 | regulators[i].name); |
e85c5a15 MV |
305 | return PTR_ERR(rdev); |
306 | } | |
307 | } | |
308 | ||
6eb0bfae | 309 | val = 0; |
30402f97 | 310 | of_property_read_u32(config.dev->of_node, "rohm,ddr-backup-power", &val); |
6eb0bfae | 311 | if (val & ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK) { |
30402f97 | 312 | dev_err(&pdev->dev, "invalid %s mode %u\n", |
6eb0bfae GU |
313 | "rohm,ddr-backup-power", val); |
314 | return -EINVAL; | |
315 | } | |
316 | bdreg->bkup_mode_cnt_keepon = val; | |
317 | ||
30402f97 | 318 | bdreg->rstbmode_level = of_property_read_bool(config.dev->of_node, |
6eb0bfae | 319 | "rohm,rstbmode-level"); |
30402f97 | 320 | bdreg->rstbmode_pulse = of_property_read_bool(config.dev->of_node, |
6eb0bfae GU |
321 | "rohm,rstbmode-pulse"); |
322 | if (bdreg->rstbmode_level && bdreg->rstbmode_pulse) { | |
30402f97 | 323 | dev_err(&pdev->dev, "only one rohm,rstbmode-* may be specified"); |
6eb0bfae GU |
324 | return -EINVAL; |
325 | } | |
326 | ||
02b3a073 | 327 | #ifdef CONFIG_PM_SLEEP |
6eb0bfae | 328 | if (bdreg->bkup_mode_cnt_keepon) { |
02b3a073 GU |
329 | int ret; |
330 | ||
6eb0bfae | 331 | /* |
02b3a073 | 332 | * Backup mode is enabled by default in pulse mode, but needs |
6eb0bfae GU |
333 | * explicit user setup in level mode. |
334 | */ | |
02b3a073 GU |
335 | bdreg->bkup_mode_enabled = bdreg->rstbmode_pulse; |
336 | ||
337 | ret = device_create_file(&pdev->dev, &dev_attr_backup_mode); | |
338 | if (ret) | |
339 | return ret; | |
6eb0bfae | 340 | } |
02b3a073 | 341 | #endif /* CONFIG_PM_SLEEP */ |
6eb0bfae | 342 | |
e85c5a15 MV |
343 | return 0; |
344 | } | |
345 | ||
346 | static const struct platform_device_id bd9571mwv_regulator_id_table[] = { | |
ceee9dc1 YS |
347 | { "bd9571mwv-regulator", ROHM_CHIP_TYPE_BD9571 }, |
348 | { "bd9574mwf-regulator", ROHM_CHIP_TYPE_BD9574 }, | |
e85c5a15 MV |
349 | { /* sentinel */ } |
350 | }; | |
351 | MODULE_DEVICE_TABLE(platform, bd9571mwv_regulator_id_table); | |
352 | ||
353 | static struct platform_driver bd9571mwv_regulator_driver = { | |
354 | .driver = { | |
355 | .name = "bd9571mwv-regulator", | |
6eb0bfae | 356 | .pm = DEV_PM_OPS, |
e85c5a15 MV |
357 | }, |
358 | .probe = bd9571mwv_regulator_probe, | |
02b3a073 | 359 | .remove = bd9571mwv_regulator_remove, |
e85c5a15 MV |
360 | .id_table = bd9571mwv_regulator_id_table, |
361 | }; | |
362 | module_platform_driver(bd9571mwv_regulator_driver); | |
363 | ||
364 | MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>"); | |
365 | MODULE_DESCRIPTION("BD9571MWV Regulator driver"); | |
366 | MODULE_LICENSE("GPL v2"); |