[linux-block.git] / drivers / regulator / anatop-regulator.c

/*
 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
 */

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.

 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.

 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */

#include <linux/slab.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/mfd/syscon.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/of_regulator.h>

#define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
#define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */

struct anatop_regulator {
	const char *name;
	u32 control_reg;
	struct regmap *anatop;
	int vol_bit_shift;
	int vol_bit_width;
	u32 delay_reg;
	int delay_bit_shift;
	int delay_bit_width;
	int min_bit_val;
	int min_voltage;
	int max_voltage;
	struct regulator_desc rdesc;
	struct regulator_init_data *initdata;
};

static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
					unsigned selector)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

	return regulator_set_voltage_sel_regmap(reg, selector);
}

static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
	unsigned int old_sel,
	unsigned int new_sel)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	u32 val;
	int ret = 0;

	/* check whether need to care about LDO ramp up speed */
	if (anatop_reg->delay_bit_width && new_sel > old_sel) {
		/*
		 * the delay for LDO ramp up time is
		 * based on the register setting, we need
		 * to calculate how many steps LDO need to
		 * ramp up, and how much delay needed. (us)
		 */
		regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
		val = (val >> anatop_reg->delay_bit_shift) &
			((1 << anatop_reg->delay_bit_width) - 1);
		ret = (new_sel - old_sel) * ((LDO_RAMP_UP_UNIT_IN_CYCLES <<
			val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1);
	}

	return ret;
}

static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

	return regulator_get_voltage_sel_regmap(reg);
}

static struct regulator_ops anatop_rops = {
	.set_voltage_sel = anatop_regmap_set_voltage_sel,
	.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
	.get_voltage_sel = anatop_regmap_get_voltage_sel,
	.list_voltage = regulator_list_voltage_linear,
	.map_voltage = regulator_map_voltage_linear,
};

static int anatop_regulator_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct device_node *anatop_np;
	struct regulator_desc *rdesc;
	struct regulator_dev *rdev;
	struct anatop_regulator *sreg;
	struct regulator_init_data *initdata;
	struct regulator_config config = { };
	int ret = 0;

	initdata = of_get_regulator_init_data(dev, np);
	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	if (!sreg)
		return -ENOMEM;
	sreg->initdata = initdata;
	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
			     GFP_KERNEL);
	rdesc = &sreg->rdesc;
	memset(rdesc, 0, sizeof(*rdesc));
	rdesc->name = sreg->name;
	rdesc->ops = &anatop_rops;
	rdesc->type = REGULATOR_VOLTAGE;
	rdesc->owner = THIS_MODULE;

	anatop_np = of_get_parent(np);
	if (!anatop_np)
		return -ENODEV;
	sreg->anatop = syscon_node_to_regmap(anatop_np);
	of_node_put(anatop_np);
	if (IS_ERR(sreg->anatop))
		return PTR_ERR(sreg->anatop);

	ret = of_property_read_u32(np, "anatop-reg-offset",
				   &sreg->control_reg);
	if (ret) {
		dev_err(dev, "no anatop-reg-offset property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-width",
				   &sreg->vol_bit_width);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-width property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
				   &sreg->vol_bit_shift);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-shift property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-bit-val",
				   &sreg->min_bit_val);
	if (ret) {
		dev_err(dev, "no anatop-min-bit-val property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-voltage",
				   &sreg->min_voltage);
	if (ret) {
		dev_err(dev, "no anatop-min-voltage property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-max-voltage",
				   &sreg->max_voltage);
	if (ret) {
		dev_err(dev, "no anatop-max-voltage property set\n");
		goto anatop_probe_end;
	}

	/* read LDO ramp up setting, only for core reg */
	of_property_read_u32(np, "anatop-delay-reg-offset",
			     &sreg->delay_reg);
	of_property_read_u32(np, "anatop-delay-bit-width",
			     &sreg->delay_bit_width);
	of_property_read_u32(np, "anatop-delay-bit-shift",
			     &sreg->delay_bit_shift);

	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
			    + sreg->min_bit_val;
	rdesc->min_uV = sreg->min_voltage;
	rdesc->uV_step = 25000;
	rdesc->linear_min_sel = sreg->min_bit_val;
	rdesc->vsel_reg = sreg->control_reg;
	rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
			   sreg->vol_bit_shift;

	config.dev = &pdev->dev;
	config.init_data = initdata;
	config.driver_data = sreg;
	config.of_node = pdev->dev.of_node;
	config.regmap = sreg->anatop;

	/* register regulator */
	rdev = regulator_register(rdesc, &config);
	if (IS_ERR(rdev)) {
		dev_err(dev, "failed to register %s\n",
			rdesc->name);
		ret = PTR_ERR(rdev);
		goto anatop_probe_end;
	}

	platform_set_drvdata(pdev, rdev);

anatop_probe_end:
	if (ret)
		kfree(sreg->name);

	return ret;
}

static int anatop_regulator_remove(struct platform_device *pdev)
{
	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
	const char *name = sreg->name;

	regulator_unregister(rdev);
	kfree(name);

	return 0;
}

static struct of_device_id of_anatop_regulator_match_tbl[] = {
	{ .compatible = "fsl,anatop-regulator", },
	{ /* end */ }
};

static struct platform_driver anatop_regulator_driver = {
	.driver = {
		.name	= "anatop_regulator",
		.owner  = THIS_MODULE,
		.of_match_table = of_anatop_regulator_match_tbl,
	},
	.probe	= anatop_regulator_probe,
	.remove	= anatop_regulator_remove,
};

static int __init anatop_regulator_init(void)
{
	return platform_driver_register(&anatop_regulator_driver);
}
postcore_initcall(anatop_regulator_init);

static void __exit anatop_regulator_exit(void)
{
	platform_driver_unregister(&anatop_regulator_driver);
}
module_exit(anatop_regulator_exit);

MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
	      "Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
MODULE_DESCRIPTION("ANATOP Regulator driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
e3e5aff7 YCLP	1	/*
	2	* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*/
	4
	5	/*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15
	16	* You should have received a copy of the GNU General Public License along
	17	* with this program; if not, write to the Free Software Foundation, Inc.,
	18	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	19	*/
	20
	21	#include <linux/slab.h>
	22	#include <linux/device.h>
	23	#include <linux/module.h>
baa64151	24	#include <linux/mfd/syscon.h>
e3e5aff7 YCLP	25	#include <linux/err.h>
	26	#include <linux/io.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/of.h>
	29	#include <linux/of_address.h>
baa64151	30	#include <linux/regmap.h>
e3e5aff7 YCLP	31	#include <linux/regulator/driver.h>
	32	#include <linux/regulator/of_regulator.h>
	33
9ee417c0 AH	34	#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
	35	#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
	36
e3e5aff7 YCLP	37	struct anatop_regulator {
	38	const char *name;
	39	u32 control_reg;
baa64151	40	struct regmap *anatop;
e3e5aff7 YCLP	41	int vol_bit_shift;
e3e5aff7 YCLP	42	int vol_bit_width;
9ee417c0 AH	43	u32 delay_reg;
	44	int delay_bit_shift;
	45	int delay_bit_width;
e3e5aff7 YCLP	46	int min_bit_val;
	47	int min_voltage;
	48	int max_voltage;
	49	struct regulator_desc rdesc;
	50	struct regulator_init_data *initdata;
	51	};
	52
baa64151 DA	53	static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
baa64151 DA	54	unsigned selector)
e3e5aff7 YCLP	55	{
e3e5aff7 YCLP	56	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
e3e5aff7 YCLP	57
	58	if (!anatop_reg->control_reg)
	59	return -ENOTSUPP;
	60
e1b0144f	61	return regulator_set_voltage_sel_regmap(reg, selector);
e3e5aff7 YCLP	62	}
e3e5aff7 YCLP	63
9ee417c0 AH	64	static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
	65	unsigned int old_sel,
	66	unsigned int new_sel)
	67	{
	68	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	69	u32 val;
	70	int ret = 0;
	71
	72	/* check whether need to care about LDO ramp up speed */
	73	if (anatop_reg->delay_bit_width && new_sel > old_sel) {
	74	/*
	75	* the delay for LDO ramp up time is
	76	* based on the register setting, we need
	77	* to calculate how many steps LDO need to
	78	* ramp up, and how much delay needed. (us)
	79	*/
	80	regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
	81	val = (val >> anatop_reg->delay_bit_shift) &
	82	((1 << anatop_reg->delay_bit_width) - 1);
	83	ret = (new_sel - old_sel) * ((LDO_RAMP_UP_UNIT_IN_CYCLES <<
	84	val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1);
	85	}
	86
	87	return ret;
	88	}
	89
baa64151	90	static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
e3e5aff7 YCLP	91	{
e3e5aff7 YCLP	92	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
e3e5aff7 YCLP	93
	94	if (!anatop_reg->control_reg)
	95	return -ENOTSUPP;
	96
e1b0144f	97	return regulator_get_voltage_sel_regmap(reg);
e3e5aff7 YCLP	98	}
e3e5aff7 YCLP	99
e3e5aff7	100	static struct regulator_ops anatop_rops = {
baa64151	101	.set_voltage_sel = anatop_regmap_set_voltage_sel,
9ee417c0	102	.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
baa64151	103	.get_voltage_sel = anatop_regmap_get_voltage_sel,
d01c3a1e AL	104	.list_voltage = regulator_list_voltage_linear,
d01c3a1e AL	105	.map_voltage = regulator_map_voltage_linear,
e3e5aff7 YCLP	106	};
e3e5aff7 YCLP	107
a5023574	108	static int anatop_regulator_probe(struct platform_device *pdev)
e3e5aff7 YCLP	109	{
	110	struct device *dev = &pdev->dev;
	111	struct device_node *np = dev->of_node;
baa64151	112	struct device_node *anatop_np;
e3e5aff7 YCLP	113	struct regulator_desc *rdesc;
	114	struct regulator_dev *rdev;
	115	struct anatop_regulator *sreg;
	116	struct regulator_init_data *initdata;
d914d81b	117	struct regulator_config config = { };
e3e5aff7 YCLP	118	int ret = 0;
	119
	120	initdata = of_get_regulator_init_data(dev, np);
	121	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	122	if (!sreg)
	123	return -ENOMEM;
	124	sreg->initdata = initdata;
	125	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
	126	GFP_KERNEL);
	127	rdesc = &sreg->rdesc;
	128	memset(rdesc, 0, sizeof(*rdesc));
	129	rdesc->name = sreg->name;
	130	rdesc->ops = &anatop_rops;
	131	rdesc->type = REGULATOR_VOLTAGE;
	132	rdesc->owner = THIS_MODULE;
baa64151 DA	133
	134	anatop_np = of_get_parent(np);
	135	if (!anatop_np)
	136	return -ENODEV;
	137	sreg->anatop = syscon_node_to_regmap(anatop_np);
	138	of_node_put(anatop_np);
	139	if (IS_ERR(sreg->anatop))
	140	return PTR_ERR(sreg->anatop);
	141
2f2cc27f YCLP	142	ret = of_property_read_u32(np, "anatop-reg-offset",
2f2cc27f YCLP	143	&sreg->control_reg);
e3e5aff7	144	if (ret) {
2f2cc27f	145	dev_err(dev, "no anatop-reg-offset property set\n");
e3e5aff7 YCLP	146	goto anatop_probe_end;
	147	}
	148	ret = of_property_read_u32(np, "anatop-vol-bit-width",
	149	&sreg->vol_bit_width);
	150	if (ret) {
	151	dev_err(dev, "no anatop-vol-bit-width property set\n");
	152	goto anatop_probe_end;
	153	}
	154	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
	155	&sreg->vol_bit_shift);
	156	if (ret) {
	157	dev_err(dev, "no anatop-vol-bit-shift property set\n");
	158	goto anatop_probe_end;
	159	}
	160	ret = of_property_read_u32(np, "anatop-min-bit-val",
	161	&sreg->min_bit_val);
	162	if (ret) {
	163	dev_err(dev, "no anatop-min-bit-val property set\n");
	164	goto anatop_probe_end;
	165	}
	166	ret = of_property_read_u32(np, "anatop-min-voltage",
	167	&sreg->min_voltage);
	168	if (ret) {
	169	dev_err(dev, "no anatop-min-voltage property set\n");
	170	goto anatop_probe_end;
	171	}
	172	ret = of_property_read_u32(np, "anatop-max-voltage",
	173	&sreg->max_voltage);
	174	if (ret) {
	175	dev_err(dev, "no anatop-max-voltage property set\n");
	176	goto anatop_probe_end;
	177	}
	178
9ee417c0 AH	179	/* read LDO ramp up setting, only for core reg */
	180	of_property_read_u32(np, "anatop-delay-reg-offset",
	181	&sreg->delay_reg);
	182	of_property_read_u32(np, "anatop-delay-bit-width",
	183	&sreg->delay_bit_width);
	184	of_property_read_u32(np, "anatop-delay-bit-shift",
	185	&sreg->delay_bit_shift);
	186
985884db AL	187	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
985884db AL	188	+ sreg->min_bit_val;
0713e6ab AL	189	rdesc->min_uV = sreg->min_voltage;
0713e6ab AL	190	rdesc->uV_step = 25000;
985884db	191	rdesc->linear_min_sel = sreg->min_bit_val;
e1b0144f AL	192	rdesc->vsel_reg = sreg->control_reg;
	193	rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
	194	sreg->vol_bit_shift;
e3e5aff7	195
d914d81b AL	196	config.dev = &pdev->dev;
	197	config.init_data = initdata;
	198	config.driver_data = sreg;
	199	config.of_node = pdev->dev.of_node;
e1b0144f	200	config.regmap = sreg->anatop;
d914d81b	201
e3e5aff7	202	/* register regulator */
d914d81b	203	rdev = regulator_register(rdesc, &config);
e3e5aff7 YCLP	204	if (IS_ERR(rdev)) {
	205	dev_err(dev, "failed to register %s\n",
	206	rdesc->name);
	207	ret = PTR_ERR(rdev);
	208	goto anatop_probe_end;
	209	}
	210
	211	platform_set_drvdata(pdev, rdev);
	212
	213	anatop_probe_end:
	214	if (ret)
	215	kfree(sreg->name);
	216
	217	return ret;
	218	}
	219
8dc995f5	220	static int anatop_regulator_remove(struct platform_device *pdev)
e3e5aff7 YCLP	221	{
	222	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	223	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
	224	const char *name = sreg->name;
	225
	226	regulator_unregister(rdev);
	227	kfree(name);
	228
	229	return 0;
	230	}
	231
3d68dfe3	232	static struct of_device_id of_anatop_regulator_match_tbl[] = {
e3e5aff7 YCLP	233	{ .compatible = "fsl,anatop-regulator", },
	234	{ /* end */ }
	235	};
	236
c0d78c23	237	static struct platform_driver anatop_regulator_driver = {
e3e5aff7 YCLP	238	.driver = {
	239	.name = "anatop_regulator",
	240	.owner = THIS_MODULE,
	241	.of_match_table = of_anatop_regulator_match_tbl,
	242	},
	243	.probe = anatop_regulator_probe,
5eb9f2b9	244	.remove = anatop_regulator_remove,
e3e5aff7 YCLP	245	};
	246
	247	static int __init anatop_regulator_init(void)
	248	{
c0d78c23	249	return platform_driver_register(&anatop_regulator_driver);
e3e5aff7 YCLP	250	}
	251	postcore_initcall(anatop_regulator_init);
	252
	253	static void __exit anatop_regulator_exit(void)
	254	{
c0d78c23	255	platform_driver_unregister(&anatop_regulator_driver);
e3e5aff7 YCLP	256	}
	257	module_exit(anatop_regulator_exit);
	258
	259	MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
	260	"Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
	261	MODULE_DESCRIPTION("ANATOP Regulator driver");
	262	MODULE_LICENSE("GPL v2");