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regulator: ab8500: Further populate initialisation registers
[linux-block.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
c789ca20
SI		 17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
3a8334b9
LJ		 21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
c789ca20
SI		 23#include <linux/regulator/driver.h>
24#include <linux/regulator/machine.h>
25#include <linux/regulator/ab8500.h>
3a8334b9 26#include <linux/slab.h>
c789ca20
SI		 27
28/**
29 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 30 * @dev: device pointer
c789ca20 31 * @desc: regulator description
c789ca20 32 * @regulator_dev: regulator device
47c16975 33 * @update_bank: bank to control on/off
c789ca20 34 * @update_reg: register to control on/off
e1159e6d
BJ		 35 * @update_mask: mask to enable/disable regulator
36 * @update_val_enable: bits to enable the regulator in normal (high power) mode
47c16975 37 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 38 * @voltage_reg: register to control regulator voltage
39 * @voltage_mask: mask to control regulator voltage
a0a7014c 40 * @voltage_shift: shift to control regulator voltage
42ab616a 41 * @delay: startup/set voltage delay in us
c789ca20
SI		 42 */
43struct ab8500_regulator_info {
44 struct device *dev;
45 struct regulator_desc desc;
c789ca20 46 struct regulator_dev *regulator;
47c16975
MW		 47 u8 update_bank;
48 u8 update_reg;
e1159e6d
BJ		 49 u8 update_mask;
50 u8 update_val_enable;
47c16975
MW		 51 u8 voltage_bank;
52 u8 voltage_reg;
53 u8 voltage_mask;
a0a7014c 54 u8 voltage_shift;
42ab616a 55 unsigned int delay;
c789ca20
SI		 56};
57
58/* voltage tables for the vauxn/vintcore supplies */
ec1cc4d9 59static const unsigned int ldo_vauxn_voltages[] = {
c789ca20
SI		 60 1100000,
61 1200000,
62 1300000,
63 1400000,
64 1500000,
65 1800000,
66 1850000,
67 1900000,
68 2500000,
69 2650000,
70 2700000,
71 2750000,
72 2800000,
73 2900000,
74 3000000,
75 3300000,
76};
77
ec1cc4d9 78static const unsigned int ldo_vaux3_voltages[] = {
2b75151a
BJ		 79 1200000,
80 1500000,
81 1800000,
82 2100000,
83 2500000,
84 2750000,
85 2790000,
86 2910000,
87};
88
ec1cc4d9 89static const unsigned int ldo_vintcore_voltages[] = {
c789ca20
SI		 90 1200000,
91 1225000,
92 1250000,
93 1275000,
94 1300000,
95 1325000,
96 1350000,
97};
98
99static int ab8500_regulator_enable(struct regulator_dev *rdev)
100{
fc24b426 101 int ret;
c789ca20
SI		 102 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
103
fc24b426
BJ		 104 if (info == NULL) {
105 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 106 return -EINVAL;
fc24b426 107 }
c789ca20 108
47c16975 109 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 110 info->update_bank, info->update_reg,
111 info->update_mask, info->update_val_enable);
c789ca20
SI		 112 if (ret < 0)
113 dev_err(rdev_get_dev(rdev),
114 "couldn't set enable bits for regulator\n");
09aefa12
BJ		 115
116 dev_vdbg(rdev_get_dev(rdev),
117 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
118 info->desc.name, info->update_bank, info->update_reg,
119 info->update_mask, info->update_val_enable);
120
c789ca20
SI		 121 return ret;
122}
123
124static int ab8500_regulator_disable(struct regulator_dev *rdev)
125{
fc24b426 126 int ret;
c789ca20
SI		 127 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
128
fc24b426
BJ		 129 if (info == NULL) {
130 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 131 return -EINVAL;
fc24b426 132 }
c789ca20 133
47c16975 134 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 135 info->update_bank, info->update_reg,
136 info->update_mask, 0x0);
c789ca20
SI		 137 if (ret < 0)
138 dev_err(rdev_get_dev(rdev),
139 "couldn't set disable bits for regulator\n");
09aefa12
BJ		 140
141 dev_vdbg(rdev_get_dev(rdev),
142 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
143 info->desc.name, info->update_bank, info->update_reg,
144 info->update_mask, 0x0);
145
c789ca20
SI		 146 return ret;
147}
148
149static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
150{
fc24b426 151 int ret;
c789ca20 152 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 153 u8 regval;
c789ca20 154
fc24b426
BJ		 155 if (info == NULL) {
156 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 157 return -EINVAL;
fc24b426 158 }
c789ca20 159
47c16975 160 ret = abx500_get_register_interruptible(info->dev,
09aefa12 161 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 162 if (ret < 0) {
163 dev_err(rdev_get_dev(rdev),
164 "couldn't read 0x%x register\n", info->update_reg);
165 return ret;
166 }
167
09aefa12
BJ		 168 dev_vdbg(rdev_get_dev(rdev),
169 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
170 " 0x%x\n",
171 info->desc.name, info->update_bank, info->update_reg,
172 info->update_mask, regval);
173
174 if (regval & info->update_mask)
c789ca20
SI		 175 return true;
176 else
177 return false;
178}
179
3bf6e90e 180static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
c789ca20 181{
09aefa12 182 int ret, val;
c789ca20 183 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 184 u8 regval;
c789ca20 185
fc24b426
BJ		 186 if (info == NULL) {
187 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 188 return -EINVAL;
fc24b426 189 }
c789ca20 190
09aefa12
BJ		 191 ret = abx500_get_register_interruptible(info->dev,
192 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 193 if (ret < 0) {
194 dev_err(rdev_get_dev(rdev),
195 "couldn't read voltage reg for regulator\n");
196 return ret;
197 }
198
09aefa12 199 dev_vdbg(rdev_get_dev(rdev),
a0a7014c
LW		 200 "%s-get_voltage (bank, reg, mask, shift, value): "
201 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
202 info->desc.name, info->voltage_bank,
203 info->voltage_reg, info->voltage_mask,
204 info->voltage_shift, regval);
09aefa12 205
09aefa12 206 val = regval & info->voltage_mask;
a0a7014c 207 return val >> info->voltage_shift;
c789ca20
SI		 208}
209
ae713d39
AL		 210static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
211 unsigned selector)
c789ca20 212{
fc24b426 213 int ret;
c789ca20 214 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 215 u8 regval;
c789ca20 216
fc24b426
BJ		 217 if (info == NULL) {
218 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 219 return -EINVAL;
fc24b426 220 }
c789ca20 221
c789ca20 222 /* set the registers for the request */
a0a7014c 223 regval = (u8)selector << info->voltage_shift;
47c16975 224 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 225 info->voltage_bank, info->voltage_reg,
226 info->voltage_mask, regval);
c789ca20
SI		 227 if (ret < 0)
228 dev_err(rdev_get_dev(rdev),
229 "couldn't set voltage reg for regulator\n");
230
09aefa12
BJ		 231 dev_vdbg(rdev_get_dev(rdev),
232 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
233 " 0x%x\n",
234 info->desc.name, info->voltage_bank, info->voltage_reg,
235 info->voltage_mask, regval);
236
c789ca20
SI		 237 return ret;
238}
239
42ab616a
LW		 240static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
241 unsigned int old_sel,
242 unsigned int new_sel)
243{
244 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
42ab616a 245
42ab616a
LW		 246 return info->delay;
247}
248
c789ca20
SI		 249static struct regulator_ops ab8500_regulator_ops = {
250 .enable = ab8500_regulator_enable,
251 .disable = ab8500_regulator_disable,
252 .is_enabled = ab8500_regulator_is_enabled,
3bf6e90e 253 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
ae713d39 254 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
ec1cc4d9 255 .list_voltage = regulator_list_voltage_table,
42ab616a 256 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 257};
258
6909b452 259static struct regulator_ops ab8500_regulator_fixed_ops = {
c789ca20
SI		 260 .enable = ab8500_regulator_enable,
261 .disable = ab8500_regulator_disable,
262 .is_enabled = ab8500_regulator_is_enabled,
7142e213 263 .list_voltage = regulator_list_voltage_linear,
c789ca20
SI		 264};
265
6909b452
BJ		 266static struct ab8500_regulator_info
267 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 268 /*
e1159e6d
BJ		 269 * Variable Voltage Regulators
270 * name, min mV, max mV,
271 * update bank, reg, mask, enable val
ec1cc4d9 272 * volt bank, reg, mask
c789ca20 273 */
6909b452
BJ		 274 [AB8500_LDO_AUX1] = {
275 .desc = {
276 .name = "LDO-AUX1",
277 .ops = &ab8500_regulator_ops,
278 .type = REGULATOR_VOLTAGE,
279 .id = AB8500_LDO_AUX1,
280 .owner = THIS_MODULE,
281 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 282 .volt_table = ldo_vauxn_voltages,
6909b452 283 },
6909b452
BJ		 284 .update_bank = 0x04,
285 .update_reg = 0x09,
286 .update_mask = 0x03,
287 .update_val_enable = 0x01,
288 .voltage_bank = 0x04,
289 .voltage_reg = 0x1f,
290 .voltage_mask = 0x0f,
6909b452
BJ		 291 },
292 [AB8500_LDO_AUX2] = {
293 .desc = {
294 .name = "LDO-AUX2",
295 .ops = &ab8500_regulator_ops,
296 .type = REGULATOR_VOLTAGE,
297 .id = AB8500_LDO_AUX2,
298 .owner = THIS_MODULE,
299 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 300 .volt_table = ldo_vauxn_voltages,
6909b452 301 },
6909b452
BJ		 302 .update_bank = 0x04,
303 .update_reg = 0x09,
304 .update_mask = 0x0c,
305 .update_val_enable = 0x04,
306 .voltage_bank = 0x04,
307 .voltage_reg = 0x20,
308 .voltage_mask = 0x0f,
6909b452
BJ		 309 },
310 [AB8500_LDO_AUX3] = {
311 .desc = {
312 .name = "LDO-AUX3",
313 .ops = &ab8500_regulator_ops,
314 .type = REGULATOR_VOLTAGE,
315 .id = AB8500_LDO_AUX3,
316 .owner = THIS_MODULE,
317 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
ec1cc4d9 318 .volt_table = ldo_vaux3_voltages,
6909b452 319 },
6909b452
BJ		 320 .update_bank = 0x04,
321 .update_reg = 0x0a,
322 .update_mask = 0x03,
323 .update_val_enable = 0x01,
324 .voltage_bank = 0x04,
325 .voltage_reg = 0x21,
326 .voltage_mask = 0x07,
6909b452
BJ		 327 },
328 [AB8500_LDO_INTCORE] = {
329 .desc = {
330 .name = "LDO-INTCORE",
331 .ops = &ab8500_regulator_ops,
332 .type = REGULATOR_VOLTAGE,
333 .id = AB8500_LDO_INTCORE,
334 .owner = THIS_MODULE,
335 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
ec1cc4d9 336 .volt_table = ldo_vintcore_voltages,
6909b452 337 },
6909b452
BJ		 338 .update_bank = 0x03,
339 .update_reg = 0x80,
340 .update_mask = 0x44,
341 .update_val_enable = 0x04,
342 .voltage_bank = 0x03,
343 .voltage_reg = 0x80,
344 .voltage_mask = 0x38,
a0a7014c 345 .voltage_shift = 3,
6909b452 346 },
c789ca20
SI		 347
348 /*
e1159e6d
BJ		 349 * Fixed Voltage Regulators
350 * name, fixed mV,
351 * update bank, reg, mask, enable val
c789ca20 352 */
6909b452
BJ		 353 [AB8500_LDO_TVOUT] = {
354 .desc = {
355 .name = "LDO-TVOUT",
356 .ops = &ab8500_regulator_fixed_ops,
357 .type = REGULATOR_VOLTAGE,
358 .id = AB8500_LDO_TVOUT,
359 .owner = THIS_MODULE,
360 .n_voltages = 1,
7142e213 361 .min_uV = 2000000,
7fee2afb 362 .enable_time = 10000,
6909b452 363 },
42ab616a 364 .delay = 10000,
6909b452
BJ		 365 .update_bank = 0x03,
366 .update_reg = 0x80,
367 .update_mask = 0x82,
368 .update_val_enable = 0x02,
369 },
ea05ef31
BJ		 370 [AB8500_LDO_USB] = {
371 .desc = {
372 .name = "LDO-USB",
373 .ops = &ab8500_regulator_fixed_ops,
374 .type = REGULATOR_VOLTAGE,
375 .id = AB8500_LDO_USB,
376 .owner = THIS_MODULE,
377 .n_voltages = 1,
7142e213 378 .min_uV = 3300000,
ea05ef31 379 },
ea05ef31
BJ		 380 .update_bank = 0x03,
381 .update_reg = 0x82,
382 .update_mask = 0x03,
383 .update_val_enable = 0x01,
384 },
6909b452
BJ		 385 [AB8500_LDO_AUDIO] = {
386 .desc = {
387 .name = "LDO-AUDIO",
388 .ops = &ab8500_regulator_fixed_ops,
389 .type = REGULATOR_VOLTAGE,
390 .id = AB8500_LDO_AUDIO,
391 .owner = THIS_MODULE,
392 .n_voltages = 1,
7142e213 393 .min_uV = 2000000,
6909b452 394 },
6909b452
BJ		 395 .update_bank = 0x03,
396 .update_reg = 0x83,
397 .update_mask = 0x02,
398 .update_val_enable = 0x02,
399 },
400 [AB8500_LDO_ANAMIC1] = {
401 .desc = {
402 .name = "LDO-ANAMIC1",
403 .ops = &ab8500_regulator_fixed_ops,
404 .type = REGULATOR_VOLTAGE,
405 .id = AB8500_LDO_ANAMIC1,
406 .owner = THIS_MODULE,
407 .n_voltages = 1,
7142e213 408 .min_uV = 2050000,
6909b452 409 },
6909b452
BJ		 410 .update_bank = 0x03,
411 .update_reg = 0x83,
412 .update_mask = 0x08,
413 .update_val_enable = 0x08,
414 },
415 [AB8500_LDO_ANAMIC2] = {
416 .desc = {
417 .name = "LDO-ANAMIC2",
418 .ops = &ab8500_regulator_fixed_ops,
419 .type = REGULATOR_VOLTAGE,
420 .id = AB8500_LDO_ANAMIC2,
421 .owner = THIS_MODULE,
422 .n_voltages = 1,
7142e213 423 .min_uV = 2050000,
6909b452 424 },
6909b452
BJ		 425 .update_bank = 0x03,
426 .update_reg = 0x83,
427 .update_mask = 0x10,
428 .update_val_enable = 0x10,
429 },
430 [AB8500_LDO_DMIC] = {
431 .desc = {
432 .name = "LDO-DMIC",
433 .ops = &ab8500_regulator_fixed_ops,
434 .type = REGULATOR_VOLTAGE,
435 .id = AB8500_LDO_DMIC,
436 .owner = THIS_MODULE,
437 .n_voltages = 1,
7142e213 438 .min_uV = 1800000,
6909b452 439 },
6909b452
BJ		 440 .update_bank = 0x03,
441 .update_reg = 0x83,
442 .update_mask = 0x04,
443 .update_val_enable = 0x04,
444 },
445 [AB8500_LDO_ANA] = {
446 .desc = {
447 .name = "LDO-ANA",
448 .ops = &ab8500_regulator_fixed_ops,
449 .type = REGULATOR_VOLTAGE,
450 .id = AB8500_LDO_ANA,
451 .owner = THIS_MODULE,
452 .n_voltages = 1,
7142e213 453 .min_uV = 1200000,
6909b452 454 },
6909b452
BJ		 455 .update_bank = 0x04,
456 .update_reg = 0x06,
457 .update_mask = 0x0c,
458 .update_val_enable = 0x04,
459 },
460
461
c789ca20
SI		 462};
463
79568b94
BJ		 464struct ab8500_reg_init {
465 u8 bank;
466 u8 addr;
467 u8 mask;
468};
469
470#define REG_INIT(_id, _bank, _addr, _mask) \
471 [_id] = { \
472 .bank = _bank, \
473 .addr = _addr, \
474 .mask = _mask, \
475 }
476
477static struct ab8500_reg_init ab8500_reg_init[] = {
478 /*
479 * 0x30, VanaRequestCtrl
d79df329 480 * 0x0c, VpllRequestCtrl
79568b94
BJ		 481 * 0xc0, VextSupply1RequestCtrl
482 */
483 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc),
484 /*
485 * 0x03, VextSupply2RequestCtrl
486 * 0x0c, VextSupply3RequestCtrl
487 * 0x30, Vaux1RequestCtrl
488 * 0xc0, Vaux2RequestCtrl
489 */
490 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
491 /*
492 * 0x03, Vaux3RequestCtrl
493 * 0x04, SwHPReq
494 */
495 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
496 /*
d79df329
LJ		 497 * 0x01, Vsmps1SysClkReq1HPValid
498 * 0x02, Vsmps2SysClkReq1HPValid
499 * 0x04, Vsmps3SysClkReq1HPValid
79568b94 500 * 0x08, VanaSysClkReq1HPValid
d79df329 501 * 0x10, VpllSysClkReq1HPValid
79568b94
BJ		 502 * 0x20, Vaux1SysClkReq1HPValid
503 * 0x40, Vaux2SysClkReq1HPValid
504 * 0x80, Vaux3SysClkReq1HPValid
505 */
d79df329 506 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
79568b94
BJ		 507 /*
508 * 0x10, VextSupply1SysClkReq1HPValid
509 * 0x20, VextSupply2SysClkReq1HPValid
510 * 0x40, VextSupply3SysClkReq1HPValid
511 */
512 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
513 /*
514 * 0x08, VanaHwHPReq1Valid
515 * 0x20, Vaux1HwHPReq1Valid
516 * 0x40, Vaux2HwHPReq1Valid
517 * 0x80, Vaux3HwHPReq1Valid
518 */
519 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
520 /*
521 * 0x01, VextSupply1HwHPReq1Valid
522 * 0x02, VextSupply2HwHPReq1Valid
523 * 0x04, VextSupply3HwHPReq1Valid
524 */
525 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
526 /*
527 * 0x08, VanaHwHPReq2Valid
528 * 0x20, Vaux1HwHPReq2Valid
529 * 0x40, Vaux2HwHPReq2Valid
530 * 0x80, Vaux3HwHPReq2Valid
531 */
532 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
533 /*
534 * 0x01, VextSupply1HwHPReq2Valid
535 * 0x02, VextSupply2HwHPReq2Valid
536 * 0x04, VextSupply3HwHPReq2Valid
537 */
538 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
539 /*
540 * 0x20, VanaSwHPReqValid
541 * 0x80, Vaux1SwHPReqValid
542 */
543 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
544 /*
545 * 0x01, Vaux2SwHPReqValid
546 * 0x02, Vaux3SwHPReqValid
547 * 0x04, VextSupply1SwHPReqValid
548 * 0x08, VextSupply2SwHPReqValid
549 * 0x10, VextSupply3SwHPReqValid
550 */
551 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
552 /*
553 * 0x02, SysClkReq2Valid1
554 * ...
555 * 0x80, SysClkReq8Valid1
556 */
557 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
558 /*
559 * 0x02, SysClkReq2Valid2
560 * ...
561 * 0x80, SysClkReq8Valid2
562 */
563 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
564 /*
565 * 0x02, VTVoutEna
566 * 0x04, Vintcore12Ena
567 * 0x38, Vintcore12Sel
568 * 0x40, Vintcore12LP
569 * 0x80, VTVoutLP
570 */
571 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
572 /*
573 * 0x02, VaudioEna
574 * 0x04, VdmicEna
575 * 0x08, Vamic1Ena
576 * 0x10, Vamic2Ena
577 */
578 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
579 /*
580 * 0x01, Vamic1_dzout
581 * 0x02, Vamic2_dzout
582 */
583 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
d79df329
LJ		 584 /*
585 * 0x0c, VBBNRegu
586 * 0x03, VBBPRegu
587 * NOTE! PRCMU register
588 */
589 REG_INIT(AB8500_ARMREGU2, 0x04, 0x01, 0x0f),
590 /*
591 * 0x0c, VBBPSel1
592 * 0x03, VBBNSel1
593 * NOTE! PRCMU register
594 */
595 REG_INIT(AB8500_VBBSEL1, 0x04, 0x11, 0x0f),
596 /*
597 * 0x0c, VBBNSel2
598 * 0x03, VBBPSel2
599 * NOTE! PRCMU register
600 */
601 REG_INIT(AB8500_VBBSEL2, 0x04, 0x12, 0x0f),
602 /*
603 * 0x03, Vsmps1Regu
604 * 0x0c, Vsmps1SelCtrl
605 */
606 REG_INIT(AB8500_VSMPS1REGU, 0x04, 0x03, 0x0f),
607 /*
608 * 0x03, Vsmps2Regu
609 * 0x0c, Vsmps2SelCtrl
610 */
611 REG_INIT(AB8500_VSMPS2REGU, 0x04, 0x04, 0x0f),
79568b94
BJ		 612 /*
613 * 0x0c, VanaRegu
614 * 0x03, VpllRegu
615 */
616 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
617 /*
618 * 0x01, VrefDDREna
619 * 0x02, VrefDDRSleepMode
620 */
621 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
622 /*
623 * 0x03, VextSupply1Regu
624 * 0x0c, VextSupply2Regu
625 * 0x30, VextSupply3Regu
626 * 0x40, ExtSupply2Bypass
627 * 0x80, ExtSupply3Bypass
628 */
629 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
630 /*
631 * 0x03, Vaux1Regu
632 * 0x0c, Vaux2Regu
633 */
634 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
635 /*
d79df329 636 * 0x0c, Vrf1Regu
79568b94
BJ		 637 * 0x03, Vaux3Regu
638 */
d79df329 639 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
79568b94
BJ		 640 /*
641 * 0x3f, Vsmps1Sel1
642 */
643 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
644 /*
645 * 0x0f, Vaux1Sel
646 */
647 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
648 /*
649 * 0x0f, Vaux2Sel
650 */
651 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
652 /*
653 * 0x07, Vaux3Sel
654 */
655 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
656 /*
657 * 0x01, VextSupply12LP
658 */
659 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
660 /*
661 * 0x04, Vaux1Disch
662 * 0x08, Vaux2Disch
663 * 0x10, Vaux3Disch
664 * 0x20, Vintcore12Disch
665 * 0x40, VTVoutDisch
666 * 0x80, VaudioDisch
667 */
668 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
669 /*
670 * 0x02, VanaDisch
671 * 0x04, VdmicPullDownEna
672 * 0x10, VdmicDisch
673 */
674 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
675};
676
a5023574 677static int
a7ac1d9e
LJ		 678ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)
679{
680 int err;
681
682 if (value & ~ab8500_reg_init[id].mask) {
683 dev_err(&pdev->dev,
684 "Configuration error: value outside mask.\n");
685 return -EINVAL;
686 }
687
688 err = abx500_mask_and_set_register_interruptible(
689 &pdev->dev,
690 ab8500_reg_init[id].bank,
691 ab8500_reg_init[id].addr,
692 ab8500_reg_init[id].mask,
693 value);
694 if (err < 0) {
695 dev_err(&pdev->dev,
696 "Failed to initialize 0x%02x, 0x%02x.\n",
697 ab8500_reg_init[id].bank,
698 ab8500_reg_init[id].addr);
699 return err;
700 }
701
702 dev_vdbg(&pdev->dev,
703 "init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
704 ab8500_reg_init[id].bank,
705 ab8500_reg_init[id].addr,
706 ab8500_reg_init[id].mask,
707 value);
708
709 return 0;
710}
711
a5023574 712static int ab8500_regulator_register(struct platform_device *pdev,
a7ac1d9e
LJ		 713 struct regulator_init_data *init_data,
714 int id,
715 struct device_node *np)
716{
717 struct ab8500_regulator_info *info = NULL;
718 struct regulator_config config = { };
719 int err;
720
721 /* assign per-regulator data */
722 info = &ab8500_regulator_info[id];
723 info->dev = &pdev->dev;
724
725 config.dev = &pdev->dev;
726 config.init_data = init_data;
727 config.driver_data = info;
728 config.of_node = np;
729
730 /* fix for hardware before ab8500v2.0 */
731 if (abx500_get_chip_id(info->dev) < 0x20) {
732 if (info->desc.id == AB8500_LDO_AUX3) {
733 info->desc.n_voltages =
734 ARRAY_SIZE(ldo_vauxn_voltages);
ec1cc4d9 735 info->desc.volt_table = ldo_vauxn_voltages;
a7ac1d9e
LJ		 736 info->voltage_mask = 0xf;
737 }
738 }
739
740 /* register regulator with framework */
741 info->regulator = regulator_register(&info->desc, &config);
742 if (IS_ERR(info->regulator)) {
743 err = PTR_ERR(info->regulator);
744 dev_err(&pdev->dev, "failed to register regulator %s\n",
745 info->desc.name);
746 /* when we fail, un-register all earlier regulators */
747 while (--id >= 0) {
748 info = &ab8500_regulator_info[id];
749 regulator_unregister(info->regulator);
750 }
751 return err;
752 }
753
754 return 0;
755}
756
3a8334b9 757static struct of_regulator_match ab8500_regulator_matches[] = {
7e715b95
LJ		 758 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
759 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
760 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
761 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
762 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
763 { .name = "ab8500_ldo_usb", .driver_data = (void *) AB8500_LDO_USB, },
764 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
765 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
766 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
767 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
768 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
3a8334b9
LJ		 769};
770
a5023574 771static int
3a8334b9
LJ		 772ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
773{
774 int err, i;
775
776 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
777 err = ab8500_regulator_register(
778 pdev, ab8500_regulator_matches[i].init_data,
779 i, ab8500_regulator_matches[i].of_node);
780 if (err)
781 return err;
782 }
783
784 return 0;
785}
786
a5023574 787static int ab8500_regulator_probe(struct platform_device *pdev)
c789ca20
SI		 788{
789 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
af54decd 790 struct ab8500_platform_data *pdata;
3a8334b9 791 struct device_node *np = pdev->dev.of_node;
c789ca20
SI		 792 int i, err;
793
3a8334b9
LJ		 794 if (np) {
795 err = of_regulator_match(&pdev->dev, np,
796 ab8500_regulator_matches,
797 ARRAY_SIZE(ab8500_regulator_matches));
798 if (err < 0) {
799 dev_err(&pdev->dev,
800 "Error parsing regulator init data: %d\n", err);
801 return err;
802 }
803
804 err = ab8500_regulator_of_probe(pdev, np);
805 return err;
806 }
807
c789ca20
SI		 808 if (!ab8500) {
809 dev_err(&pdev->dev, "null mfd parent\n");
810 return -EINVAL;
811 }
af54decd 812 pdata = dev_get_platdata(ab8500->dev);
fc24b426
BJ		 813 if (!pdata) {
814 dev_err(&pdev->dev, "null pdata\n");
815 return -EINVAL;
816 }
c789ca20 817
cb189b07
BJ		 818 /* make sure the platform data has the correct size */
819 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 820 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 821 return -EINVAL;
822 }
823
79568b94
BJ		 824 /* initialize registers */
825 for (i = 0; i < pdata->num_regulator_reg_init; i++) {
a7ac1d9e 826 int id, value;
79568b94
BJ		 827
828 id = pdata->regulator_reg_init[i].id;
829 value = pdata->regulator_reg_init[i].value;
830
831 /* check for configuration errors */
832 if (id >= AB8500_NUM_REGULATOR_REGISTERS) {
833 dev_err(&pdev->dev,
834 "Configuration error: id outside range.\n");
835 return -EINVAL;
836 }
79568b94 837
a7ac1d9e
LJ		 838 err = ab8500_regulator_init_registers(pdev, id, value);
839 if (err < 0)
79568b94 840 return err;
79568b94
BJ		 841 }
842
c789ca20
SI		 843 /* register all regulators */
844 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
a7ac1d9e
LJ		 845 err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
846 if (err < 0)
c789ca20 847 return err;
c789ca20
SI		 848 }
849
850 return 0;
851}
852
8dc995f5 853static int ab8500_regulator_remove(struct platform_device *pdev)
c789ca20
SI		 854{
855 int i;
856
857 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
858 struct ab8500_regulator_info *info = NULL;
859 info = &ab8500_regulator_info[i];
09aefa12
BJ		 860
861 dev_vdbg(rdev_get_dev(info->regulator),
862 "%s-remove\n", info->desc.name);
863
c789ca20
SI		 864 regulator_unregister(info->regulator);
865 }
866
867 return 0;
868}
869
870static struct platform_driver ab8500_regulator_driver = {
871 .probe = ab8500_regulator_probe,
5eb9f2b9 872 .remove = ab8500_regulator_remove,
c789ca20
SI		 873 .driver = {
874 .name = "ab8500-regulator",
875 .owner = THIS_MODULE,
876 },
877};
878
879static int __init ab8500_regulator_init(void)
880{
881 int ret;
882
883 ret = platform_driver_register(&ab8500_regulator_driver);
884 if (ret != 0)
885 pr_err("Failed to register ab8500 regulator: %d\n", ret);
886
887 return ret;
888}
889subsys_initcall(ab8500_regulator_init);
890
891static void __exit ab8500_regulator_exit(void)
892{
893 platform_driver_unregister(&ab8500_regulator_driver);
894}
895module_exit(ab8500_regulator_exit);
896
897MODULE_LICENSE("GPL v2");
898MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
899MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
900MODULE_ALIAS("platform:ab8500-regulator");
Linux 6.x block layer and io_uring tree(s)