[linux-2.6-block.git] / drivers / pwm / pwm-puv3.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * linux/arch/unicore32/kernel/pwm.c
 *
 * Code specific to PKUnity SoC and UniCore ISA
 *
 *	Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
 *	Copyright (C) 2001-2010 Guan Xuetao
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/pwm.h>

#include <asm/div64.h>
#include <mach/hardware.h>

struct puv3_pwm_chip {
	struct pwm_chip chip;
	void __iomem *base;
	struct clk *clk;
};

static inline struct puv3_pwm_chip *to_puv3(struct pwm_chip *chip)
{
	return container_of(chip, struct puv3_pwm_chip, chip);
}

/*
 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
 * duty_ns   = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
 */
static int puv3_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
			   int duty_ns, int period_ns)
{
	unsigned long period_cycles, prescale, pv, dc;
	struct puv3_pwm_chip *puv3 = to_puv3(chip);
	unsigned long long c;

	c = clk_get_rate(puv3->clk);
	c = c * period_ns;
	do_div(c, 1000000000);
	period_cycles = c;

	if (period_cycles < 1)
		period_cycles = 1;

	prescale = (period_cycles - 1) / 1024;
	pv = period_cycles / (prescale + 1) - 1;

	if (prescale > 63)
		return -EINVAL;

	if (duty_ns == period_ns)
		dc = OST_PWMDCCR_FDCYCLE;
	else
		dc = (pv + 1) * duty_ns / period_ns;

	/*
	 * NOTE: the clock to PWM has to be enabled first
	 * before writing to the registers
	 */
	clk_prepare_enable(puv3->clk);

	writel(prescale, puv3->base + OST_PWM_PWCR);
	writel(pv - dc, puv3->base + OST_PWM_DCCR);
	writel(pv, puv3->base + OST_PWM_PCR);

	clk_disable_unprepare(puv3->clk);

	return 0;
}

static int puv3_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct puv3_pwm_chip *puv3 = to_puv3(chip);

	return clk_prepare_enable(puv3->clk);
}

static void puv3_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct puv3_pwm_chip *puv3 = to_puv3(chip);

	clk_disable_unprepare(puv3->clk);
}

static const struct pwm_ops puv3_pwm_ops = {
	.config = puv3_pwm_config,
	.enable = puv3_pwm_enable,
	.disable = puv3_pwm_disable,
	.owner = THIS_MODULE,
};

static int pwm_probe(struct platform_device *pdev)
{
	struct puv3_pwm_chip *puv3;
	struct resource *r;
	int ret;

	puv3 = devm_kzalloc(&pdev->dev, sizeof(*puv3), GFP_KERNEL);
	if (!puv3)
		return -ENOMEM;

	puv3->clk = devm_clk_get(&pdev->dev, "OST_CLK");
	if (IS_ERR(puv3->clk))
		return PTR_ERR(puv3->clk);

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	puv3->base = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(puv3->base))
		return PTR_ERR(puv3->base);

	puv3->chip.dev = &pdev->dev;
	puv3->chip.ops = &puv3_pwm_ops;
	puv3->chip.base = -1;
	puv3->chip.npwm = 1;

	ret = pwmchip_add(&puv3->chip);
	if (ret < 0) {
		dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
		return ret;
	}

	platform_set_drvdata(pdev, puv3);
	return 0;
}

static int pwm_remove(struct platform_device *pdev)
{
	struct puv3_pwm_chip *puv3 = platform_get_drvdata(pdev);

	return pwmchip_remove(&puv3->chip);
}

static struct platform_driver puv3_pwm_driver = {
	.driver = {
		.name = "PKUnity-v3-PWM",
	},
	.probe = pwm_probe,
	.remove = pwm_remove,
};
module_platform_driver(puv3_pwm_driver);

MODULE_LICENSE("GPL v2");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
79c11b6f TR	2	/*
	3	* linux/arch/unicore32/kernel/pwm.c
	4	*
	5	* Code specific to PKUnity SoC and UniCore ISA
	6	*
	7	* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
	8	* Copyright (C) 2001-2010 Guan Xuetao
79c11b6f TR	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/kernel.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/slab.h>
	15	#include <linux/err.h>
	16	#include <linux/clk.h>
	17	#include <linux/io.h>
	18	#include <linux/pwm.h>
	19
	20	#include <asm/div64.h>
	21	#include <mach/hardware.h>
	22
	23	struct puv3_pwm_chip {
	24	struct pwm_chip chip;
	25	void __iomem *base;
	26	struct clk *clk;
79c11b6f TR	27	};
	28
	29	static inline struct puv3_pwm_chip to_puv3(struct pwm_chip chip)
	30	{
	31	return container_of(chip, struct puv3_pwm_chip, chip);
	32	}
	33
	34	/*
	35	* period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
	36	* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
	37	*/
	38	static int puv3_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	39	int duty_ns, int period_ns)
	40	{
	41	unsigned long period_cycles, prescale, pv, dc;
	42	struct puv3_pwm_chip *puv3 = to_puv3(chip);
	43	unsigned long long c;
	44
	45	c = clk_get_rate(puv3->clk);
	46	c = c * period_ns;
	47	do_div(c, 1000000000);
	48	period_cycles = c;
	49
	50	if (period_cycles < 1)
	51	period_cycles = 1;
	52
	53	prescale = (period_cycles - 1) / 1024;
	54	pv = period_cycles / (prescale + 1) - 1;
	55
	56	if (prescale > 63)
	57	return -EINVAL;
	58
	59	if (duty_ns == period_ns)
	60	dc = OST_PWMDCCR_FDCYCLE;
	61	else
	62	dc = (pv + 1) * duty_ns / period_ns;
	63
	64	/*
	65	* NOTE: the clock to PWM has to be enabled first
	66	* before writing to the registers
	67	*/
	68	clk_prepare_enable(puv3->clk);
	69
	70	writel(prescale, puv3->base + OST_PWM_PWCR);
	71	writel(pv - dc, puv3->base + OST_PWM_DCCR);
	72	writel(pv, puv3->base + OST_PWM_PCR);
	73
	74	clk_disable_unprepare(puv3->clk);
	75
	76	return 0;
	77	}
	78
	79	static int puv3_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	80	{
	81	struct puv3_pwm_chip *puv3 = to_puv3(chip);
	82
	83	return clk_prepare_enable(puv3->clk);
	84	}
	85
	86	static void puv3_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	87	{
	88	struct puv3_pwm_chip *puv3 = to_puv3(chip);
	89
	90	clk_disable_unprepare(puv3->clk);
91	}
92
93	static const struct pwm_ops puv3_pwm_ops = {
94	.config = puv3_pwm_config,
95	.enable = puv3_pwm_enable,
96	.disable = puv3_pwm_disable,
97	.owner = THIS_MODULE,
98	};
99
3e9fe83d	100	static int pwm_probe(struct platform_device *pdev)
79c11b6f TR	101	{
	102	struct puv3_pwm_chip *puv3;
	103	struct resource *r;
	104	int ret;
	105
	106	puv3 = devm_kzalloc(&pdev->dev, sizeof(*puv3), GFP_KERNEL);
6106d888	107	if (!puv3)
79c11b6f	108	return -ENOMEM;
79c11b6f TR	109
	110	puv3->clk = devm_clk_get(&pdev->dev, "OST_CLK");
	111	if (IS_ERR(puv3->clk))
	112	return PTR_ERR(puv3->clk);
	113
	114	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6d4294d1 TR	115	puv3->base = devm_ioremap_resource(&pdev->dev, r);
	116	if (IS_ERR(puv3->base))
	117	return PTR_ERR(puv3->base);
79c11b6f TR	118
	119	puv3->chip.dev = &pdev->dev;
	120	puv3->chip.ops = &puv3_pwm_ops;
	121	puv3->chip.base = -1;
	122	puv3->chip.npwm = 1;
	123
	124	ret = pwmchip_add(&puv3->chip);
	125	if (ret < 0) {
	126	dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
	127	return ret;
	128	}
	129
	130	platform_set_drvdata(pdev, puv3);
	131	return 0;
	132	}
	133
77f37917	134	static int pwm_remove(struct platform_device *pdev)
79c11b6f TR	135	{
	136	struct puv3_pwm_chip *puv3 = platform_get_drvdata(pdev);
	137
	138	return pwmchip_remove(&puv3->chip);
	139	}
	140
	141	static struct platform_driver puv3_pwm_driver = {
	142	.driver = {
	143	.name = "PKUnity-v3-PWM",
	144	},
	145	.probe = pwm_probe,
fd109112	146	.remove = pwm_remove,
79c11b6f TR	147	};
	148	module_platform_driver(puv3_pwm_driver);
	149
	150	MODULE_LICENSE("GPL v2");