[linux-block.git] / drivers / pwm / pwm-pca9685.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Driver for PCA9685 16-channel 12-bit PWM LED controller
 *
 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
 * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com>
 *
 * based on the pwm-twl-led.c driver
 */

#include <linux/acpi.h>
#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/pwm.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/bitmap.h>

/*
 * Because the PCA9685 has only one prescaler per chip, changing the period of
 * one channel affects the period of all 16 PWM outputs!
 * However, the ratio between each configured duty cycle and the chip-wide
 * period remains constant, because the OFF time is set in proportion to the
 * counter range.
 */

#define PCA9685_MODE1		0x00
#define PCA9685_MODE2		0x01
#define PCA9685_SUBADDR1	0x02
#define PCA9685_SUBADDR2	0x03
#define PCA9685_SUBADDR3	0x04
#define PCA9685_ALLCALLADDR	0x05
#define PCA9685_LEDX_ON_L	0x06
#define PCA9685_LEDX_ON_H	0x07
#define PCA9685_LEDX_OFF_L	0x08
#define PCA9685_LEDX_OFF_H	0x09

#define PCA9685_ALL_LED_ON_L	0xFA
#define PCA9685_ALL_LED_ON_H	0xFB
#define PCA9685_ALL_LED_OFF_L	0xFC
#define PCA9685_ALL_LED_OFF_H	0xFD
#define PCA9685_PRESCALE	0xFE

#define PCA9685_PRESCALE_MIN	0x03	/* => max. frequency of 1526 Hz */
#define PCA9685_PRESCALE_MAX	0xFF	/* => min. frequency of 24 Hz */

#define PCA9685_COUNTER_RANGE	4096
#define PCA9685_OSC_CLOCK_MHZ	25	/* Internal oscillator with 25 MHz */

#define PCA9685_NUMREGS		0xFF
#define PCA9685_MAXCHAN		0x10

#define LED_FULL		BIT(4)
#define MODE1_ALLCALL		BIT(0)
#define MODE1_SUB3		BIT(1)
#define MODE1_SUB2		BIT(2)
#define MODE1_SUB1		BIT(3)
#define MODE1_SLEEP		BIT(4)
#define MODE2_INVRT		BIT(4)
#define MODE2_OUTDRV		BIT(2)

#define LED_N_ON_H(N)	(PCA9685_LEDX_ON_H + (4 * (N)))
#define LED_N_ON_L(N)	(PCA9685_LEDX_ON_L + (4 * (N)))
#define LED_N_OFF_H(N)	(PCA9685_LEDX_OFF_H + (4 * (N)))
#define LED_N_OFF_L(N)	(PCA9685_LEDX_OFF_L + (4 * (N)))

#define REG_ON_H(C)	((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C)))
#define REG_ON_L(C)	((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C)))
#define REG_OFF_H(C)	((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C)))
#define REG_OFF_L(C)	((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C)))

struct pca9685 {
	struct pwm_chip chip;
	struct regmap *regmap;
#if IS_ENABLED(CONFIG_GPIOLIB)
	struct mutex lock;
	struct gpio_chip gpio;
	DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1);
#endif
};

static inline struct pca9685 *to_pca(struct pwm_chip *chip)
{
	return container_of(chip, struct pca9685, chip);
}

/* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */
static void pca9685_pwm_set_duty(struct pca9685 *pca, int channel, unsigned int duty)
{
	if (duty == 0) {
		/* Set the full OFF bit, which has the highest precedence */
		regmap_write(pca->regmap, REG_OFF_H(channel), LED_FULL);
	} else if (duty >= PCA9685_COUNTER_RANGE) {
		/* Set the full ON bit and clear the full OFF bit */
		regmap_write(pca->regmap, REG_ON_H(channel), LED_FULL);
		regmap_write(pca->regmap, REG_OFF_H(channel), 0);
	} else {
		/* Set OFF time (clears the full OFF bit) */
		regmap_write(pca->regmap, REG_OFF_L(channel), duty & 0xff);
		regmap_write(pca->regmap, REG_OFF_H(channel), (duty >> 8) & 0xf);
		/* Clear the full ON bit */
		regmap_write(pca->regmap, REG_ON_H(channel), 0);
	}
}

static unsigned int pca9685_pwm_get_duty(struct pca9685 *pca, int channel)
{
	unsigned int off_h = 0, val = 0;

	if (WARN_ON(channel >= PCA9685_MAXCHAN)) {
		/* HW does not support reading state of "all LEDs" channel */
		return 0;
	}

	regmap_read(pca->regmap, LED_N_OFF_H(channel), &off_h);
	if (off_h & LED_FULL) {
		/* Full OFF bit is set */
		return 0;
	}

	regmap_read(pca->regmap, LED_N_ON_H(channel), &val);
	if (val & LED_FULL) {
		/* Full ON bit is set */
		return PCA9685_COUNTER_RANGE;
	}

	if (regmap_read(pca->regmap, LED_N_OFF_L(channel), &val)) {
		/* Reset val to 0 in case reading LED_N_OFF_L failed */
		val = 0;
	}
	return ((off_h & 0xf) << 8) | (val & 0xff);
}

#if IS_ENABLED(CONFIG_GPIOLIB)
static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
{
	bool is_inuse;

	mutex_lock(&pca->lock);
	if (pwm_idx >= PCA9685_MAXCHAN) {
		/*
		 * "All LEDs" channel:
		 * pretend already in use if any of the PWMs are requested
		 */
		if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
			is_inuse = true;
			goto out;
		}
	} else {
		/*
		 * Regular channel:
		 * pretend already in use if the "all LEDs" channel is requested
		 */
		if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
			is_inuse = true;
			goto out;
		}
	}
	is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse);
out:
	mutex_unlock(&pca->lock);
	return is_inuse;
}

static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
{
	mutex_lock(&pca->lock);
	clear_bit(pwm_idx, pca->pwms_inuse);
	mutex_unlock(&pca->lock);
}

static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset)
{
	struct pca9685 *pca = gpiochip_get_data(gpio);

	if (pca9685_pwm_test_and_set_inuse(pca, offset))
		return -EBUSY;
	pm_runtime_get_sync(pca->chip.dev);
	return 0;
}

static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset)
{
	struct pca9685 *pca = gpiochip_get_data(gpio);

	return pca9685_pwm_get_duty(pca, offset) != 0;
}

static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset,
				 int value)
{
	struct pca9685 *pca = gpiochip_get_data(gpio);

	pca9685_pwm_set_duty(pca, offset, value ? PCA9685_COUNTER_RANGE : 0);
}

static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset)
{
	struct pca9685 *pca = gpiochip_get_data(gpio);

	pca9685_pwm_set_duty(pca, offset, 0);
	pm_runtime_put(pca->chip.dev);
	pca9685_pwm_clear_inuse(pca, offset);
}

static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip,
					  unsigned int offset)
{
	/* Always out */
	return GPIO_LINE_DIRECTION_OUT;
}

static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio,
					    unsigned int offset)
{
	return -EINVAL;
}

static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio,
					     unsigned int offset, int value)
{
	pca9685_pwm_gpio_set(gpio, offset, value);

	return 0;
}

/*
 * The PCA9685 has a bit for turning the PWM output full off or on. Some
 * boards like Intel Galileo actually uses these as normal GPIOs so we
 * expose a GPIO chip here which can exclusively take over the underlying
 * PWM channel.
 */
static int pca9685_pwm_gpio_probe(struct pca9685 *pca)
{
	struct device *dev = pca->chip.dev;

	mutex_init(&pca->lock);

	pca->gpio.label = dev_name(dev);
	pca->gpio.parent = dev;
	pca->gpio.request = pca9685_pwm_gpio_request;
	pca->gpio.free = pca9685_pwm_gpio_free;
	pca->gpio.get_direction = pca9685_pwm_gpio_get_direction;
	pca->gpio.direction_input = pca9685_pwm_gpio_direction_input;
	pca->gpio.direction_output = pca9685_pwm_gpio_direction_output;
	pca->gpio.get = pca9685_pwm_gpio_get;
	pca->gpio.set = pca9685_pwm_gpio_set;
	pca->gpio.base = -1;
	pca->gpio.ngpio = PCA9685_MAXCHAN;
	pca->gpio.can_sleep = true;

	return devm_gpiochip_add_data(dev, &pca->gpio, pca);
}
#else
static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca,
						  int pwm_idx)
{
	return false;
}

static inline void
pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
{
}

static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca)
{
	return 0;
}
#endif

static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable)
{
	regmap_update_bits(pca->regmap, PCA9685_MODE1,
			   MODE1_SLEEP, enable ? MODE1_SLEEP : 0);
	if (!enable) {
		/* Wait 500us for the oscillator to be back up */
		udelay(500);
	}
}

static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			     const struct pwm_state *state)
{
	struct pca9685 *pca = to_pca(chip);
	unsigned long long duty, prescale;
	unsigned int val = 0;

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period,
					 PCA9685_COUNTER_RANGE * 1000) - 1;
	if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) {
		dev_err(chip->dev, "pwm not changed: period out of bounds!\n");
		return -EINVAL;
	}

	if (!state->enabled) {
		pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
		return 0;
	}

	regmap_read(pca->regmap, PCA9685_PRESCALE, &val);
	if (prescale != val) {
		/*
		 * Putting the chip briefly into SLEEP mode
		 * at this point won't interfere with the
		 * pm_runtime framework, because the pm_runtime
		 * state is guaranteed active here.
		 */
		/* Put chip into sleep mode */
		pca9685_set_sleep_mode(pca, true);

		/* Change the chip-wide output frequency */
		regmap_write(pca->regmap, PCA9685_PRESCALE, prescale);

		/* Wake the chip up */
		pca9685_set_sleep_mode(pca, false);
	}

	duty = PCA9685_COUNTER_RANGE * state->duty_cycle;
	duty = DIV_ROUND_UP_ULL(duty, state->period);
	pca9685_pwm_set_duty(pca, pwm->hwpwm, duty);
	return 0;
}

static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
				  struct pwm_state *state)
{
	struct pca9685 *pca = to_pca(chip);
	unsigned long long duty;
	unsigned int val = 0;

	/* Calculate (chip-wide) period from prescale value */
	regmap_read(pca->regmap, PCA9685_PRESCALE, &val);
	/*
	 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000.
	 * The following calculation is therefore only a multiplication
	 * and we are not losing precision.
	 */
	state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) *
			(val + 1);

	/* The (per-channel) polarity is fixed */
	state->polarity = PWM_POLARITY_NORMAL;

	if (pwm->hwpwm >= PCA9685_MAXCHAN) {
		/*
		 * The "all LEDs" channel does not support HW readout
		 * Return 0 and disabled for backwards compatibility
		 */
		state->duty_cycle = 0;
		state->enabled = false;
		return;
	}

	state->enabled = true;
	duty = pca9685_pwm_get_duty(pca, pwm->hwpwm);
	state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE);
}

static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct pca9685 *pca = to_pca(chip);

	if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm))
		return -EBUSY;
	pm_runtime_get_sync(chip->dev);

	return 0;
}

static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct pca9685 *pca = to_pca(chip);

	pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
	pm_runtime_put(chip->dev);
	pca9685_pwm_clear_inuse(pca, pwm->hwpwm);
}

static const struct pwm_ops pca9685_pwm_ops = {
	.apply = pca9685_pwm_apply,
	.get_state = pca9685_pwm_get_state,
	.request = pca9685_pwm_request,
	.free = pca9685_pwm_free,
	.owner = THIS_MODULE,
};

static const struct regmap_config pca9685_regmap_i2c_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.max_register = PCA9685_NUMREGS,
	.cache_type = REGCACHE_NONE,
};

static int pca9685_pwm_probe(struct i2c_client *client,
				const struct i2c_device_id *id)
{
	struct pca9685 *pca;
	unsigned int reg;
	int ret;

	pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
	if (!pca)
		return -ENOMEM;

	pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config);
	if (IS_ERR(pca->regmap)) {
		ret = PTR_ERR(pca->regmap);
		dev_err(&client->dev, "Failed to initialize register map: %d\n",
			ret);
		return ret;
	}

	i2c_set_clientdata(client, pca);

	regmap_read(pca->regmap, PCA9685_MODE2, &reg);

	if (device_property_read_bool(&client->dev, "invert"))
		reg |= MODE2_INVRT;
	else
		reg &= ~MODE2_INVRT;

	if (device_property_read_bool(&client->dev, "open-drain"))
		reg &= ~MODE2_OUTDRV;
	else
		reg |= MODE2_OUTDRV;

	regmap_write(pca->regmap, PCA9685_MODE2, reg);

	/* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */
	regmap_read(pca->regmap, PCA9685_MODE1, &reg);
	reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3);
	regmap_write(pca->regmap, PCA9685_MODE1, reg);

	/* Reset OFF registers to POR default */
	regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, LED_FULL);
	regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, LED_FULL);

	pca->chip.ops = &pca9685_pwm_ops;
	/* Add an extra channel for ALL_LED */
	pca->chip.npwm = PCA9685_MAXCHAN + 1;

	pca->chip.dev = &client->dev;

	ret = pwmchip_add(&pca->chip);
	if (ret < 0)
		return ret;

	ret = pca9685_pwm_gpio_probe(pca);
	if (ret < 0) {
		pwmchip_remove(&pca->chip);
		return ret;
	}

	pm_runtime_enable(&client->dev);

	if (pm_runtime_enabled(&client->dev)) {
		/*
		 * Although the chip comes out of power-up in the sleep state,
		 * we force it to sleep in case it was woken up before
		 */
		pca9685_set_sleep_mode(pca, true);
		pm_runtime_set_suspended(&client->dev);
	} else {
		/* Wake the chip up if runtime PM is disabled */
		pca9685_set_sleep_mode(pca, false);
	}

	return 0;
}

static int pca9685_pwm_remove(struct i2c_client *client)
{
	struct pca9685 *pca = i2c_get_clientdata(client);
	int ret;

	ret = pwmchip_remove(&pca->chip);
	if (ret)
		return ret;

	if (!pm_runtime_enabled(&client->dev)) {
		/* Put chip in sleep state if runtime PM is disabled */
		pca9685_set_sleep_mode(pca, true);
	}

	pm_runtime_disable(&client->dev);

	return 0;
}

static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct pca9685 *pca = i2c_get_clientdata(client);

	pca9685_set_sleep_mode(pca, true);
	return 0;
}

static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct pca9685 *pca = i2c_get_clientdata(client);

	pca9685_set_sleep_mode(pca, false);
	return 0;
}

static const struct i2c_device_id pca9685_id[] = {
	{ "pca9685", 0 },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(i2c, pca9685_id);

#ifdef CONFIG_ACPI
static const struct acpi_device_id pca9685_acpi_ids[] = {
	{ "INT3492", 0 },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids);
#endif

#ifdef CONFIG_OF
static const struct of_device_id pca9685_dt_ids[] = {
	{ .compatible = "nxp,pca9685-pwm", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, pca9685_dt_ids);
#endif

static const struct dev_pm_ops pca9685_pwm_pm = {
	SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend,
			   pca9685_pwm_runtime_resume, NULL)
};

static struct i2c_driver pca9685_i2c_driver = {
	.driver = {
		.name = "pca9685-pwm",
		.acpi_match_table = ACPI_PTR(pca9685_acpi_ids),
		.of_match_table = of_match_ptr(pca9685_dt_ids),
		.pm = &pca9685_pwm_pm,
	},
	.probe = pca9685_pwm_probe,
	.remove = pca9685_pwm_remove,
	.id_table = pca9685_id,
};

module_i2c_driver(pca9685_i2c_driver);

MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
MODULE_DESCRIPTION("PWM driver for PCA9685");
MODULE_LICENSE("GPL");
Commit	Line	Data
caab277b	1	// SPDX-License-Identifier: GPL-2.0-only
88b613e6 ST	2	/*
	3	* Driver for PCA9685 16-channel 12-bit PWM LED controller
	4	*
	5	* Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
01ec8472	6	* Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com>
88b613e6 ST	7	*
88b613e6 ST	8	* based on the pwm-twl-led.c driver
88b613e6 ST	9	*/
88b613e6 ST	10
912b8439	11	#include <linux/acpi.h>
bccec89f	12	#include <linux/gpio/driver.h>
88b613e6 ST	13	#include <linux/i2c.h>
88b613e6 ST	14	#include <linux/module.h>
bccec89f	15	#include <linux/mutex.h>
88b613e6	16	#include <linux/platform_device.h>
912b8439	17	#include <linux/property.h>
88b613e6 ST	18	#include <linux/pwm.h>
	19	#include <linux/regmap.h>
	20	#include <linux/slab.h>
01ec8472	21	#include <linux/delay.h>
c40c461e	22	#include <linux/pm_runtime.h>
9cc5f232	23	#include <linux/bitmap.h>
01ec8472 CG	24
	25	/*
	26	* Because the PCA9685 has only one prescaler per chip, changing the period of
	27	* one channel affects the period of all 16 PWM outputs!
	28	* However, the ratio between each configured duty cycle and the chip-wide
	29	* period remains constant, because the OFF time is set in proportion to the
	30	* counter range.
	31	*/
88b613e6 ST	32
	33	#define PCA9685_MODE1 0x00
	34	#define PCA9685_MODE2 0x01
	35	#define PCA9685_SUBADDR1 0x02
	36	#define PCA9685_SUBADDR2 0x03
	37	#define PCA9685_SUBADDR3 0x04
	38	#define PCA9685_ALLCALLADDR 0x05
	39	#define PCA9685_LEDX_ON_L 0x06
	40	#define PCA9685_LEDX_ON_H 0x07
	41	#define PCA9685_LEDX_OFF_L 0x08
	42	#define PCA9685_LEDX_OFF_H 0x09
	43
	44	#define PCA9685_ALL_LED_ON_L 0xFA
	45	#define PCA9685_ALL_LED_ON_H 0xFB
	46	#define PCA9685_ALL_LED_OFF_L 0xFC
	47	#define PCA9685_ALL_LED_OFF_H 0xFD
	48	#define PCA9685_PRESCALE 0xFE
	49
01ec8472 CG	50	#define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */
	51	#define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */
	52
	53	#define PCA9685_COUNTER_RANGE 4096
01ec8472 CG	54	#define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */
01ec8472 CG	55
88b613e6 ST	56	#define PCA9685_NUMREGS 0xFF
	57	#define PCA9685_MAXCHAN 0x10
	58
e1057a8d	59	#define LED_FULL BIT(4)
bce54366 DJ	60	#define MODE1_ALLCALL BIT(0)
	61	#define MODE1_SUB3 BIT(1)
	62	#define MODE1_SUB2 BIT(2)
	63	#define MODE1_SUB1 BIT(3)
e1057a8d DJ	64	#define MODE1_SLEEP BIT(4)
	65	#define MODE2_INVRT BIT(4)
	66	#define MODE2_OUTDRV BIT(2)
88b613e6 ST	67
	68	#define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N)))
	69	#define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N)))
	70	#define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N)))
	71	#define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N)))
	72
9af1fba3 CG	73	#define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C)))
	74	#define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C)))
	75	#define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C)))
	76	#define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C)))
	77
88b613e6 ST	78	struct pca9685 {
	79	struct pwm_chip chip;
	80	struct regmap *regmap;
bccec89f MW	81	#if IS_ENABLED(CONFIG_GPIOLIB)
	82	struct mutex lock;
	83	struct gpio_chip gpio;
9cc5f232	84	DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1);
bccec89f	85	#endif
88b613e6 ST	86	};
	87
	88	static inline struct pca9685 to_pca(struct pwm_chip chip)
	89	{
	90	return container_of(chip, struct pca9685, chip);
	91	}
	92
9af1fba3 CG	93	/* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */
	94	static void pca9685_pwm_set_duty(struct pca9685 *pca, int channel, unsigned int duty)
	95	{
	96	if (duty == 0) {
	97	/* Set the full OFF bit, which has the highest precedence */
	98	regmap_write(pca->regmap, REG_OFF_H(channel), LED_FULL);
	99	} else if (duty >= PCA9685_COUNTER_RANGE) {
	100	/* Set the full ON bit and clear the full OFF bit */
	101	regmap_write(pca->regmap, REG_ON_H(channel), LED_FULL);
	102	regmap_write(pca->regmap, REG_OFF_H(channel), 0);
	103	} else {
	104	/* Set OFF time (clears the full OFF bit) */
	105	regmap_write(pca->regmap, REG_OFF_L(channel), duty & 0xff);
	106	regmap_write(pca->regmap, REG_OFF_H(channel), (duty >> 8) & 0xf);
	107	/* Clear the full ON bit */
	108	regmap_write(pca->regmap, REG_ON_H(channel), 0);
	109	}
	110	}
	111
	112	static unsigned int pca9685_pwm_get_duty(struct pca9685 *pca, int channel)
	113	{
	114	unsigned int off_h = 0, val = 0;
	115
	116	if (WARN_ON(channel >= PCA9685_MAXCHAN)) {
	117	/* HW does not support reading state of "all LEDs" channel */
	118	return 0;
	119	}
	120
	121	regmap_read(pca->regmap, LED_N_OFF_H(channel), &off_h);
	122	if (off_h & LED_FULL) {
	123	/* Full OFF bit is set */
	124	return 0;
	125	}
	126
	127	regmap_read(pca->regmap, LED_N_ON_H(channel), &val);
	128	if (val & LED_FULL) {
	129	/* Full ON bit is set */
	130	return PCA9685_COUNTER_RANGE;
	131	}
	132
	133	if (regmap_read(pca->regmap, LED_N_OFF_L(channel), &val)) {
	134	/* Reset val to 0 in case reading LED_N_OFF_L failed */
	135	val = 0;
	136	}
	137	return ((off_h & 0xf) << 8) \| (val & 0xff);
	138	}
	139
bccec89f	140	#if IS_ENABLED(CONFIG_GPIOLIB)
9cc5f232	141	static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
bccec89f	142	{
9cc5f232	143	bool is_inuse;
bccec89f MW	144
bccec89f MW	145	mutex_lock(&pca->lock);
9cc5f232 SVA	146	if (pwm_idx >= PCA9685_MAXCHAN) {
9cc5f232 SVA	147	/*
316b676b	148	* "All LEDs" channel:
9cc5f232 SVA	149	* pretend already in use if any of the PWMs are requested
	150	*/
	151	if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
	152	is_inuse = true;
	153	goto out;
	154	}
	155	} else {
	156	/*
316b676b	157	* Regular channel:
9cc5f232 SVA	158	* pretend already in use if the "all LEDs" channel is requested
	159	*/
	160	if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
	161	is_inuse = true;
	162	goto out;
	163	}
bccec89f	164	}
9cc5f232 SVA	165	is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse);
9cc5f232 SVA	166	out:
bccec89f	167	mutex_unlock(&pca->lock);
9cc5f232	168	return is_inuse;
bccec89f MW	169	}
bccec89f MW	170
9cc5f232	171	static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
bccec89f	172	{
bccec89f	173	mutex_lock(&pca->lock);
9cc5f232 SVA	174	clear_bit(pwm_idx, pca->pwms_inuse);
	175	mutex_unlock(&pca->lock);
	176	}
bccec89f	177
9cc5f232 SVA	178	static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset)
	179	{
	180	struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f	181
9cc5f232 SVA	182	if (pca9685_pwm_test_and_set_inuse(pca, offset))
	183	return -EBUSY;
	184	pm_runtime_get_sync(pca->chip.dev);
	185	return 0;
bccec89f MW	186	}
	187
	188	static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset)
	189	{
	190	struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f	191
9af1fba3	192	return pca9685_pwm_get_duty(pca, offset) != 0;
bccec89f MW	193	}
	194
	195	static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset,
	196	int value)
	197	{
	198	struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f	199
9af1fba3	200	pca9685_pwm_set_duty(pca, offset, value ? PCA9685_COUNTER_RANGE : 0);
bccec89f MW	201	}
bccec89f MW	202
c40c461e SVA	203	static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset)
	204	{
	205	struct pca9685 *pca = gpiochip_get_data(gpio);
c40c461e	206
9af1fba3	207	pca9685_pwm_set_duty(pca, offset, 0);
c40c461e	208	pm_runtime_put(pca->chip.dev);
9cc5f232	209	pca9685_pwm_clear_inuse(pca, offset);
c40c461e SVA	210	}
c40c461e SVA	211
bccec89f MW	212	static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip,
	213	unsigned int offset)
	214	{
	215	/* Always out */
a37507d5	216	return GPIO_LINE_DIRECTION_OUT;
bccec89f MW	217	}
	218
	219	static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio,
	220	unsigned int offset)
	221	{
	222	return -EINVAL;
	223	}
	224
	225	static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio,
	226	unsigned int offset, int value)
	227	{
	228	pca9685_pwm_gpio_set(gpio, offset, value);
	229
	230	return 0;
	231	}
	232
	233	/*
	234	* The PCA9685 has a bit for turning the PWM output full off or on. Some
	235	* boards like Intel Galileo actually uses these as normal GPIOs so we
	236	* expose a GPIO chip here which can exclusively take over the underlying
	237	* PWM channel.
	238	*/
	239	static int pca9685_pwm_gpio_probe(struct pca9685 *pca)
	240	{
	241	struct device *dev = pca->chip.dev;
	242
	243	mutex_init(&pca->lock);
	244
	245	pca->gpio.label = dev_name(dev);
	246	pca->gpio.parent = dev;
	247	pca->gpio.request = pca9685_pwm_gpio_request;
	248	pca->gpio.free = pca9685_pwm_gpio_free;
	249	pca->gpio.get_direction = pca9685_pwm_gpio_get_direction;
	250	pca->gpio.direction_input = pca9685_pwm_gpio_direction_input;
	251	pca->gpio.direction_output = pca9685_pwm_gpio_direction_output;
	252	pca->gpio.get = pca9685_pwm_gpio_get;
	253	pca->gpio.set = pca9685_pwm_gpio_set;
	254	pca->gpio.base = -1;
	255	pca->gpio.ngpio = PCA9685_MAXCHAN;
	256	pca->gpio.can_sleep = true;
	257
	258	return devm_gpiochip_add_data(dev, &pca->gpio, pca);
	259	}
	260	#else
9cc5f232 SVA	261	static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca,
9cc5f232 SVA	262	int pwm_idx)
bccec89f MW	263	{
	264	return false;
	265	}
	266
9cc5f232 SVA	267	static inline void
	268	pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
	269	{
	270	}
	271
bccec89f MW	272	static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca)
	273	{
	274	return 0;
	275	}
	276	#endif
	277
0829326a	278	static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable)
c40c461e SVA	279	{
c40c461e SVA	280	regmap_update_bits(pca->regmap, PCA9685_MODE1,
0829326a SVA	281	MODE1_SLEEP, enable ? MODE1_SLEEP : 0);
0829326a SVA	282	if (!enable) {
c40c461e SVA	283	/* Wait 500us for the oscillator to be back up */
	284	udelay(500);
	285	}
	286	}
	287
9af1fba3 CG	288	static int pca9685_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
9af1fba3 CG	289	const struct pwm_state *state)
88b613e6 ST	290	{
88b613e6 ST	291	struct pca9685 *pca = to_pca(chip);
9af1fba3 CG	292	unsigned long long duty, prescale;
9af1fba3 CG	293	unsigned int val = 0;
88b613e6	294
9af1fba3 CG	295	if (state->polarity != PWM_POLARITY_NORMAL)
9af1fba3 CG	296	return -EINVAL;
88b613e6	297
9af1fba3 CG	298	prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period,
	299	PCA9685_COUNTER_RANGE * 1000) - 1;
	300	if (prescale < PCA9685_PRESCALE_MIN \|\| prescale > PCA9685_PRESCALE_MAX) {
	301	dev_err(chip->dev, "pwm not changed: period out of bounds!\n");
	302	return -EINVAL;
88b613e6 ST	303	}
88b613e6 ST	304
9af1fba3 CG	305	if (!state->enabled) {
9af1fba3 CG	306	pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
88b613e6 ST	307	return 0;
	308	}
	309
9af1fba3 CG	310	regmap_read(pca->regmap, PCA9685_PRESCALE, &val);
	311	if (prescale != val) {
	312	/*
	313	* Putting the chip briefly into SLEEP mode
	314	* at this point won't interfere with the
	315	* pm_runtime framework, because the pm_runtime
	316	* state is guaranteed active here.
	317	*/
	318	/* Put chip into sleep mode */
	319	pca9685_set_sleep_mode(pca, true);
88b613e6	320
9af1fba3 CG	321	/* Change the chip-wide output frequency */
9af1fba3 CG	322	regmap_write(pca->regmap, PCA9685_PRESCALE, prescale);
88b613e6	323
9af1fba3 CG	324	/* Wake the chip up */
	325	pca9685_set_sleep_mode(pca, false);
	326	}
88b613e6	327
9af1fba3 CG	328	duty = PCA9685_COUNTER_RANGE * state->duty_cycle;
	329	duty = DIV_ROUND_UP_ULL(duty, state->period);
	330	pca9685_pwm_set_duty(pca, pwm->hwpwm, duty);
88b613e6 ST	331	return 0;
	332	}
	333
8f4768a5 CG	334	static void pca9685_pwm_get_state(struct pwm_chip chip, struct pwm_device pwm,
	335	struct pwm_state *state)
	336	{
	337	struct pca9685 *pca = to_pca(chip);
	338	unsigned long long duty;
	339	unsigned int val = 0;
	340
	341	/* Calculate (chip-wide) period from prescale value */
	342	regmap_read(pca->regmap, PCA9685_PRESCALE, &val);
	343	/*
	344	* PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000.
	345	* The following calculation is therefore only a multiplication
	346	* and we are not losing precision.
	347	*/
	348	state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) *
	349	(val + 1);
	350
	351	/* The (per-channel) polarity is fixed */
	352	state->polarity = PWM_POLARITY_NORMAL;
	353
	354	if (pwm->hwpwm >= PCA9685_MAXCHAN) {
	355	/*
	356	* The "all LEDs" channel does not support HW readout
	357	* Return 0 and disabled for backwards compatibility
	358	*/
	359	state->duty_cycle = 0;
	360	state->enabled = false;
	361	return;
	362	}
	363
	364	state->enabled = true;
	365	duty = pca9685_pwm_get_duty(pca, pwm->hwpwm);
	366	state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE);
	367	}
	368
88b613e6 ST	369	static int pca9685_pwm_request(struct pwm_chip chip, struct pwm_device pwm)
	370	{
	371	struct pca9685 *pca = to_pca(chip);
	372
9cc5f232	373	if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm))
bccec89f	374	return -EBUSY;
c40c461e	375	pm_runtime_get_sync(chip->dev);
88b613e6 ST	376
	377	return 0;
	378	}
	379
	380	static void pca9685_pwm_free(struct pwm_chip chip, struct pwm_device pwm)
	381	{
9cc5f232 SVA	382	struct pca9685 *pca = to_pca(chip);
9cc5f232 SVA	383
9af1fba3	384	pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
c40c461e	385	pm_runtime_put(chip->dev);
9cc5f232	386	pca9685_pwm_clear_inuse(pca, pwm->hwpwm);
88b613e6 ST	387	}
	388
	389	static const struct pwm_ops pca9685_pwm_ops = {
9af1fba3	390	.apply = pca9685_pwm_apply,
8f4768a5	391	.get_state = pca9685_pwm_get_state,
88b613e6 ST	392	.request = pca9685_pwm_request,
88b613e6 ST	393	.free = pca9685_pwm_free,
3dd0a909	394	.owner = THIS_MODULE,
88b613e6 ST	395	};
88b613e6 ST	396
c456fbb2	397	static const struct regmap_config pca9685_regmap_i2c_config = {
88b613e6 ST	398	.reg_bits = 8,
	399	.val_bits = 8,
	400	.max_register = PCA9685_NUMREGS,
	401	.cache_type = REGCACHE_NONE,
	402	};
	403
	404	static int pca9685_pwm_probe(struct i2c_client *client,
	405	const struct i2c_device_id *id)
	406	{
88b613e6	407	struct pca9685 *pca;
bce54366	408	unsigned int reg;
88b613e6	409	int ret;
88b613e6 ST	410
	411	pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
	412	if (!pca)
	413	return -ENOMEM;
	414
	415	pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config);
	416	if (IS_ERR(pca->regmap)) {
	417	ret = PTR_ERR(pca->regmap);
	418	dev_err(&client->dev, "Failed to initialize register map: %d\n",
	419	ret);
	420	return ret;
	421	}
	422
	423	i2c_set_clientdata(client, pca);
	424
bce54366	425	regmap_read(pca->regmap, PCA9685_MODE2, &reg);
88b613e6	426
912b8439	427	if (device_property_read_bool(&client->dev, "invert"))
bce54366	428	reg \|= MODE2_INVRT;
88b613e6	429	else
bce54366	430	reg &= ~MODE2_INVRT;
88b613e6	431
912b8439	432	if (device_property_read_bool(&client->dev, "open-drain"))
bce54366	433	reg &= ~MODE2_OUTDRV;
88b613e6	434	else
bce54366 DJ	435	reg \|= MODE2_OUTDRV;
	436
	437	regmap_write(pca->regmap, PCA9685_MODE2, reg);
88b613e6	438
bce54366 DJ	439	/* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */
	440	regmap_read(pca->regmap, PCA9685_MODE1, &reg);
	441	reg &= ~(MODE1_ALLCALL \| MODE1_SUB1 \| MODE1_SUB2 \| MODE1_SUB3);
	442	regmap_write(pca->regmap, PCA9685_MODE1, reg);
88b613e6	443
9af1fba3 CG	444	/* Reset OFF registers to POR default */
	445	regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, LED_FULL);
	446	regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, LED_FULL);
88b613e6 ST	447
88b613e6 ST	448	pca->chip.ops = &pca9685_pwm_ops;
316b676b	449	/* Add an extra channel for ALL_LED */
88b613e6 ST	450	pca->chip.npwm = PCA9685_MAXCHAN + 1;
	451
	452	pca->chip.dev = &client->dev;
88b613e6	453
bccec89f MW	454	ret = pwmchip_add(&pca->chip);
	455	if (ret < 0)
	456	return ret;
	457
	458	ret = pca9685_pwm_gpio_probe(pca);
c40c461e	459	if (ret < 0) {
bccec89f	460	pwmchip_remove(&pca->chip);
c40c461e SVA	461	return ret;
	462	}
	463
c40c461e	464	pm_runtime_enable(&client->dev);
bccec89f	465
9e6fd830 CG	466	if (pm_runtime_enabled(&client->dev)) {
	467	/*
	468	* Although the chip comes out of power-up in the sleep state,
	469	* we force it to sleep in case it was woken up before
	470	*/
	471	pca9685_set_sleep_mode(pca, true);
	472	pm_runtime_set_suspended(&client->dev);
	473	} else {
	474	/* Wake the chip up if runtime PM is disabled */
	475	pca9685_set_sleep_mode(pca, false);
	476	}
	477
c40c461e	478	return 0;
88b613e6 ST	479	}
	480
	481	static int pca9685_pwm_remove(struct i2c_client *client)
	482	{
	483	struct pca9685 *pca = i2c_get_clientdata(client);
c40c461e	484	int ret;
88b613e6	485
c40c461e SVA	486	ret = pwmchip_remove(&pca->chip);
	487	if (ret)
	488	return ret;
9e6fd830 CG	489
	490	if (!pm_runtime_enabled(&client->dev)) {
	491	/* Put chip in sleep state if runtime PM is disabled */
	492	pca9685_set_sleep_mode(pca, true);
	493	}
	494
c40c461e	495	pm_runtime_disable(&client->dev);
9e6fd830	496
c40c461e SVA	497	return 0;
c40c461e SVA	498	}
88b613e6	499
408a7591	500	static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev)
c40c461e SVA	501	{
	502	struct i2c_client *client = to_i2c_client(dev);
	503	struct pca9685 *pca = i2c_get_clientdata(client);
	504
0829326a	505	pca9685_set_sleep_mode(pca, true);
c40c461e	506	return 0;
88b613e6 ST	507	}
88b613e6 ST	508
408a7591	509	static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev)
c40c461e SVA	510	{
	511	struct i2c_client *client = to_i2c_client(dev);
	512	struct pca9685 *pca = i2c_get_clientdata(client);
	513
0829326a	514	pca9685_set_sleep_mode(pca, false);
c40c461e SVA	515	return 0;
c40c461e SVA	516	}
c40c461e	517
88b613e6 ST	518	static const struct i2c_device_id pca9685_id[] = {
	519	{ "pca9685", 0 },
	520	{ /* sentinel */ },
	521	};
	522	MODULE_DEVICE_TABLE(i2c, pca9685_id);
	523
912b8439 AS	524	#ifdef CONFIG_ACPI
	525	static const struct acpi_device_id pca9685_acpi_ids[] = {
	526	{ "INT3492", 0 },
	527	{ /* sentinel */ },
	528	};
	529	MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids);
	530	#endif
	531
	532	#ifdef CONFIG_OF
88b613e6 ST	533	static const struct of_device_id pca9685_dt_ids[] = {
	534	{ .compatible = "nxp,pca9685-pwm", },
	535	{ /* sentinel */ }
	536	};
	537	MODULE_DEVICE_TABLE(of, pca9685_dt_ids);
912b8439	538	#endif
88b613e6	539
c40c461e SVA	540	static const struct dev_pm_ops pca9685_pwm_pm = {
	541	SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend,
	542	pca9685_pwm_runtime_resume, NULL)
	543	};
	544
88b613e6 ST	545	static struct i2c_driver pca9685_i2c_driver = {
	546	.driver = {
	547	.name = "pca9685-pwm",
912b8439 AS	548	.acpi_match_table = ACPI_PTR(pca9685_acpi_ids),
912b8439 AS	549	.of_match_table = of_match_ptr(pca9685_dt_ids),
c40c461e	550	.pm = &pca9685_pwm_pm,
88b613e6 ST	551	},
	552	.probe = pca9685_pwm_probe,
	553	.remove = pca9685_pwm_remove,
	554	.id_table = pca9685_id,
	555	};
	556
	557	module_i2c_driver(pca9685_i2c_driver);
	558
	559	MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
	560	MODULE_DESCRIPTION("PWM driver for PCA9685");
	561	MODULE_LICENSE("GPL");