Commit | Line | Data |
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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
88b613e6 ST |
2 | /* |
3 | * Driver for PCA9685 16-channel 12-bit PWM LED controller | |
4 | * | |
5 | * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> | |
01ec8472 | 6 | * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com> |
88b613e6 ST |
7 | * |
8 | * based on the pwm-twl-led.c driver | |
88b613e6 ST |
9 | */ |
10 | ||
912b8439 | 11 | #include <linux/acpi.h> |
bccec89f | 12 | #include <linux/gpio/driver.h> |
88b613e6 ST |
13 | #include <linux/i2c.h> |
14 | #include <linux/module.h> | |
bccec89f | 15 | #include <linux/mutex.h> |
88b613e6 | 16 | #include <linux/platform_device.h> |
912b8439 | 17 | #include <linux/property.h> |
88b613e6 ST |
18 | #include <linux/pwm.h> |
19 | #include <linux/regmap.h> | |
20 | #include <linux/slab.h> | |
01ec8472 | 21 | #include <linux/delay.h> |
c40c461e | 22 | #include <linux/pm_runtime.h> |
01ec8472 CG |
23 | |
24 | /* | |
25 | * Because the PCA9685 has only one prescaler per chip, changing the period of | |
26 | * one channel affects the period of all 16 PWM outputs! | |
27 | * However, the ratio between each configured duty cycle and the chip-wide | |
28 | * period remains constant, because the OFF time is set in proportion to the | |
29 | * counter range. | |
30 | */ | |
88b613e6 ST |
31 | |
32 | #define PCA9685_MODE1 0x00 | |
33 | #define PCA9685_MODE2 0x01 | |
34 | #define PCA9685_SUBADDR1 0x02 | |
35 | #define PCA9685_SUBADDR2 0x03 | |
36 | #define PCA9685_SUBADDR3 0x04 | |
37 | #define PCA9685_ALLCALLADDR 0x05 | |
38 | #define PCA9685_LEDX_ON_L 0x06 | |
39 | #define PCA9685_LEDX_ON_H 0x07 | |
40 | #define PCA9685_LEDX_OFF_L 0x08 | |
41 | #define PCA9685_LEDX_OFF_H 0x09 | |
42 | ||
43 | #define PCA9685_ALL_LED_ON_L 0xFA | |
44 | #define PCA9685_ALL_LED_ON_H 0xFB | |
45 | #define PCA9685_ALL_LED_OFF_L 0xFC | |
46 | #define PCA9685_ALL_LED_OFF_H 0xFD | |
47 | #define PCA9685_PRESCALE 0xFE | |
48 | ||
01ec8472 CG |
49 | #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */ |
50 | #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */ | |
51 | ||
52 | #define PCA9685_COUNTER_RANGE 4096 | |
53 | #define PCA9685_DEFAULT_PERIOD 5000000 /* Default period_ns = 1/200 Hz */ | |
54 | #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */ | |
55 | ||
88b613e6 ST |
56 | #define PCA9685_NUMREGS 0xFF |
57 | #define PCA9685_MAXCHAN 0x10 | |
58 | ||
59 | #define LED_FULL (1 << 4) | |
60 | #define MODE1_SLEEP (1 << 4) | |
61 | #define MODE2_INVRT (1 << 4) | |
62 | #define MODE2_OUTDRV (1 << 2) | |
63 | ||
64 | #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) | |
65 | #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) | |
66 | #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N))) | |
67 | #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N))) | |
68 | ||
69 | struct pca9685 { | |
70 | struct pwm_chip chip; | |
71 | struct regmap *regmap; | |
01ec8472 CG |
72 | int duty_ns; |
73 | int period_ns; | |
bccec89f MW |
74 | #if IS_ENABLED(CONFIG_GPIOLIB) |
75 | struct mutex lock; | |
76 | struct gpio_chip gpio; | |
77 | #endif | |
88b613e6 ST |
78 | }; |
79 | ||
80 | static inline struct pca9685 *to_pca(struct pwm_chip *chip) | |
81 | { | |
82 | return container_of(chip, struct pca9685, chip); | |
83 | } | |
84 | ||
bccec89f MW |
85 | #if IS_ENABLED(CONFIG_GPIOLIB) |
86 | static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset) | |
87 | { | |
88 | struct pca9685 *pca = gpiochip_get_data(gpio); | |
89 | struct pwm_device *pwm; | |
90 | ||
91 | mutex_lock(&pca->lock); | |
92 | ||
93 | pwm = &pca->chip.pwms[offset]; | |
94 | ||
95 | if (pwm->flags & (PWMF_REQUESTED | PWMF_EXPORTED)) { | |
96 | mutex_unlock(&pca->lock); | |
97 | return -EBUSY; | |
98 | } | |
99 | ||
100 | pwm_set_chip_data(pwm, (void *)1); | |
101 | ||
102 | mutex_unlock(&pca->lock); | |
c40c461e | 103 | pm_runtime_get_sync(pca->chip.dev); |
bccec89f MW |
104 | return 0; |
105 | } | |
106 | ||
bccec89f MW |
107 | static bool pca9685_pwm_is_gpio(struct pca9685 *pca, struct pwm_device *pwm) |
108 | { | |
109 | bool is_gpio = false; | |
110 | ||
111 | mutex_lock(&pca->lock); | |
112 | ||
113 | if (pwm->hwpwm >= PCA9685_MAXCHAN) { | |
114 | unsigned int i; | |
115 | ||
116 | /* | |
117 | * Check if any of the GPIOs are requested and in that case | |
118 | * prevent using the "all LEDs" channel. | |
119 | */ | |
120 | for (i = 0; i < pca->gpio.ngpio; i++) | |
121 | if (gpiochip_is_requested(&pca->gpio, i)) { | |
122 | is_gpio = true; | |
123 | break; | |
124 | } | |
125 | } else if (pwm_get_chip_data(pwm)) { | |
126 | is_gpio = true; | |
127 | } | |
128 | ||
129 | mutex_unlock(&pca->lock); | |
130 | return is_gpio; | |
131 | } | |
132 | ||
133 | static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset) | |
134 | { | |
135 | struct pca9685 *pca = gpiochip_get_data(gpio); | |
136 | struct pwm_device *pwm = &pca->chip.pwms[offset]; | |
137 | unsigned int value; | |
138 | ||
139 | regmap_read(pca->regmap, LED_N_ON_H(pwm->hwpwm), &value); | |
140 | ||
141 | return value & LED_FULL; | |
142 | } | |
143 | ||
144 | static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset, | |
145 | int value) | |
146 | { | |
147 | struct pca9685 *pca = gpiochip_get_data(gpio); | |
148 | struct pwm_device *pwm = &pca->chip.pwms[offset]; | |
149 | unsigned int on = value ? LED_FULL : 0; | |
150 | ||
151 | /* Clear both OFF registers */ | |
152 | regmap_write(pca->regmap, LED_N_OFF_L(pwm->hwpwm), 0); | |
153 | regmap_write(pca->regmap, LED_N_OFF_H(pwm->hwpwm), 0); | |
154 | ||
155 | /* Set the full ON bit */ | |
156 | regmap_write(pca->regmap, LED_N_ON_H(pwm->hwpwm), on); | |
157 | } | |
158 | ||
c40c461e SVA |
159 | static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset) |
160 | { | |
161 | struct pca9685 *pca = gpiochip_get_data(gpio); | |
162 | struct pwm_device *pwm; | |
163 | ||
164 | pca9685_pwm_gpio_set(gpio, offset, 0); | |
165 | pm_runtime_put(pca->chip.dev); | |
166 | mutex_lock(&pca->lock); | |
167 | pwm = &pca->chip.pwms[offset]; | |
c40c461e SVA |
168 | mutex_unlock(&pca->lock); |
169 | } | |
170 | ||
bccec89f MW |
171 | static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip, |
172 | unsigned int offset) | |
173 | { | |
174 | /* Always out */ | |
175 | return 0; | |
176 | } | |
177 | ||
178 | static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio, | |
179 | unsigned int offset) | |
180 | { | |
181 | return -EINVAL; | |
182 | } | |
183 | ||
184 | static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio, | |
185 | unsigned int offset, int value) | |
186 | { | |
187 | pca9685_pwm_gpio_set(gpio, offset, value); | |
188 | ||
189 | return 0; | |
190 | } | |
191 | ||
192 | /* | |
193 | * The PCA9685 has a bit for turning the PWM output full off or on. Some | |
194 | * boards like Intel Galileo actually uses these as normal GPIOs so we | |
195 | * expose a GPIO chip here which can exclusively take over the underlying | |
196 | * PWM channel. | |
197 | */ | |
198 | static int pca9685_pwm_gpio_probe(struct pca9685 *pca) | |
199 | { | |
200 | struct device *dev = pca->chip.dev; | |
201 | ||
202 | mutex_init(&pca->lock); | |
203 | ||
204 | pca->gpio.label = dev_name(dev); | |
205 | pca->gpio.parent = dev; | |
206 | pca->gpio.request = pca9685_pwm_gpio_request; | |
207 | pca->gpio.free = pca9685_pwm_gpio_free; | |
208 | pca->gpio.get_direction = pca9685_pwm_gpio_get_direction; | |
209 | pca->gpio.direction_input = pca9685_pwm_gpio_direction_input; | |
210 | pca->gpio.direction_output = pca9685_pwm_gpio_direction_output; | |
211 | pca->gpio.get = pca9685_pwm_gpio_get; | |
212 | pca->gpio.set = pca9685_pwm_gpio_set; | |
213 | pca->gpio.base = -1; | |
214 | pca->gpio.ngpio = PCA9685_MAXCHAN; | |
215 | pca->gpio.can_sleep = true; | |
216 | ||
217 | return devm_gpiochip_add_data(dev, &pca->gpio, pca); | |
218 | } | |
219 | #else | |
220 | static inline bool pca9685_pwm_is_gpio(struct pca9685 *pca, | |
221 | struct pwm_device *pwm) | |
222 | { | |
223 | return false; | |
224 | } | |
225 | ||
226 | static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca) | |
227 | { | |
228 | return 0; | |
229 | } | |
230 | #endif | |
231 | ||
0829326a | 232 | static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable) |
c40c461e SVA |
233 | { |
234 | regmap_update_bits(pca->regmap, PCA9685_MODE1, | |
0829326a SVA |
235 | MODE1_SLEEP, enable ? MODE1_SLEEP : 0); |
236 | if (!enable) { | |
c40c461e SVA |
237 | /* Wait 500us for the oscillator to be back up */ |
238 | udelay(500); | |
239 | } | |
240 | } | |
241 | ||
88b613e6 ST |
242 | static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
243 | int duty_ns, int period_ns) | |
244 | { | |
245 | struct pca9685 *pca = to_pca(chip); | |
246 | unsigned long long duty; | |
247 | unsigned int reg; | |
01ec8472 CG |
248 | int prescale; |
249 | ||
250 | if (period_ns != pca->period_ns) { | |
251 | prescale = DIV_ROUND_CLOSEST(PCA9685_OSC_CLOCK_MHZ * period_ns, | |
252 | PCA9685_COUNTER_RANGE * 1000) - 1; | |
253 | ||
254 | if (prescale >= PCA9685_PRESCALE_MIN && | |
255 | prescale <= PCA9685_PRESCALE_MAX) { | |
c40c461e SVA |
256 | /* |
257 | * putting the chip briefly into SLEEP mode | |
258 | * at this point won't interfere with the | |
259 | * pm_runtime framework, because the pm_runtime | |
260 | * state is guaranteed active here. | |
261 | */ | |
01ec8472 | 262 | /* Put chip into sleep mode */ |
0829326a | 263 | pca9685_set_sleep_mode(pca, true); |
01ec8472 CG |
264 | |
265 | /* Change the chip-wide output frequency */ | |
266 | regmap_write(pca->regmap, PCA9685_PRESCALE, prescale); | |
267 | ||
268 | /* Wake the chip up */ | |
0829326a | 269 | pca9685_set_sleep_mode(pca, false); |
01ec8472 CG |
270 | |
271 | pca->period_ns = period_ns; | |
01ec8472 CG |
272 | } else { |
273 | dev_err(chip->dev, | |
274 | "prescaler not set: period out of bounds!\n"); | |
275 | return -EINVAL; | |
276 | } | |
277 | } | |
278 | ||
279 | pca->duty_ns = duty_ns; | |
88b613e6 ST |
280 | |
281 | if (duty_ns < 1) { | |
282 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
283 | reg = PCA9685_ALL_LED_OFF_H; | |
284 | else | |
285 | reg = LED_N_OFF_H(pwm->hwpwm); | |
286 | ||
287 | regmap_write(pca->regmap, reg, LED_FULL); | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | if (duty_ns == period_ns) { | |
4a627b52 CG |
293 | /* Clear both OFF registers */ |
294 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
295 | reg = PCA9685_ALL_LED_OFF_L; | |
296 | else | |
297 | reg = LED_N_OFF_L(pwm->hwpwm); | |
298 | ||
299 | regmap_write(pca->regmap, reg, 0x0); | |
300 | ||
301 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
302 | reg = PCA9685_ALL_LED_OFF_H; | |
303 | else | |
304 | reg = LED_N_OFF_H(pwm->hwpwm); | |
305 | ||
306 | regmap_write(pca->regmap, reg, 0x0); | |
307 | ||
308 | /* Set the full ON bit */ | |
88b613e6 ST |
309 | if (pwm->hwpwm >= PCA9685_MAXCHAN) |
310 | reg = PCA9685_ALL_LED_ON_H; | |
311 | else | |
312 | reg = LED_N_ON_H(pwm->hwpwm); | |
313 | ||
314 | regmap_write(pca->regmap, reg, LED_FULL); | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
01ec8472 | 319 | duty = PCA9685_COUNTER_RANGE * (unsigned long long)duty_ns; |
88b613e6 ST |
320 | duty = DIV_ROUND_UP_ULL(duty, period_ns); |
321 | ||
322 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
323 | reg = PCA9685_ALL_LED_OFF_L; | |
324 | else | |
325 | reg = LED_N_OFF_L(pwm->hwpwm); | |
326 | ||
327 | regmap_write(pca->regmap, reg, (int)duty & 0xff); | |
328 | ||
329 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
330 | reg = PCA9685_ALL_LED_OFF_H; | |
331 | else | |
332 | reg = LED_N_OFF_H(pwm->hwpwm); | |
333 | ||
334 | regmap_write(pca->regmap, reg, ((int)duty >> 8) & 0xf); | |
335 | ||
4a627b52 CG |
336 | /* Clear the full ON bit, otherwise the set OFF time has no effect */ |
337 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
338 | reg = PCA9685_ALL_LED_ON_H; | |
339 | else | |
340 | reg = LED_N_ON_H(pwm->hwpwm); | |
341 | ||
342 | regmap_write(pca->regmap, reg, 0); | |
343 | ||
88b613e6 ST |
344 | return 0; |
345 | } | |
346 | ||
347 | static int pca9685_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |
348 | { | |
349 | struct pca9685 *pca = to_pca(chip); | |
350 | unsigned int reg; | |
351 | ||
352 | /* | |
353 | * The PWM subsystem does not support a pre-delay. | |
354 | * So, set the ON-timeout to 0 | |
355 | */ | |
356 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
357 | reg = PCA9685_ALL_LED_ON_L; | |
358 | else | |
359 | reg = LED_N_ON_L(pwm->hwpwm); | |
360 | ||
361 | regmap_write(pca->regmap, reg, 0); | |
362 | ||
363 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
364 | reg = PCA9685_ALL_LED_ON_H; | |
365 | else | |
366 | reg = LED_N_ON_H(pwm->hwpwm); | |
367 | ||
368 | regmap_write(pca->regmap, reg, 0); | |
369 | ||
370 | /* | |
371 | * Clear the full-off bit. | |
372 | * It has precedence over the others and must be off. | |
373 | */ | |
374 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
375 | reg = PCA9685_ALL_LED_OFF_H; | |
376 | else | |
377 | reg = LED_N_OFF_H(pwm->hwpwm); | |
378 | ||
379 | regmap_update_bits(pca->regmap, reg, LED_FULL, 0x0); | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
384 | static void pca9685_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) | |
385 | { | |
386 | struct pca9685 *pca = to_pca(chip); | |
387 | unsigned int reg; | |
388 | ||
389 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
390 | reg = PCA9685_ALL_LED_OFF_H; | |
391 | else | |
392 | reg = LED_N_OFF_H(pwm->hwpwm); | |
393 | ||
394 | regmap_write(pca->regmap, reg, LED_FULL); | |
395 | ||
396 | /* Clear the LED_OFF counter. */ | |
397 | if (pwm->hwpwm >= PCA9685_MAXCHAN) | |
398 | reg = PCA9685_ALL_LED_OFF_L; | |
399 | else | |
400 | reg = LED_N_OFF_L(pwm->hwpwm); | |
401 | ||
402 | regmap_write(pca->regmap, reg, 0x0); | |
403 | } | |
404 | ||
405 | static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) | |
406 | { | |
407 | struct pca9685 *pca = to_pca(chip); | |
408 | ||
bccec89f MW |
409 | if (pca9685_pwm_is_gpio(pca, pwm)) |
410 | return -EBUSY; | |
c40c461e | 411 | pm_runtime_get_sync(chip->dev); |
88b613e6 ST |
412 | |
413 | return 0; | |
414 | } | |
415 | ||
416 | static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) | |
417 | { | |
c40c461e SVA |
418 | pca9685_pwm_disable(chip, pwm); |
419 | pm_runtime_put(chip->dev); | |
88b613e6 ST |
420 | } |
421 | ||
422 | static const struct pwm_ops pca9685_pwm_ops = { | |
423 | .enable = pca9685_pwm_enable, | |
424 | .disable = pca9685_pwm_disable, | |
425 | .config = pca9685_pwm_config, | |
426 | .request = pca9685_pwm_request, | |
427 | .free = pca9685_pwm_free, | |
3dd0a909 | 428 | .owner = THIS_MODULE, |
88b613e6 ST |
429 | }; |
430 | ||
c456fbb2 | 431 | static const struct regmap_config pca9685_regmap_i2c_config = { |
88b613e6 ST |
432 | .reg_bits = 8, |
433 | .val_bits = 8, | |
434 | .max_register = PCA9685_NUMREGS, | |
435 | .cache_type = REGCACHE_NONE, | |
436 | }; | |
437 | ||
438 | static int pca9685_pwm_probe(struct i2c_client *client, | |
439 | const struct i2c_device_id *id) | |
440 | { | |
88b613e6 ST |
441 | struct pca9685 *pca; |
442 | int ret; | |
443 | int mode2; | |
444 | ||
445 | pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL); | |
446 | if (!pca) | |
447 | return -ENOMEM; | |
448 | ||
449 | pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config); | |
450 | if (IS_ERR(pca->regmap)) { | |
451 | ret = PTR_ERR(pca->regmap); | |
452 | dev_err(&client->dev, "Failed to initialize register map: %d\n", | |
453 | ret); | |
454 | return ret; | |
455 | } | |
01ec8472 CG |
456 | pca->duty_ns = 0; |
457 | pca->period_ns = PCA9685_DEFAULT_PERIOD; | |
88b613e6 ST |
458 | |
459 | i2c_set_clientdata(client, pca); | |
460 | ||
461 | regmap_read(pca->regmap, PCA9685_MODE2, &mode2); | |
462 | ||
912b8439 | 463 | if (device_property_read_bool(&client->dev, "invert")) |
88b613e6 ST |
464 | mode2 |= MODE2_INVRT; |
465 | else | |
466 | mode2 &= ~MODE2_INVRT; | |
467 | ||
912b8439 | 468 | if (device_property_read_bool(&client->dev, "open-drain")) |
88b613e6 ST |
469 | mode2 &= ~MODE2_OUTDRV; |
470 | else | |
471 | mode2 |= MODE2_OUTDRV; | |
472 | ||
473 | regmap_write(pca->regmap, PCA9685_MODE2, mode2); | |
474 | ||
475 | /* clear all "full off" bits */ | |
476 | regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0); | |
477 | regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, 0); | |
478 | ||
479 | pca->chip.ops = &pca9685_pwm_ops; | |
480 | /* add an extra channel for ALL_LED */ | |
481 | pca->chip.npwm = PCA9685_MAXCHAN + 1; | |
482 | ||
483 | pca->chip.dev = &client->dev; | |
484 | pca->chip.base = -1; | |
88b613e6 | 485 | |
bccec89f MW |
486 | ret = pwmchip_add(&pca->chip); |
487 | if (ret < 0) | |
488 | return ret; | |
489 | ||
490 | ret = pca9685_pwm_gpio_probe(pca); | |
c40c461e | 491 | if (ret < 0) { |
bccec89f | 492 | pwmchip_remove(&pca->chip); |
c40c461e SVA |
493 | return ret; |
494 | } | |
495 | ||
496 | /* the chip comes out of power-up in the active state */ | |
497 | pm_runtime_set_active(&client->dev); | |
498 | /* | |
499 | * enable will put the chip into suspend, which is what we | |
500 | * want as all outputs are disabled at this point | |
501 | */ | |
502 | pm_runtime_enable(&client->dev); | |
bccec89f | 503 | |
c40c461e | 504 | return 0; |
88b613e6 ST |
505 | } |
506 | ||
507 | static int pca9685_pwm_remove(struct i2c_client *client) | |
508 | { | |
509 | struct pca9685 *pca = i2c_get_clientdata(client); | |
c40c461e | 510 | int ret; |
88b613e6 | 511 | |
c40c461e SVA |
512 | ret = pwmchip_remove(&pca->chip); |
513 | if (ret) | |
514 | return ret; | |
515 | pm_runtime_disable(&client->dev); | |
516 | return 0; | |
517 | } | |
88b613e6 | 518 | |
c40c461e SVA |
519 | #ifdef CONFIG_PM |
520 | static int pca9685_pwm_runtime_suspend(struct device *dev) | |
521 | { | |
522 | struct i2c_client *client = to_i2c_client(dev); | |
523 | struct pca9685 *pca = i2c_get_clientdata(client); | |
524 | ||
0829326a | 525 | pca9685_set_sleep_mode(pca, true); |
c40c461e | 526 | return 0; |
88b613e6 ST |
527 | } |
528 | ||
c40c461e SVA |
529 | static int pca9685_pwm_runtime_resume(struct device *dev) |
530 | { | |
531 | struct i2c_client *client = to_i2c_client(dev); | |
532 | struct pca9685 *pca = i2c_get_clientdata(client); | |
533 | ||
0829326a | 534 | pca9685_set_sleep_mode(pca, false); |
c40c461e SVA |
535 | return 0; |
536 | } | |
537 | #endif | |
538 | ||
88b613e6 ST |
539 | static const struct i2c_device_id pca9685_id[] = { |
540 | { "pca9685", 0 }, | |
541 | { /* sentinel */ }, | |
542 | }; | |
543 | MODULE_DEVICE_TABLE(i2c, pca9685_id); | |
544 | ||
912b8439 AS |
545 | #ifdef CONFIG_ACPI |
546 | static const struct acpi_device_id pca9685_acpi_ids[] = { | |
547 | { "INT3492", 0 }, | |
548 | { /* sentinel */ }, | |
549 | }; | |
550 | MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids); | |
551 | #endif | |
552 | ||
553 | #ifdef CONFIG_OF | |
88b613e6 ST |
554 | static const struct of_device_id pca9685_dt_ids[] = { |
555 | { .compatible = "nxp,pca9685-pwm", }, | |
556 | { /* sentinel */ } | |
557 | }; | |
558 | MODULE_DEVICE_TABLE(of, pca9685_dt_ids); | |
912b8439 | 559 | #endif |
88b613e6 | 560 | |
c40c461e SVA |
561 | static const struct dev_pm_ops pca9685_pwm_pm = { |
562 | SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend, | |
563 | pca9685_pwm_runtime_resume, NULL) | |
564 | }; | |
565 | ||
88b613e6 ST |
566 | static struct i2c_driver pca9685_i2c_driver = { |
567 | .driver = { | |
568 | .name = "pca9685-pwm", | |
912b8439 AS |
569 | .acpi_match_table = ACPI_PTR(pca9685_acpi_ids), |
570 | .of_match_table = of_match_ptr(pca9685_dt_ids), | |
c40c461e | 571 | .pm = &pca9685_pwm_pm, |
88b613e6 ST |
572 | }, |
573 | .probe = pca9685_pwm_probe, | |
574 | .remove = pca9685_pwm_remove, | |
575 | .id_table = pca9685_id, | |
576 | }; | |
577 | ||
578 | module_i2c_driver(pca9685_i2c_driver); | |
579 | ||
580 | MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>"); | |
581 | MODULE_DESCRIPTION("PWM driver for PCA9685"); | |
582 | MODULE_LICENSE("GPL"); |