Commit | Line | Data |
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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
c558e39e AS |
2 | /* |
3 | * Intel Low Power Subsystem PWM controller driver | |
4 | * | |
5 | * Copyright (C) 2014, Intel Corporation | |
6 | * | |
7 | * Derived from the original pwm-lpss.c | |
c558e39e AS |
8 | */ |
9 | ||
10 | #ifndef __PWM_LPSS_H | |
11 | #define __PWM_LPSS_H | |
12 | ||
13 | #include <linux/device.h> | |
14 | #include <linux/pwm.h> | |
15 | ||
9dc419b6 HG |
16 | #define MAX_PWMS 4 |
17 | ||
18 | struct pwm_lpss_chip { | |
19 | struct pwm_chip chip; | |
20 | void __iomem *regs; | |
21 | const struct pwm_lpss_boardinfo *info; | |
22 | u32 saved_ctrl[MAX_PWMS]; | |
23 | }; | |
c558e39e AS |
24 | |
25 | struct pwm_lpss_boardinfo { | |
26 | unsigned long clk_rate; | |
4e11f5ac | 27 | unsigned int npwm; |
883e4d07 | 28 | unsigned long base_unit_bits; |
b997e3ed | 29 | bool bypass; |
4743765b HG |
30 | /* |
31 | * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device | |
32 | * messes with the PWM0 controllers state, | |
33 | */ | |
34 | bool other_devices_aml_touches_pwm_regs; | |
c558e39e AS |
35 | }; |
36 | ||
c558e39e AS |
37 | struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r, |
38 | const struct pwm_lpss_boardinfo *info); | |
39 | int pwm_lpss_remove(struct pwm_lpss_chip *lpwm); | |
1d375b58 HG |
40 | int pwm_lpss_suspend(struct device *dev); |
41 | int pwm_lpss_resume(struct device *dev); | |
c558e39e AS |
42 | |
43 | #endif /* __PWM_LPSS_H */ |