[linux-block.git] / drivers / pwm / pwm-lpss-pci.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Intel Low Power Subsystem PWM controller PCI driver
 *
 * Copyright (C) 2014, Intel Corporation
 *
 * Derived from the original pwm-lpss.c
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/pm_runtime.h>

#include "pwm-lpss.h"

/* BayTrail */
static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
	.clk_rate = 25000000,
	.npwm = 1,
	.base_unit_bits = 16,
};

/* Braswell */
static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
	.clk_rate = 19200000,
	.npwm = 1,
	.base_unit_bits = 16,
};

/* Broxton */
static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
	.clk_rate = 19200000,
	.npwm = 4,
	.base_unit_bits = 22,
	.bypass = true,
};

/* Tangier */
static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
	.clk_rate = 19200000,
	.npwm = 4,
	.base_unit_bits = 22,
};

static int pwm_lpss_probe_pci(struct pci_dev *pdev,
			      const struct pci_device_id *id)
{
	const struct pwm_lpss_boardinfo *info;
	struct pwm_lpss_chip *lpwm;
	int err;

	err = pcim_enable_device(pdev);
	if (err < 0)
		return err;

	info = (struct pwm_lpss_boardinfo *)id->driver_data;
	lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
	if (IS_ERR(lpwm))
		return PTR_ERR(lpwm);

	pci_set_drvdata(pdev, lpwm);

	pm_runtime_put(&pdev->dev);
	pm_runtime_allow(&pdev->dev);

	return 0;
}

static void pwm_lpss_remove_pci(struct pci_dev *pdev)
{
	struct pwm_lpss_chip *lpwm = pci_get_drvdata(pdev);

	pm_runtime_forbid(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	pwm_lpss_remove(lpwm);
}

#ifdef CONFIG_PM
static int pwm_lpss_runtime_suspend_pci(struct device *dev)
{
	/*
	 * The PCI core will handle transition to D3 automatically. We only
	 * need to provide runtime PM hooks for that to happen.
	 */
	return 0;
}

static int pwm_lpss_runtime_resume_pci(struct device *dev)
{
	return 0;
}
#endif

static const struct dev_pm_ops pwm_lpss_pci_pm = {
	SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
			   pwm_lpss_runtime_resume_pci, NULL)
};

static const struct pci_device_id pwm_lpss_pci_ids[] = {
	{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
	{ PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&pwm_lpss_byt_info},
	{ PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&pwm_lpss_byt_info},
	{ PCI_VDEVICE(INTEL, 0x11a5), (unsigned long)&pwm_lpss_tng_info},
	{ PCI_VDEVICE(INTEL, 0x1ac8), (unsigned long)&pwm_lpss_bxt_info},
	{ PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&pwm_lpss_bsw_info},
	{ PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&pwm_lpss_bsw_info},
	{ PCI_VDEVICE(INTEL, 0x31c8), (unsigned long)&pwm_lpss_bxt_info},
	{ PCI_VDEVICE(INTEL, 0x5ac8), (unsigned long)&pwm_lpss_bxt_info},
	{ },
};
MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids);

static struct pci_driver pwm_lpss_driver_pci = {
	.name = "pwm-lpss",
	.id_table = pwm_lpss_pci_ids,
	.probe = pwm_lpss_probe_pci,
	.remove = pwm_lpss_remove_pci,
	.driver = {
		.pm = &pwm_lpss_pci_pm,
	},
};
module_pci_driver(pwm_lpss_driver_pci);

MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
c558e39e AS	2	/*
	3	* Intel Low Power Subsystem PWM controller PCI driver
	4	*
	5	* Copyright (C) 2014, Intel Corporation
	6	*
	7	* Derived from the original pwm-lpss.c
c558e39e AS	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/module.h>
	12	#include <linux/pci.h>
f080be27	13	#include <linux/pm_runtime.h>
c558e39e AS	14
	15	#include "pwm-lpss.h"
	16
9900073c AS	17	/* BayTrail */
	18	static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
	19	.clk_rate = 25000000,
	20	.npwm = 1,
	21	.base_unit_bits = 16,
	22	};
	23
	24	/* Braswell */
	25	static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
	26	.clk_rate = 19200000,
	27	.npwm = 1,
	28	.base_unit_bits = 16,
	29	};
	30
	31	/* Broxton */
	32	static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
	33	.clk_rate = 19200000,
	34	.npwm = 4,
	35	.base_unit_bits = 22,
b997e3ed	36	.bypass = true,
9900073c AS	37	};
9900073c AS	38
3c1460e9 AS	39	/* Tangier */
	40	static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
	41	.clk_rate = 19200000,
	42	.npwm = 4,
	43	.base_unit_bits = 22,
	44	};
	45
c558e39e AS	46	static int pwm_lpss_probe_pci(struct pci_dev *pdev,
	47	const struct pci_device_id *id)
	48	{
	49	const struct pwm_lpss_boardinfo *info;
	50	struct pwm_lpss_chip *lpwm;
	51	int err;
	52
90927fe9	53	err = pcim_enable_device(pdev);
c558e39e AS	54	if (err < 0)
	55	return err;
	56
	57	info = (struct pwm_lpss_boardinfo *)id->driver_data;
	58	lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
	59	if (IS_ERR(lpwm))
	60	return PTR_ERR(lpwm);
	61
	62	pci_set_drvdata(pdev, lpwm);
f080be27 QZ	63
	64	pm_runtime_put(&pdev->dev);
	65	pm_runtime_allow(&pdev->dev);
	66
c558e39e AS	67	return 0;
	68	}
	69
	70	static void pwm_lpss_remove_pci(struct pci_dev *pdev)
	71	{
	72	struct pwm_lpss_chip *lpwm = pci_get_drvdata(pdev);
	73
f080be27 QZ	74	pm_runtime_forbid(&pdev->dev);
	75	pm_runtime_get_sync(&pdev->dev);
	76
c558e39e	77	pwm_lpss_remove(lpwm);
c558e39e AS	78	}
c558e39e AS	79
f080be27 QZ	80	#ifdef CONFIG_PM
	81	static int pwm_lpss_runtime_suspend_pci(struct device *dev)
	82	{
	83	/*
	84	* The PCI core will handle transition to D3 automatically. We only
	85	* need to provide runtime PM hooks for that to happen.
	86	*/
	87	return 0;
	88	}
	89
	90	static int pwm_lpss_runtime_resume_pci(struct device *dev)
	91	{
	92	return 0;
	93	}
	94	#endif
	95
	96	static const struct dev_pm_ops pwm_lpss_pci_pm = {
	97	SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
	98	pwm_lpss_runtime_resume_pci, NULL)
	99	};
	100
c558e39e	101	static const struct pci_device_id pwm_lpss_pci_ids[] = {
87219cb4	102	{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
c558e39e AS	103	{ PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&pwm_lpss_byt_info},
c558e39e AS	104	{ PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&pwm_lpss_byt_info},
3c1460e9	105	{ PCI_VDEVICE(INTEL, 0x11a5), (unsigned long)&pwm_lpss_tng_info},
87219cb4	106	{ PCI_VDEVICE(INTEL, 0x1ac8), (unsigned long)&pwm_lpss_bxt_info},
c558e39e AS	107	{ PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&pwm_lpss_bsw_info},
c558e39e AS	108	{ PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&pwm_lpss_bsw_info},
ae252054	109	{ PCI_VDEVICE(INTEL, 0x31c8), (unsigned long)&pwm_lpss_bxt_info},
03f00e53	110	{ PCI_VDEVICE(INTEL, 0x5ac8), (unsigned long)&pwm_lpss_bxt_info},
c558e39e AS	111	{ },
	112	};
	113	MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids);
	114
	115	static struct pci_driver pwm_lpss_driver_pci = {
	116	.name = "pwm-lpss",
	117	.id_table = pwm_lpss_pci_ids,
	118	.probe = pwm_lpss_probe_pci,
	119	.remove = pwm_lpss_remove_pci,
f080be27 QZ	120	.driver = {
	121	.pm = &pwm_lpss_pci_pm,
	122	},
c558e39e AS	123	};
	124	module_pci_driver(pwm_lpss_driver_pci);
	125
	126	MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
	127	MODULE_LICENSE("GPL v2");