[linux-block.git] / drivers / pwm / pwm-lp3943.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * TI/National Semiconductor LP3943 PWM driver
 *
 * Copyright 2013 Texas Instruments
 *
 * Author: Milo Kim <milo.kim@ti.com>
 */

#include <linux/err.h>
#include <linux/mfd/lp3943.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/slab.h>

#define LP3943_MAX_DUTY			255
#define LP3943_MIN_PERIOD		6250
#define LP3943_MAX_PERIOD		1600000

struct lp3943_pwm {
	struct pwm_chip chip;
	struct lp3943 *lp3943;
	struct lp3943_platform_data *pdata;
};

static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *_chip)
{
	return container_of(_chip, struct lp3943_pwm, chip);
}

static struct lp3943_pwm_map *
lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
{
	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	struct lp3943_pwm_map *pwm_map;
	int i, offset;

	pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
	if (!pwm_map)
		return ERR_PTR(-ENOMEM);

	pwm_map->output = pdata->pwms[hwpwm]->output;
	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		offset = pwm_map->output[i];

		/* Return an error if the pin is already assigned */
		if (test_and_set_bit(offset, &lp3943->pin_used)) {
			kfree(pwm_map);
			return ERR_PTR(-EBUSY);
		}
	}

	return pwm_map;
}

static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map;

	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
	if (IS_ERR(pwm_map))
		return PTR_ERR(pwm_map);

	return pwm_set_chip_data(pwm, pwm_map);
}

static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
				struct lp3943_pwm_map *pwm_map)
{
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	int i, offset;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		offset = pwm_map->output[i];
		clear_bit(offset, &lp3943->pin_used);
	}

	kfree(pwm_map);
}

static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);

	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
}

static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
			     u64 duty_ns, u64 period_ns)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	u8 val, reg_duty, reg_prescale;
	int err;

	/*
	 * How to configure the LP3943 PWMs
	 *
	 * 1) Period = 6250 ~ 1600000
	 * 2) Prescale = period / 6250 -1
	 * 3) Duty = input duty
	 *
	 * Prescale and duty are register values
	 */

	if (pwm->hwpwm == 0) {
		reg_prescale = LP3943_REG_PRESCALE0;
		reg_duty     = LP3943_REG_PWM0;
	} else {
		reg_prescale = LP3943_REG_PRESCALE1;
		reg_duty     = LP3943_REG_PWM1;
	}

	/*
	 * Note that after this clamping, period_ns fits into an int. This is
	 * helpful because we can resort to integer division below instead of
	 * the (more expensive) 64 bit division.
	 */
	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
	val       = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);

	err = lp3943_write_byte(lp3943, reg_prescale, val);
	if (err)
		return err;

	duty_ns = min(duty_ns, period_ns);
	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);

	return lp3943_write_byte(lp3943, reg_duty, val);
}

static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
			       struct lp3943_pwm_map *pwm_map,
			       u8 val)
{
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
	int i, index, err;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		index = pwm_map->output[i];
		err = lp3943_update_bits(lp3943, mux[index].reg,
					 mux[index].mask,
					 val << mux[index].shift);
		if (err)
			return err;
	}

	return 0;
}

static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	u8 val;

	if (pwm->hwpwm == 0)
		val = LP3943_DIM_PWM0;
	else
		val = LP3943_DIM_PWM1;

	/*
	 * Each PWM generator is set to control any of outputs of LP3943.
	 * To enable/disable the PWM, these output pins should be configured.
	 */

	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
}

static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);

	/*
	 * LP3943 outputs are open-drain, so the pin should be configured
	 * when the PWM is disabled.
	 */

	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
}

static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			    const struct pwm_state *state)
{
	int err;

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (!state->enabled) {
		if (pwm->state.enabled)
			lp3943_pwm_disable(chip, pwm);
		return 0;
	}

	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
	if (err)
		return err;

	if (!pwm->state.enabled)
		err = lp3943_pwm_enable(chip, pwm);

	return err;
}

static const struct pwm_ops lp3943_pwm_ops = {
	.request	= lp3943_pwm_request,
	.free		= lp3943_pwm_free,
	.apply		= lp3943_pwm_apply,
	.owner		= THIS_MODULE,
};

static int lp3943_pwm_parse_dt(struct device *dev,
			       struct lp3943_pwm *lp3943_pwm)
{
	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
	struct device_node *node = dev->of_node;
	struct lp3943_platform_data *pdata;
	struct lp3943_pwm_map *pwm_map;
	enum lp3943_pwm_output *output;
	int i, err, proplen, count = 0;
	u32 num_outputs;

	if (!node)
		return -EINVAL;

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/*
	 * Read the output map configuration from the device tree.
	 * Each of the two PWM generators can drive zero or more outputs.
	 */

	for (i = 0; i < LP3943_NUM_PWMS; i++) {
		if (!of_get_property(node, name[i], &proplen))
			continue;

		num_outputs = proplen / sizeof(u32);
		if (num_outputs == 0)
			continue;

		output = devm_kcalloc(dev, num_outputs, sizeof(*output),
				      GFP_KERNEL);
		if (!output)
			return -ENOMEM;

		err = of_property_read_u32_array(node, name[i], output,
						 num_outputs);
		if (err)
			return err;

		pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
		if (!pwm_map)
			return -ENOMEM;

		pwm_map->output = output;
		pwm_map->num_outputs = num_outputs;
		pdata->pwms[i] = pwm_map;

		count++;
	}

	if (count == 0)
		return -ENODATA;

	lp3943_pwm->pdata = pdata;
	return 0;
}

static int lp3943_pwm_probe(struct platform_device *pdev)
{
	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
	struct lp3943_pwm *lp3943_pwm;
	int ret;

	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
	if (!lp3943_pwm)
		return -ENOMEM;

	lp3943_pwm->pdata = lp3943->pdata;
	if (!lp3943_pwm->pdata) {
		if (IS_ENABLED(CONFIG_OF))
			ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
		else
			ret = -ENODEV;

		if (ret)
			return ret;
	}

	lp3943_pwm->lp3943 = lp3943;
	lp3943_pwm->chip.dev = &pdev->dev;
	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;

	return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
}

#ifdef CONFIG_OF
static const struct of_device_id lp3943_pwm_of_match[] = {
	{ .compatible = "ti,lp3943-pwm", },
	{ }
};
MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
#endif

static struct platform_driver lp3943_pwm_driver = {
	.probe = lp3943_pwm_probe,
	.driver = {
		.name = "lp3943-pwm",
		.of_match_table = of_match_ptr(lp3943_pwm_of_match),
	},
};
module_platform_driver(lp3943_pwm_driver);

MODULE_DESCRIPTION("LP3943 PWM driver");
MODULE_ALIAS("platform:lp3943-pwm");
MODULE_AUTHOR("Milo Kim");
MODULE_LICENSE("GPL");
Commit	Line	Data
a10e763b	1	// SPDX-License-Identifier: GPL-2.0-only
af66b3c0 MK	2	/*
	3	* TI/National Semiconductor LP3943 PWM driver
	4	*
	5	* Copyright 2013 Texas Instruments
	6	*
	7	* Author: Milo Kim <milo.kim@ti.com>
af66b3c0 MK	8	*/
	9
	10	#include <linux/err.h>
af66b3c0 MK	11	#include <linux/mfd/lp3943.h>
	12	#include <linux/module.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pwm.h>
	15	#include <linux/slab.h>
	16
	17	#define LP3943_MAX_DUTY 255
	18	#define LP3943_MIN_PERIOD 6250
	19	#define LP3943_MAX_PERIOD 1600000
	20
	21	struct lp3943_pwm {
	22	struct pwm_chip chip;
	23	struct lp3943 *lp3943;
	24	struct lp3943_platform_data *pdata;
	25	};
	26
	27	static inline struct lp3943_pwm to_lp3943_pwm(struct pwm_chip _chip)
	28	{
	29	return container_of(_chip, struct lp3943_pwm, chip);
	30	}
	31
	32	static struct lp3943_pwm_map *
	33	lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
	34	{
	35	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
	36	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	37	struct lp3943_pwm_map *pwm_map;
	38	int i, offset;
	39
	40	pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
	41	if (!pwm_map)
	42	return ERR_PTR(-ENOMEM);
	43
	44	pwm_map->output = pdata->pwms[hwpwm]->output;
	45	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
	46
	47	for (i = 0; i < pwm_map->num_outputs; i++) {
	48	offset = pwm_map->output[i];
	49
	50	/* Return an error if the pin is already assigned */
0b7d25c3 CE	51	if (test_and_set_bit(offset, &lp3943->pin_used)) {
0b7d25c3 CE	52	kfree(pwm_map);
af66b3c0	53	return ERR_PTR(-EBUSY);
0b7d25c3	54	}
af66b3c0 MK	55	}
	56
	57	return pwm_map;
	58	}
	59
	60	static int lp3943_pwm_request(struct pwm_chip chip, struct pwm_device pwm)
	61	{
	62	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	63	struct lp3943_pwm_map *pwm_map;
	64
	65	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
	66	if (IS_ERR(pwm_map))
	67	return PTR_ERR(pwm_map);
	68
	69	return pwm_set_chip_data(pwm, pwm_map);
	70	}
	71
	72	static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
	73	struct lp3943_pwm_map *pwm_map)
	74	{
	75	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	76	int i, offset;
	77
	78	for (i = 0; i < pwm_map->num_outputs; i++) {
	79	offset = pwm_map->output[i];
	80	clear_bit(offset, &lp3943->pin_used);
	81	}
	82
	83	kfree(pwm_map);
	84	}
	85
	86	static void lp3943_pwm_free(struct pwm_chip chip, struct pwm_device pwm)
	87	{
	88	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	89	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	90
	91	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
	92	}
	93
	94	static int lp3943_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
1d24cc89	95	u64 duty_ns, u64 period_ns)
af66b3c0 MK	96	{
	97	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	98	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	99	u8 val, reg_duty, reg_prescale;
	100	int err;
	101
	102	/*
	103	* How to configure the LP3943 PWMs
	104	*
	105	* 1) Period = 6250 ~ 1600000
	106	* 2) Prescale = period / 6250 -1
	107	* 3) Duty = input duty
	108	*
	109	* Prescale and duty are register values
	110	*/
	111
	112	if (pwm->hwpwm == 0) {
	113	reg_prescale = LP3943_REG_PRESCALE0;
	114	reg_duty = LP3943_REG_PWM0;
	115	} else {
	116	reg_prescale = LP3943_REG_PRESCALE1;
	117	reg_duty = LP3943_REG_PWM1;
	118	}
	119
1d24cc89 UKK	120	/*
	121	* Note that after this clamping, period_ns fits into an int. This is
	122	* helpful because we can resort to integer division below instead of
	123	* the (more expensive) 64 bit division.
	124	*/
	125	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
	126	val = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);
af66b3c0 MK	127
	128	err = lp3943_write_byte(lp3943, reg_prescale, val);
	129	if (err)
	130	return err;
	131
5e3b07ca	132	duty_ns = min(duty_ns, period_ns);
1d24cc89	133	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);
af66b3c0 MK	134
	135	return lp3943_write_byte(lp3943, reg_duty, val);
	136	}
	137
	138	static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
	139	struct lp3943_pwm_map *pwm_map,
	140	u8 val)
	141	{
	142	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	143	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
	144	int i, index, err;
	145
	146	for (i = 0; i < pwm_map->num_outputs; i++) {
	147	index = pwm_map->output[i];
	148	err = lp3943_update_bits(lp3943, mux[index].reg,
	149	mux[index].mask,
	150	val << mux[index].shift);
	151	if (err)
	152	return err;
	153	}
	154
	155	return 0;
	156	}
	157
	158	static int lp3943_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	159	{
	160	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	161	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	162	u8 val;
	163
	164	if (pwm->hwpwm == 0)
	165	val = LP3943_DIM_PWM0;
	166	else
	167	val = LP3943_DIM_PWM1;
	168
	169	/*
	170	* Each PWM generator is set to control any of outputs of LP3943.
	171	* To enable/disable the PWM, these output pins should be configured.
	172	*/
	173
	174	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
	175	}
	176
	177	static void lp3943_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	178	{
	179	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	180	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	181
	182	/*
	183	* LP3943 outputs are open-drain, so the pin should be configured
	184	* when the PWM is disabled.
	185	*/
	186
	187	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
	188	}
	189
1d24cc89 UKK	190	static int lp3943_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
	191	const struct pwm_state *state)
	192	{
	193	int err;
	194
	195	if (state->polarity != PWM_POLARITY_NORMAL)
	196	return -EINVAL;
	197
	198	if (!state->enabled) {
	199	if (pwm->state.enabled)
	200	lp3943_pwm_disable(chip, pwm);
	201	return 0;
	202	}
	203
	204	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
	205	if (err)
	206	return err;
	207
	208	if (!pwm->state.enabled)
	209	err = lp3943_pwm_enable(chip, pwm);
	210
	211	return err;
	212	}
	213
af66b3c0 MK	214	static const struct pwm_ops lp3943_pwm_ops = {
	215	.request = lp3943_pwm_request,
	216	.free = lp3943_pwm_free,
1d24cc89	217	.apply = lp3943_pwm_apply,
af66b3c0 MK	218	.owner = THIS_MODULE,
	219	};
	220
	221	static int lp3943_pwm_parse_dt(struct device *dev,
	222	struct lp3943_pwm *lp3943_pwm)
	223	{
	224	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
	225	struct device_node *node = dev->of_node;
	226	struct lp3943_platform_data *pdata;
	227	struct lp3943_pwm_map *pwm_map;
	228	enum lp3943_pwm_output *output;
	229	int i, err, proplen, count = 0;
	230	u32 num_outputs;
	231
	232	if (!node)
	233	return -EINVAL;
	234
	235	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	236	if (!pdata)
	237	return -ENOMEM;
	238
	239	/*
	240	* Read the output map configuration from the device tree.
	241	* Each of the two PWM generators can drive zero or more outputs.
	242	*/
	243
	244	for (i = 0; i < LP3943_NUM_PWMS; i++) {
	245	if (!of_get_property(node, name[i], &proplen))
	246	continue;
	247
	248	num_outputs = proplen / sizeof(u32);
	249	if (num_outputs == 0)
	250	continue;
	251
a86854d0	252	output = devm_kcalloc(dev, num_outputs, sizeof(*output),
af66b3c0 MK	253	GFP_KERNEL);
	254	if (!output)
	255	return -ENOMEM;
	256
	257	err = of_property_read_u32_array(node, name[i], output,
	258	num_outputs);
	259	if (err)
	260	return err;
	261
	262	pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
	263	if (!pwm_map)
	264	return -ENOMEM;
	265
	266	pwm_map->output = output;
	267	pwm_map->num_outputs = num_outputs;
	268	pdata->pwms[i] = pwm_map;
	269
	270	count++;
	271	}
	272
	273	if (count == 0)
	274	return -ENODATA;
	275
	276	lp3943_pwm->pdata = pdata;
	277	return 0;
	278	}
	279
	280	static int lp3943_pwm_probe(struct platform_device *pdev)
	281	{
	282	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
	283	struct lp3943_pwm *lp3943_pwm;
	284	int ret;
	285
	286	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
	287	if (!lp3943_pwm)
	288	return -ENOMEM;
	289
	290	lp3943_pwm->pdata = lp3943->pdata;
	291	if (!lp3943_pwm->pdata) {
	292	if (IS_ENABLED(CONFIG_OF))
	293	ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
	294	else
	295	ret = -ENODEV;
	296
	297	if (ret)
	298	return ret;
	299	}
	300
	301	lp3943_pwm->lp3943 = lp3943;
	302	lp3943_pwm->chip.dev = &pdev->dev;
	303	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
	304	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;
	305
071beb7c	306	return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
af66b3c0 MK	307	}
	308
	309	#ifdef CONFIG_OF
	310	static const struct of_device_id lp3943_pwm_of_match[] = {
	311	{ .compatible = "ti,lp3943-pwm", },
	312	{ }
	313	};
	314	MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
	315	#endif
	316
	317	static struct platform_driver lp3943_pwm_driver = {
	318	.probe = lp3943_pwm_probe,
af66b3c0 MK	319	.driver = {
af66b3c0 MK	320	.name = "lp3943-pwm",
af66b3c0 MK	321	.of_match_table = of_match_ptr(lp3943_pwm_of_match),
	322	},
	323	};
	324	module_platform_driver(lp3943_pwm_driver);
	325
	326	MODULE_DESCRIPTION("LP3943 PWM driver");
	327	MODULE_ALIAS("platform:lp3943-pwm");
	328	MODULE_AUTHOR("Milo Kim");
	329	MODULE_LICENSE("GPL");