[linux-block.git] / drivers / pwm / pwm-iqs620a.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Azoteq IQS620A PWM Generator
 *
 * Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com>
 *
 * Limitations:
 * - The period is fixed to 1 ms and is generated continuously despite changes
 *   to the duty cycle or enable/disable state.
 * - Changes to the duty cycle or enable/disable state take effect immediately
 *   and may result in a glitch during the period in which the change is made.
 * - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256
 *   ms, the output is disabled and relies upon an external pull-down resistor
 *   to hold the GPIO3/LTX pin low.
 */

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/mfd/iqs62x.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/notifier.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/regmap.h>
#include <linux/slab.h>

#define IQS620_PWR_SETTINGS			0xd2
#define IQS620_PWR_SETTINGS_PWM_OUT		BIT(7)

#define IQS620_PWM_DUTY_CYCLE			0xd8

#define IQS620_PWM_PERIOD_NS			1000000

struct iqs620_pwm_private {
	struct iqs62x_core *iqs62x;
	struct pwm_chip chip;
	struct notifier_block notifier;
	struct mutex lock;
	unsigned int duty_scale;
};

static int iqs620_pwm_init(struct iqs620_pwm_private *iqs620_pwm,
			   unsigned int duty_scale)
{
	struct iqs62x_core *iqs62x = iqs620_pwm->iqs62x;
	int ret;

	if (!duty_scale)
		return regmap_clear_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
					 IQS620_PWR_SETTINGS_PWM_OUT);

	ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
			   duty_scale - 1);
	if (ret)
		return ret;

	return regmap_set_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
			       IQS620_PWR_SETTINGS_PWM_OUT);
}

static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			    const struct pwm_state *state)
{
	struct iqs620_pwm_private *iqs620_pwm;
	unsigned int duty_cycle;
	unsigned int duty_scale;
	int ret;

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (state->period < IQS620_PWM_PERIOD_NS)
		return -EINVAL;

	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);

	/*
	 * The duty cycle generated by the device is calculated as follows:
	 *
	 * duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms
	 *
	 * ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255
	 * (inclusive). Therefore the lowest duty cycle the device can generate
	 * while the output is enabled is 1 / 256 ms.
	 *
	 * For lower duty cycles (e.g. 0), the PWM output is simply disabled to
	 * allow an external pull-down resistor to hold the GPIO3/LTX pin low.
	 */
	duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);
	duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;

	if (!state->enabled)
		duty_scale = 0;

	mutex_lock(&iqs620_pwm->lock);

	ret = iqs620_pwm_init(iqs620_pwm, duty_scale);
	if (!ret)
		iqs620_pwm->duty_scale = duty_scale;

	mutex_unlock(&iqs620_pwm->lock);

	return ret;
}

static int iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
				struct pwm_state *state)
{
	struct iqs620_pwm_private *iqs620_pwm;

	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);

	mutex_lock(&iqs620_pwm->lock);

	/*
	 * Since the device cannot generate a 0% duty cycle, requests to do so
	 * cause subsequent calls to iqs620_pwm_get_state to report the output
	 * as disabled. This is not ideal, but is the best compromise based on
	 * the capabilities of the device.
	 */
	state->enabled = iqs620_pwm->duty_scale > 0;
	state->duty_cycle = DIV_ROUND_UP(iqs620_pwm->duty_scale *
					 IQS620_PWM_PERIOD_NS, 256);

	mutex_unlock(&iqs620_pwm->lock);

	state->period = IQS620_PWM_PERIOD_NS;
	state->polarity = PWM_POLARITY_NORMAL;

	return 0;
}

static int iqs620_pwm_notifier(struct notifier_block *notifier,
			       unsigned long event_flags, void *context)
{
	struct iqs620_pwm_private *iqs620_pwm;
	int ret;

	if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
		return NOTIFY_DONE;

	iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,
				  notifier);

	mutex_lock(&iqs620_pwm->lock);

	/*
	 * The parent MFD driver already prints an error message in the event
	 * of a device reset, so nothing else is printed here unless there is
	 * an additional failure.
	 */
	ret = iqs620_pwm_init(iqs620_pwm, iqs620_pwm->duty_scale);

	mutex_unlock(&iqs620_pwm->lock);

	if (ret) {
		dev_err(iqs620_pwm->chip.dev,
			"Failed to re-initialize device: %d\n", ret);
		return NOTIFY_BAD;
	}

	return NOTIFY_OK;
}

static const struct pwm_ops iqs620_pwm_ops = {
	.apply = iqs620_pwm_apply,
	.get_state = iqs620_pwm_get_state,
	.owner = THIS_MODULE,
};

static void iqs620_pwm_notifier_unregister(void *context)
{
	struct iqs620_pwm_private *iqs620_pwm = context;
	int ret;

	ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh,
						 &iqs620_pwm->notifier);
	if (ret)
		dev_err(iqs620_pwm->chip.dev,
			"Failed to unregister notifier: %d\n", ret);
}

static int iqs620_pwm_probe(struct platform_device *pdev)
{
	struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
	struct iqs620_pwm_private *iqs620_pwm;
	unsigned int val;
	int ret;

	iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL);
	if (!iqs620_pwm)
		return -ENOMEM;

	iqs620_pwm->iqs62x = iqs62x;

	ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);
	if (ret)
		return ret;

	if (val & IQS620_PWR_SETTINGS_PWM_OUT) {
		ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);
		if (ret)
			return ret;

		iqs620_pwm->duty_scale = val + 1;
	}

	iqs620_pwm->chip.dev = &pdev->dev;
	iqs620_pwm->chip.ops = &iqs620_pwm_ops;
	iqs620_pwm->chip.npwm = 1;

	mutex_init(&iqs620_pwm->lock);

	iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier;
	ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh,
					       &iqs620_pwm->notifier);
	if (ret) {
		dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
		return ret;
	}

	ret = devm_add_action_or_reset(&pdev->dev,
				       iqs620_pwm_notifier_unregister,
				       iqs620_pwm);
	if (ret)
		return ret;

	ret = devm_pwmchip_add(&pdev->dev, &iqs620_pwm->chip);
	if (ret)
		dev_err(&pdev->dev, "Failed to add device: %d\n", ret);

	return ret;
}

static struct platform_driver iqs620_pwm_platform_driver = {
	.driver = {
		.name = "iqs620a-pwm",
	},
	.probe = iqs620_pwm_probe,
};
module_platform_driver(iqs620_pwm_platform_driver);

MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:iqs620a-pwm");
Commit	Line	Data
6f0841a8 JL	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Azoteq IQS620A PWM Generator
	4	*
	5	* Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com>
	6	*
	7	* Limitations:
	8	* - The period is fixed to 1 ms and is generated continuously despite changes
	9	* to the duty cycle or enable/disable state.
	10	* - Changes to the duty cycle or enable/disable state take effect immediately
	11	* and may result in a glitch during the period in which the change is made.
	12	* - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256
	13	* ms, the output is disabled and relies upon an external pull-down resistor
	14	* to hold the GPIO3/LTX pin low.
	15	*/
	16
	17	#include <linux/device.h>
	18	#include <linux/kernel.h>
	19	#include <linux/mfd/iqs62x.h>
	20	#include <linux/module.h>
	21	#include <linux/mutex.h>
	22	#include <linux/notifier.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/pwm.h>
	25	#include <linux/regmap.h>
	26	#include <linux/slab.h>
	27
b8fb642a	28	#define IQS620_PWR_SETTINGS 0xd2
6f0841a8 JL	29	#define IQS620_PWR_SETTINGS_PWM_OUT BIT(7)
6f0841a8 JL	30
b8fb642a	31	#define IQS620_PWM_DUTY_CYCLE 0xd8
6f0841a8 JL	32
	33	#define IQS620_PWM_PERIOD_NS 1000000
	34
	35	struct iqs620_pwm_private {
	36	struct iqs62x_core *iqs62x;
	37	struct pwm_chip chip;
	38	struct notifier_block notifier;
	39	struct mutex lock;
28208c7b	40	unsigned int duty_scale;
6f0841a8 JL	41	};
6f0841a8 JL	42
28208c7b JL	43	static int iqs620_pwm_init(struct iqs620_pwm_private *iqs620_pwm,
	44	unsigned int duty_scale)
	45	{
	46	struct iqs62x_core *iqs62x = iqs620_pwm->iqs62x;
	47	int ret;
	48
	49	if (!duty_scale)
2c85895b UKK	50	return regmap_clear_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
2c85895b UKK	51	IQS620_PWR_SETTINGS_PWM_OUT);
28208c7b JL	52
	53	ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
	54	duty_scale - 1);
	55	if (ret)
	56	return ret;
	57
860793bb JL	58	return regmap_set_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
860793bb JL	59	IQS620_PWR_SETTINGS_PWM_OUT);
28208c7b JL	60	}
28208c7b JL	61
6f0841a8 JL	62	static int iqs620_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
	63	const struct pwm_state *state)
	64	{
	65	struct iqs620_pwm_private *iqs620_pwm;
72d6b245 UKK	66	unsigned int duty_cycle;
72d6b245 UKK	67	unsigned int duty_scale;
5bc5d99f	68	int ret;
6f0841a8 JL	69
6f0841a8 JL	70	if (state->polarity != PWM_POLARITY_NORMAL)
2b1c1a5d	71	return -EINVAL;
6f0841a8 JL	72
	73	if (state->period < IQS620_PWM_PERIOD_NS)
	74	return -EINVAL;
	75
	76	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
6f0841a8 JL	77
	78	/*
	79	* The duty cycle generated by the device is calculated as follows:
	80	*
	81	* duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms
	82	*
	83	* ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255
	84	* (inclusive). Therefore the lowest duty cycle the device can generate
	85	* while the output is enabled is 1 / 256 ms.
	86	*
	87	* For lower duty cycles (e.g. 0), the PWM output is simply disabled to
	88	* allow an external pull-down resistor to hold the GPIO3/LTX pin low.
	89	*/
72d6b245 UKK	90	duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);
72d6b245 UKK	91	duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;
6f0841a8	92
28208c7b JL	93	if (!state->enabled)
28208c7b JL	94	duty_scale = 0;
6f0841a8	95
28208c7b	96	mutex_lock(&iqs620_pwm->lock);
6f0841a8	97
28208c7b JL	98	ret = iqs620_pwm_init(iqs620_pwm, duty_scale);
	99	if (!ret)
	100	iqs620_pwm->duty_scale = duty_scale;
6f0841a8	101
6f0841a8 JL	102	mutex_unlock(&iqs620_pwm->lock);
	103
	104	return ret;
	105	}
	106
6c452cff UKK	107	static int iqs620_pwm_get_state(struct pwm_chip chip, struct pwm_device pwm,
6c452cff UKK	108	struct pwm_state *state)
6f0841a8 JL	109	{
	110	struct iqs620_pwm_private *iqs620_pwm;
	111
	112	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
	113
	114	mutex_lock(&iqs620_pwm->lock);
	115
	116	/*
	117	* Since the device cannot generate a 0% duty cycle, requests to do so
	118	* cause subsequent calls to iqs620_pwm_get_state to report the output
28208c7b	119	* as disabled. This is not ideal, but is the best compromise based on
6f0841a8 JL	120	* the capabilities of the device.
6f0841a8 JL	121	*/
28208c7b JL	122	state->enabled = iqs620_pwm->duty_scale > 0;
28208c7b JL	123	state->duty_cycle = DIV_ROUND_UP(iqs620_pwm->duty_scale *
6f0841a8 JL	124	IQS620_PWM_PERIOD_NS, 256);
	125
	126	mutex_unlock(&iqs620_pwm->lock);
	127
	128	state->period = IQS620_PWM_PERIOD_NS;
b20b0971	129	state->polarity = PWM_POLARITY_NORMAL;
6c452cff UKK	130
6c452cff UKK	131	return 0;
6f0841a8 JL	132	}
	133
	134	static int iqs620_pwm_notifier(struct notifier_block *notifier,
	135	unsigned long event_flags, void *context)
	136	{
	137	struct iqs620_pwm_private *iqs620_pwm;
6f0841a8 JL	138	int ret;
	139
	140	if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
	141	return NOTIFY_DONE;
	142
	143	iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,
	144	notifier);
6f0841a8 JL	145
	146	mutex_lock(&iqs620_pwm->lock);
	147
	148	/*
	149	* The parent MFD driver already prints an error message in the event
	150	* of a device reset, so nothing else is printed here unless there is
	151	* an additional failure.
	152	*/
28208c7b	153	ret = iqs620_pwm_init(iqs620_pwm, iqs620_pwm->duty_scale);
6f0841a8	154
6f0841a8 JL	155	mutex_unlock(&iqs620_pwm->lock);
	156
	157	if (ret) {
	158	dev_err(iqs620_pwm->chip.dev,
	159	"Failed to re-initialize device: %d\n", ret);
	160	return NOTIFY_BAD;
	161	}
	162
	163	return NOTIFY_OK;
	164	}
	165
	166	static const struct pwm_ops iqs620_pwm_ops = {
	167	.apply = iqs620_pwm_apply,
	168	.get_state = iqs620_pwm_get_state,
	169	.owner = THIS_MODULE,
	170	};
	171
	172	static void iqs620_pwm_notifier_unregister(void *context)
	173	{
	174	struct iqs620_pwm_private *iqs620_pwm = context;
	175	int ret;
	176
	177	ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh,
	178	&iqs620_pwm->notifier);
	179	if (ret)
	180	dev_err(iqs620_pwm->chip.dev,
	181	"Failed to unregister notifier: %d\n", ret);
	182	}
	183
	184	static int iqs620_pwm_probe(struct platform_device *pdev)
	185	{
	186	struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
	187	struct iqs620_pwm_private *iqs620_pwm;
	188	unsigned int val;
	189	int ret;
	190
	191	iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL);
	192	if (!iqs620_pwm)
	193	return -ENOMEM;
	194
6f0841a8 JL	195	iqs620_pwm->iqs62x = iqs62x;
	196
	197	ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);
	198	if (ret)
	199	return ret;
6f0841a8	200
28208c7b JL	201	if (val & IQS620_PWR_SETTINGS_PWM_OUT) {
	202	ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);
	203	if (ret)
	204	return ret;
	205
	206	iqs620_pwm->duty_scale = val + 1;
	207	}
6f0841a8 JL	208
	209	iqs620_pwm->chip.dev = &pdev->dev;
	210	iqs620_pwm->chip.ops = &iqs620_pwm_ops;
6f0841a8 JL	211	iqs620_pwm->chip.npwm = 1;
	212
	213	mutex_init(&iqs620_pwm->lock);
	214
	215	iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier;
	216	ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh,
	217	&iqs620_pwm->notifier);
	218	if (ret) {
	219	dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
	220	return ret;
	221	}
	222
	223	ret = devm_add_action_or_reset(&pdev->dev,
	224	iqs620_pwm_notifier_unregister,
	225	iqs620_pwm);
	226	if (ret)
	227	return ret;
	228
2e27afd0	229	ret = devm_pwmchip_add(&pdev->dev, &iqs620_pwm->chip);
6f0841a8 JL	230	if (ret)
	231	dev_err(&pdev->dev, "Failed to add device: %d\n", ret);
	232
	233	return ret;
	234	}
	235
6f0841a8 JL	236	static struct platform_driver iqs620_pwm_platform_driver = {
	237	.driver = {
	238	.name = "iqs620a-pwm",
	239	},
	240	.probe = iqs620_pwm_probe,
6f0841a8 JL	241	};
	242	module_platform_driver(iqs620_pwm_platform_driver);
	243
	244	MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
	245	MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator");
	246	MODULE_LICENSE("GPL");
	247	MODULE_ALIAS("platform:iqs620a-pwm");