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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
a2308698 HS |
2 | /* |
3 | * PWM framework driver for Cirrus Logic EP93xx | |
4 | * | |
5 | * Copyright (c) 2009 Matthieu Crapet <mcrapet@gmail.com> | |
6 | * Copyright (c) 2009, 2013 H Hartley Sweeten <hsweeten@visionengravers.com> | |
7 | * | |
8 | * EP9301/02 have only one channel: | |
9 | * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14) | |
10 | * | |
11 | * EP9307 has only one channel: | |
12 | * platform device ep93xx-pwm.0 - PWMOUT | |
13 | * | |
14 | * EP9312/15 have two channels: | |
15 | * platform device ep93xx-pwm.0 - PWMOUT | |
16 | * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14) | |
a2308698 HS |
17 | */ |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/clk.h> | |
23 | #include <linux/err.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/pwm.h> | |
26 | ||
27 | #include <asm/div64.h> | |
28 | ||
67e38f57 | 29 | #include <linux/soc/cirrus/ep93xx.h> /* for ep93xx_pwm_{acquire,release}_gpio() */ |
a2308698 HS |
30 | |
31 | #define EP93XX_PWMx_TERM_COUNT 0x00 | |
32 | #define EP93XX_PWMx_DUTY_CYCLE 0x04 | |
33 | #define EP93XX_PWMx_ENABLE 0x08 | |
34 | #define EP93XX_PWMx_INVERT 0x0c | |
35 | ||
36 | struct ep93xx_pwm { | |
37 | void __iomem *base; | |
38 | struct clk *clk; | |
39 | struct pwm_chip chip; | |
40 | }; | |
41 | ||
42 | static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip) | |
43 | { | |
44 | return container_of(chip, struct ep93xx_pwm, chip); | |
45 | } | |
46 | ||
47 | static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) | |
48 | { | |
49 | struct platform_device *pdev = to_platform_device(chip->dev); | |
50 | ||
51 | return ep93xx_pwm_acquire_gpio(pdev); | |
52 | } | |
53 | ||
54 | static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) | |
55 | { | |
56 | struct platform_device *pdev = to_platform_device(chip->dev); | |
57 | ||
58 | ep93xx_pwm_release_gpio(pdev); | |
59 | } | |
60 | ||
61 | static int ep93xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, | |
62 | int duty_ns, int period_ns) | |
63 | { | |
64 | struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); | |
65 | void __iomem *base = ep93xx_pwm->base; | |
66 | unsigned long long c; | |
67 | unsigned long period_cycles; | |
68 | unsigned long duty_cycles; | |
69 | unsigned long term; | |
70 | int ret = 0; | |
71 | ||
72 | /* | |
73 | * The clock needs to be enabled to access the PWM registers. | |
74 | * Configuration can be changed at any time. | |
75 | */ | |
5c31252c | 76 | if (!pwm_is_enabled(pwm)) { |
a2308698 HS |
77 | ret = clk_enable(ep93xx_pwm->clk); |
78 | if (ret) | |
79 | return ret; | |
80 | } | |
81 | ||
82 | c = clk_get_rate(ep93xx_pwm->clk); | |
83 | c *= period_ns; | |
84 | do_div(c, 1000000000); | |
85 | period_cycles = c; | |
86 | ||
87 | c = period_cycles; | |
88 | c *= duty_ns; | |
89 | do_div(c, period_ns); | |
90 | duty_cycles = c; | |
91 | ||
92 | if (period_cycles < 0x10000 && duty_cycles < 0x10000) { | |
93 | term = readw(base + EP93XX_PWMx_TERM_COUNT); | |
94 | ||
95 | /* Order is important if PWM is running */ | |
96 | if (period_cycles > term) { | |
97 | writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); | |
98 | writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); | |
99 | } else { | |
100 | writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); | |
101 | writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); | |
102 | } | |
103 | } else { | |
104 | ret = -EINVAL; | |
105 | } | |
106 | ||
5c31252c | 107 | if (!pwm_is_enabled(pwm)) |
a2308698 HS |
108 | clk_disable(ep93xx_pwm->clk); |
109 | ||
110 | return ret; | |
111 | } | |
112 | ||
113 | static int ep93xx_pwm_polarity(struct pwm_chip *chip, struct pwm_device *pwm, | |
114 | enum pwm_polarity polarity) | |
115 | { | |
116 | struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); | |
117 | int ret; | |
118 | ||
119 | /* | |
120 | * The clock needs to be enabled to access the PWM registers. | |
121 | * Polarity can only be changed when the PWM is disabled. | |
122 | */ | |
123 | ret = clk_enable(ep93xx_pwm->clk); | |
124 | if (ret) | |
125 | return ret; | |
126 | ||
127 | if (polarity == PWM_POLARITY_INVERSED) | |
128 | writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT); | |
129 | else | |
130 | writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT); | |
131 | ||
132 | clk_disable(ep93xx_pwm->clk); | |
133 | ||
134 | return 0; | |
135 | } | |
136 | ||
137 | static int ep93xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |
138 | { | |
139 | struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); | |
140 | int ret; | |
141 | ||
142 | ret = clk_enable(ep93xx_pwm->clk); | |
143 | if (ret) | |
144 | return ret; | |
145 | ||
146 | writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static void ep93xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) | |
152 | { | |
153 | struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); | |
154 | ||
155 | writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); | |
156 | clk_disable(ep93xx_pwm->clk); | |
157 | } | |
158 | ||
159 | static const struct pwm_ops ep93xx_pwm_ops = { | |
160 | .request = ep93xx_pwm_request, | |
161 | .free = ep93xx_pwm_free, | |
162 | .config = ep93xx_pwm_config, | |
163 | .set_polarity = ep93xx_pwm_polarity, | |
164 | .enable = ep93xx_pwm_enable, | |
165 | .disable = ep93xx_pwm_disable, | |
166 | .owner = THIS_MODULE, | |
167 | }; | |
168 | ||
169 | static int ep93xx_pwm_probe(struct platform_device *pdev) | |
170 | { | |
171 | struct ep93xx_pwm *ep93xx_pwm; | |
a2308698 HS |
172 | int ret; |
173 | ||
174 | ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL); | |
175 | if (!ep93xx_pwm) | |
176 | return -ENOMEM; | |
177 | ||
fc0155f8 | 178 | ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0); |
a2308698 HS |
179 | if (IS_ERR(ep93xx_pwm->base)) |
180 | return PTR_ERR(ep93xx_pwm->base); | |
181 | ||
182 | ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk"); | |
183 | if (IS_ERR(ep93xx_pwm->clk)) | |
184 | return PTR_ERR(ep93xx_pwm->clk); | |
185 | ||
186 | ep93xx_pwm->chip.dev = &pdev->dev; | |
187 | ep93xx_pwm->chip.ops = &ep93xx_pwm_ops; | |
a2308698 HS |
188 | ep93xx_pwm->chip.npwm = 1; |
189 | ||
190 | ret = pwmchip_add(&ep93xx_pwm->chip); | |
191 | if (ret < 0) | |
192 | return ret; | |
193 | ||
194 | platform_set_drvdata(pdev, ep93xx_pwm); | |
195 | return 0; | |
196 | } | |
197 | ||
198 | static int ep93xx_pwm_remove(struct platform_device *pdev) | |
199 | { | |
200 | struct ep93xx_pwm *ep93xx_pwm = platform_get_drvdata(pdev); | |
201 | ||
202 | return pwmchip_remove(&ep93xx_pwm->chip); | |
203 | } | |
204 | ||
205 | static struct platform_driver ep93xx_pwm_driver = { | |
206 | .driver = { | |
207 | .name = "ep93xx-pwm", | |
208 | }, | |
209 | .probe = ep93xx_pwm_probe, | |
210 | .remove = ep93xx_pwm_remove, | |
211 | }; | |
212 | module_platform_driver(ep93xx_pwm_driver); | |
213 | ||
214 | MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver"); | |
5eabf82e JH |
215 | MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>"); |
216 | MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>"); | |
a2308698 HS |
217 | MODULE_ALIAS("platform:ep93xx-pwm"); |
218 | MODULE_LICENSE("GPL"); |