Commit | Line | Data |
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59d5c8b1 AT |
1 | /* |
2 | * Marvell Berlin PWM driver | |
3 | * | |
4 | * Copyright (C) 2015 Marvell Technology Group Ltd. | |
5 | * | |
6 | * Author: Antoine Tenart <antoine.tenart@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #include <linux/clk.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/kernel.h> | |
0a41b0c5 | 16 | #include <linux/mod_devicetable.h> |
59d5c8b1 AT |
17 | #include <linux/module.h> |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/pwm.h> | |
bbf0722c | 20 | #include <linux/slab.h> |
59d5c8b1 AT |
21 | |
22 | #define BERLIN_PWM_EN 0x0 | |
23 | #define BERLIN_PWM_ENABLE BIT(0) | |
24 | #define BERLIN_PWM_CONTROL 0x4 | |
4de445cb TH |
25 | /* |
26 | * The prescaler claims to support 8 different moduli, configured using the | |
27 | * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64, | |
28 | * 256, 1024, and 4096.) However, the moduli from 4 to 1024 appear to be | |
29 | * implemented by internally shifting TCNT left without adding additional | |
30 | * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff; | |
31 | * for 8, 0x1fff; and so on. This means that those moduli are entirely | |
32 | * useless, as we could just do the shift ourselves. The 4096 modulus is | |
33 | * implemented with a real prescaler, so we do use that, but we treat it | |
34 | * as a flag instead of pretending the modulus is actually configurable. | |
35 | */ | |
36 | #define BERLIN_PWM_PRESCALE_4096 0x7 | |
59d5c8b1 AT |
37 | #define BERLIN_PWM_INVERT_POLARITY BIT(3) |
38 | #define BERLIN_PWM_DUTY 0x8 | |
39 | #define BERLIN_PWM_TCNT 0xc | |
40 | #define BERLIN_PWM_MAX_TCNT 65535 | |
41 | ||
1b2af7bb UKK |
42 | #define BERLIN_PWM_NUMPWMS 4 |
43 | ||
bbf0722c JZ |
44 | struct berlin_pwm_channel { |
45 | u32 enable; | |
46 | u32 ctrl; | |
47 | u32 duty; | |
48 | u32 tcnt; | |
49 | }; | |
50 | ||
59d5c8b1 | 51 | struct berlin_pwm_chip { |
59d5c8b1 AT |
52 | struct clk *clk; |
53 | void __iomem *base; | |
1b2af7bb | 54 | struct berlin_pwm_channel channel[BERLIN_PWM_NUMPWMS]; |
59d5c8b1 AT |
55 | }; |
56 | ||
57 | static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip) | |
58 | { | |
bf756bfd | 59 | return pwmchip_get_drvdata(chip); |
59d5c8b1 AT |
60 | } |
61 | ||
3f3e8051 | 62 | static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *bpc, |
59d5c8b1 AT |
63 | unsigned int channel, unsigned long offset) |
64 | { | |
3f3e8051 | 65 | return readl_relaxed(bpc->base + channel * 0x10 + offset); |
59d5c8b1 AT |
66 | } |
67 | ||
3f3e8051 | 68 | static inline void berlin_pwm_writel(struct berlin_pwm_chip *bpc, |
59d5c8b1 AT |
69 | unsigned int channel, u32 value, |
70 | unsigned long offset) | |
71 | { | |
3f3e8051 | 72 | writel_relaxed(value, bpc->base + channel * 0x10 + offset); |
59d5c8b1 AT |
73 | } |
74 | ||
3f3e8051 | 75 | static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
30dffb42 | 76 | u64 duty_ns, u64 period_ns) |
59d5c8b1 | 77 | { |
3f3e8051 | 78 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); |
4de445cb | 79 | bool prescale_4096 = false; |
59d5c8b1 | 80 | u32 value, duty, period; |
4de445cb | 81 | u64 cycles; |
59d5c8b1 | 82 | |
3f3e8051 | 83 | cycles = clk_get_rate(bpc->clk); |
59d5c8b1 AT |
84 | cycles *= period_ns; |
85 | do_div(cycles, NSEC_PER_SEC); | |
86 | ||
4de445cb TH |
87 | if (cycles > BERLIN_PWM_MAX_TCNT) { |
88 | prescale_4096 = true; | |
89 | cycles >>= 12; // Prescaled by 4096 | |
59d5c8b1 | 90 | |
4de445cb TH |
91 | if (cycles > BERLIN_PWM_MAX_TCNT) |
92 | return -ERANGE; | |
59d5c8b1 AT |
93 | } |
94 | ||
4de445cb TH |
95 | period = cycles; |
96 | cycles *= duty_ns; | |
59d5c8b1 AT |
97 | do_div(cycles, period_ns); |
98 | duty = cycles; | |
99 | ||
3f3e8051 | 100 | value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL); |
4de445cb TH |
101 | if (prescale_4096) |
102 | value |= BERLIN_PWM_PRESCALE_4096; | |
103 | else | |
104 | value &= ~BERLIN_PWM_PRESCALE_4096; | |
3f3e8051 | 105 | berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL); |
59d5c8b1 | 106 | |
3f3e8051 UKK |
107 | berlin_pwm_writel(bpc, pwm->hwpwm, duty, BERLIN_PWM_DUTY); |
108 | berlin_pwm_writel(bpc, pwm->hwpwm, period, BERLIN_PWM_TCNT); | |
59d5c8b1 AT |
109 | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static int berlin_pwm_set_polarity(struct pwm_chip *chip, | |
3f3e8051 | 114 | struct pwm_device *pwm, |
59d5c8b1 AT |
115 | enum pwm_polarity polarity) |
116 | { | |
3f3e8051 | 117 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); |
59d5c8b1 AT |
118 | u32 value; |
119 | ||
3f3e8051 | 120 | value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL); |
59d5c8b1 AT |
121 | |
122 | if (polarity == PWM_POLARITY_NORMAL) | |
123 | value &= ~BERLIN_PWM_INVERT_POLARITY; | |
124 | else | |
125 | value |= BERLIN_PWM_INVERT_POLARITY; | |
126 | ||
3f3e8051 | 127 | berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL); |
59d5c8b1 AT |
128 | |
129 | return 0; | |
130 | } | |
131 | ||
3f3e8051 | 132 | static int berlin_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
59d5c8b1 | 133 | { |
3f3e8051 | 134 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); |
59d5c8b1 AT |
135 | u32 value; |
136 | ||
3f3e8051 | 137 | value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN); |
59d5c8b1 | 138 | value |= BERLIN_PWM_ENABLE; |
3f3e8051 | 139 | berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN); |
59d5c8b1 AT |
140 | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static void berlin_pwm_disable(struct pwm_chip *chip, | |
3f3e8051 | 145 | struct pwm_device *pwm) |
59d5c8b1 | 146 | { |
3f3e8051 | 147 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); |
59d5c8b1 AT |
148 | u32 value; |
149 | ||
3f3e8051 | 150 | value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN); |
59d5c8b1 | 151 | value &= ~BERLIN_PWM_ENABLE; |
3f3e8051 | 152 | berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN); |
59d5c8b1 AT |
153 | } |
154 | ||
30dffb42 UKK |
155 | static int berlin_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
156 | const struct pwm_state *state) | |
157 | { | |
158 | int err; | |
159 | bool enabled = pwm->state.enabled; | |
160 | ||
161 | if (state->polarity != pwm->state.polarity) { | |
162 | if (enabled) { | |
163 | berlin_pwm_disable(chip, pwm); | |
164 | enabled = false; | |
165 | } | |
166 | ||
167 | err = berlin_pwm_set_polarity(chip, pwm, state->polarity); | |
168 | if (err) | |
169 | return err; | |
170 | } | |
171 | ||
172 | if (!state->enabled) { | |
173 | if (enabled) | |
174 | berlin_pwm_disable(chip, pwm); | |
175 | return 0; | |
176 | } | |
177 | ||
7d6d4aaf UKK |
178 | err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period); |
179 | if (err) | |
180 | return err; | |
30dffb42 UKK |
181 | |
182 | if (!enabled) | |
183 | return berlin_pwm_enable(chip, pwm); | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
59d5c8b1 | 188 | static const struct pwm_ops berlin_pwm_ops = { |
30dffb42 | 189 | .apply = berlin_pwm_apply, |
59d5c8b1 AT |
190 | }; |
191 | ||
192 | static const struct of_device_id berlin_pwm_match[] = { | |
193 | { .compatible = "marvell,berlin-pwm" }, | |
194 | { }, | |
195 | }; | |
196 | MODULE_DEVICE_TABLE(of, berlin_pwm_match); | |
197 | ||
198 | static int berlin_pwm_probe(struct platform_device *pdev) | |
199 | { | |
5874eaf8 | 200 | struct pwm_chip *chip; |
3f3e8051 | 201 | struct berlin_pwm_chip *bpc; |
59d5c8b1 AT |
202 | int ret; |
203 | ||
bf756bfd UKK |
204 | chip = devm_pwmchip_alloc(&pdev->dev, BERLIN_PWM_NUMPWMS, sizeof(*bpc)); |
205 | if (IS_ERR(chip)) | |
206 | return PTR_ERR(chip); | |
207 | bpc = to_berlin_pwm_chip(chip); | |
59d5c8b1 | 208 | |
3f3e8051 UKK |
209 | bpc->base = devm_platform_ioremap_resource(pdev, 0); |
210 | if (IS_ERR(bpc->base)) | |
211 | return PTR_ERR(bpc->base); | |
59d5c8b1 | 212 | |
6dbf23f5 | 213 | bpc->clk = devm_clk_get_enabled(&pdev->dev, NULL); |
3f3e8051 UKK |
214 | if (IS_ERR(bpc->clk)) |
215 | return PTR_ERR(bpc->clk); | |
59d5c8b1 | 216 | |
5874eaf8 | 217 | chip->ops = &berlin_pwm_ops; |
59d5c8b1 | 218 | |
5874eaf8 | 219 | ret = devm_pwmchip_add(&pdev->dev, chip); |
6dbf23f5 UKK |
220 | if (ret < 0) |
221 | return dev_err_probe(&pdev->dev, ret, "failed to add PWM chip\n"); | |
59d5c8b1 | 222 | |
5874eaf8 | 223 | platform_set_drvdata(pdev, chip); |
59d5c8b1 AT |
224 | |
225 | return 0; | |
226 | } | |
227 | ||
bbf0722c JZ |
228 | static int berlin_pwm_suspend(struct device *dev) |
229 | { | |
5874eaf8 UKK |
230 | struct pwm_chip *chip = dev_get_drvdata(dev); |
231 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); | |
bbf0722c JZ |
232 | unsigned int i; |
233 | ||
5874eaf8 | 234 | for (i = 0; i < chip->npwm; i++) { |
1b2af7bb | 235 | struct berlin_pwm_channel *channel = &bpc->channel[i]; |
bbf0722c | 236 | |
3f3e8051 UKK |
237 | channel->enable = berlin_pwm_readl(bpc, i, BERLIN_PWM_ENABLE); |
238 | channel->ctrl = berlin_pwm_readl(bpc, i, BERLIN_PWM_CONTROL); | |
239 | channel->duty = berlin_pwm_readl(bpc, i, BERLIN_PWM_DUTY); | |
240 | channel->tcnt = berlin_pwm_readl(bpc, i, BERLIN_PWM_TCNT); | |
bbf0722c JZ |
241 | } |
242 | ||
3f3e8051 | 243 | clk_disable_unprepare(bpc->clk); |
bbf0722c JZ |
244 | |
245 | return 0; | |
246 | } | |
247 | ||
248 | static int berlin_pwm_resume(struct device *dev) | |
249 | { | |
5874eaf8 UKK |
250 | struct pwm_chip *chip = dev_get_drvdata(dev); |
251 | struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip); | |
bbf0722c JZ |
252 | unsigned int i; |
253 | int ret; | |
254 | ||
3f3e8051 | 255 | ret = clk_prepare_enable(bpc->clk); |
bbf0722c JZ |
256 | if (ret) |
257 | return ret; | |
258 | ||
5874eaf8 | 259 | for (i = 0; i < chip->npwm; i++) { |
1b2af7bb | 260 | struct berlin_pwm_channel *channel = &bpc->channel[i]; |
bbf0722c | 261 | |
3f3e8051 UKK |
262 | berlin_pwm_writel(bpc, i, channel->ctrl, BERLIN_PWM_CONTROL); |
263 | berlin_pwm_writel(bpc, i, channel->duty, BERLIN_PWM_DUTY); | |
264 | berlin_pwm_writel(bpc, i, channel->tcnt, BERLIN_PWM_TCNT); | |
265 | berlin_pwm_writel(bpc, i, channel->enable, BERLIN_PWM_ENABLE); | |
bbf0722c JZ |
266 | } |
267 | ||
268 | return 0; | |
269 | } | |
bbf0722c | 270 | |
fac37751 UKK |
271 | static DEFINE_SIMPLE_DEV_PM_OPS(berlin_pwm_pm_ops, berlin_pwm_suspend, |
272 | berlin_pwm_resume); | |
bbf0722c | 273 | |
59d5c8b1 AT |
274 | static struct platform_driver berlin_pwm_driver = { |
275 | .probe = berlin_pwm_probe, | |
59d5c8b1 AT |
276 | .driver = { |
277 | .name = "berlin-pwm", | |
278 | .of_match_table = berlin_pwm_match, | |
fac37751 | 279 | .pm = pm_ptr(&berlin_pwm_pm_ops), |
59d5c8b1 AT |
280 | }, |
281 | }; | |
282 | module_platform_driver(berlin_pwm_driver); | |
283 | ||
284 | MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>"); | |
285 | MODULE_DESCRIPTION("Marvell Berlin PWM driver"); | |
286 | MODULE_LICENSE("GPL v2"); |