Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d94ba80e RC |
2 | /* |
3 | * PTP 1588 clock support - sysfs interface. | |
4 | * | |
5 | * Copyright (C) 2010 OMICRON electronics GmbH | |
73f37068 | 6 | * Copyright 2021 NXP |
d94ba80e RC |
7 | */ |
8 | #include <linux/capability.h> | |
653104d1 | 9 | #include <linux/slab.h> |
d94ba80e RC |
10 | |
11 | #include "ptp_private.h" | |
12 | ||
13 | static ssize_t clock_name_show(struct device *dev, | |
14 | struct device_attribute *attr, char *page) | |
15 | { | |
16 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
e2cf0765 | 17 | return sysfs_emit(page, "%s\n", ptp->info->name); |
d94ba80e | 18 | } |
63215705 | 19 | static DEVICE_ATTR_RO(clock_name); |
d94ba80e | 20 | |
c3b60ab7 RR |
21 | static ssize_t max_phase_adjustment_show(struct device *dev, |
22 | struct device_attribute *attr, | |
23 | char *page) | |
24 | { | |
25 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
26 | ||
27 | return snprintf(page, PAGE_SIZE - 1, "%d\n", | |
28 | ptp->info->getmaxphase(ptp->info)); | |
29 | } | |
30 | static DEVICE_ATTR_RO(max_phase_adjustment); | |
31 | ||
3499116b GKH |
32 | #define PTP_SHOW_INT(name, var) \ |
33 | static ssize_t var##_show(struct device *dev, \ | |
d94ba80e RC |
34 | struct device_attribute *attr, char *page) \ |
35 | { \ | |
36 | struct ptp_clock *ptp = dev_get_drvdata(dev); \ | |
3499116b GKH |
37 | return snprintf(page, PAGE_SIZE-1, "%d\n", ptp->info->var); \ |
38 | } \ | |
39 | static DEVICE_ATTR(name, 0444, var##_show, NULL); | |
d94ba80e | 40 | |
3499116b GKH |
41 | PTP_SHOW_INT(max_adjustment, max_adj); |
42 | PTP_SHOW_INT(n_alarms, n_alarm); | |
43 | PTP_SHOW_INT(n_external_timestamps, n_ext_ts); | |
44 | PTP_SHOW_INT(n_periodic_outputs, n_per_out); | |
653104d1 | 45 | PTP_SHOW_INT(n_programmable_pins, n_pins); |
3499116b | 46 | PTP_SHOW_INT(pps_available, pps); |
d94ba80e | 47 | |
d94ba80e RC |
48 | static ssize_t extts_enable_store(struct device *dev, |
49 | struct device_attribute *attr, | |
50 | const char *buf, size_t count) | |
51 | { | |
52 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
53 | struct ptp_clock_info *ops = ptp->info; | |
54 | struct ptp_clock_request req = { .type = PTP_CLK_REQ_EXTTS }; | |
55 | int cnt, enable; | |
56 | int err = -EINVAL; | |
57 | ||
58 | cnt = sscanf(buf, "%u %d", &req.extts.index, &enable); | |
59 | if (cnt != 2) | |
60 | goto out; | |
61 | if (req.extts.index >= ops->n_ext_ts) | |
62 | goto out; | |
63 | ||
64 | err = ops->enable(ops, &req, enable ? 1 : 0); | |
65 | if (err) | |
66 | goto out; | |
67 | ||
68 | return count; | |
69 | out: | |
70 | return err; | |
71 | } | |
af59e717 | 72 | static DEVICE_ATTR(extts_enable, 0220, NULL, extts_enable_store); |
d94ba80e RC |
73 | |
74 | static ssize_t extts_fifo_show(struct device *dev, | |
75 | struct device_attribute *attr, char *page) | |
76 | { | |
77 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
d26ab5a3 | 78 | struct timestamp_event_queue *queue; |
d94ba80e RC |
79 | struct ptp_extts_event event; |
80 | unsigned long flags; | |
81 | size_t qcnt; | |
82 | int cnt = 0; | |
83 | ||
8f5de6fb XM |
84 | cnt = list_count_nodes(&ptp->tsevqs); |
85 | if (cnt <= 0) | |
86 | goto out; | |
87 | ||
d26ab5a3 XM |
88 | /* The sysfs fifo will always draw from the fist queue */ |
89 | queue = list_first_entry(&ptp->tsevqs, struct timestamp_event_queue, | |
90 | qlist); | |
91 | ||
d94ba80e | 92 | memset(&event, 0, sizeof(event)); |
d94ba80e RC |
93 | spin_lock_irqsave(&queue->lock, flags); |
94 | qcnt = queue_cnt(queue); | |
95 | if (qcnt) { | |
96 | event = queue->buf[queue->head]; | |
73bde5a3 ED |
97 | /* Paired with READ_ONCE() in queue_cnt() */ |
98 | WRITE_ONCE(queue->head, (queue->head + 1) % PTP_MAX_TIMESTAMPS); | |
d94ba80e RC |
99 | } |
100 | spin_unlock_irqrestore(&queue->lock, flags); | |
101 | ||
102 | if (!qcnt) | |
103 | goto out; | |
104 | ||
105 | cnt = snprintf(page, PAGE_SIZE, "%u %lld %u\n", | |
106 | event.index, event.t.sec, event.t.nsec); | |
107 | out: | |
d94ba80e RC |
108 | return cnt; |
109 | } | |
af59e717 | 110 | static DEVICE_ATTR(fifo, 0444, extts_fifo_show, NULL); |
d94ba80e RC |
111 | |
112 | static ssize_t period_store(struct device *dev, | |
113 | struct device_attribute *attr, | |
114 | const char *buf, size_t count) | |
115 | { | |
116 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
117 | struct ptp_clock_info *ops = ptp->info; | |
118 | struct ptp_clock_request req = { .type = PTP_CLK_REQ_PEROUT }; | |
119 | int cnt, enable, err = -EINVAL; | |
120 | ||
121 | cnt = sscanf(buf, "%u %lld %u %lld %u", &req.perout.index, | |
122 | &req.perout.start.sec, &req.perout.start.nsec, | |
123 | &req.perout.period.sec, &req.perout.period.nsec); | |
124 | if (cnt != 5) | |
125 | goto out; | |
126 | if (req.perout.index >= ops->n_per_out) | |
127 | goto out; | |
128 | ||
129 | enable = req.perout.period.sec || req.perout.period.nsec; | |
130 | err = ops->enable(ops, &req, enable); | |
131 | if (err) | |
132 | goto out; | |
133 | ||
134 | return count; | |
135 | out: | |
136 | return err; | |
137 | } | |
af59e717 | 138 | static DEVICE_ATTR(period, 0220, NULL, period_store); |
d94ba80e RC |
139 | |
140 | static ssize_t pps_enable_store(struct device *dev, | |
141 | struct device_attribute *attr, | |
142 | const char *buf, size_t count) | |
143 | { | |
144 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
145 | struct ptp_clock_info *ops = ptp->info; | |
146 | struct ptp_clock_request req = { .type = PTP_CLK_REQ_PPS }; | |
147 | int cnt, enable; | |
148 | int err = -EINVAL; | |
149 | ||
150 | if (!capable(CAP_SYS_TIME)) | |
151 | return -EPERM; | |
152 | ||
153 | cnt = sscanf(buf, "%d", &enable); | |
154 | if (cnt != 1) | |
155 | goto out; | |
156 | ||
157 | err = ops->enable(ops, &req, enable ? 1 : 0); | |
158 | if (err) | |
159 | goto out; | |
160 | ||
161 | return count; | |
162 | out: | |
163 | return err; | |
164 | } | |
af59e717 DT |
165 | static DEVICE_ATTR(pps_enable, 0220, NULL, pps_enable_store); |
166 | ||
73f37068 YL |
167 | static int unregister_vclock(struct device *dev, void *data) |
168 | { | |
169 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
170 | struct ptp_clock_info *info = ptp->info; | |
171 | struct ptp_vclock *vclock; | |
d329e41a | 172 | u32 *num = data; |
73f37068 YL |
173 | |
174 | vclock = info_to_vclock(info); | |
175 | dev_info(dev->parent, "delete virtual clock ptp%d\n", | |
176 | vclock->clock->index); | |
177 | ||
178 | ptp_vclock_unregister(vclock); | |
179 | (*num)--; | |
180 | ||
181 | /* For break. Not error. */ | |
182 | if (*num == 0) | |
183 | return -EINVAL; | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
188 | static ssize_t n_vclocks_show(struct device *dev, | |
189 | struct device_attribute *attr, char *page) | |
190 | { | |
191 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
192 | ssize_t size; | |
193 | ||
194 | if (mutex_lock_interruptible(&ptp->n_vclocks_mux)) | |
195 | return -ERESTARTSYS; | |
196 | ||
f6a175cf | 197 | size = snprintf(page, PAGE_SIZE - 1, "%u\n", ptp->n_vclocks); |
73f37068 YL |
198 | |
199 | mutex_unlock(&ptp->n_vclocks_mux); | |
200 | ||
201 | return size; | |
202 | } | |
203 | ||
204 | static ssize_t n_vclocks_store(struct device *dev, | |
205 | struct device_attribute *attr, | |
206 | const char *buf, size_t count) | |
207 | { | |
208 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
209 | struct ptp_vclock *vclock; | |
210 | int err = -EINVAL; | |
211 | u32 num, i; | |
212 | ||
213 | if (kstrtou32(buf, 0, &num)) | |
214 | return err; | |
215 | ||
216 | if (mutex_lock_interruptible(&ptp->n_vclocks_mux)) | |
217 | return -ERESTARTSYS; | |
218 | ||
219 | if (num > ptp->max_vclocks) { | |
220 | dev_err(dev, "max value is %d\n", ptp->max_vclocks); | |
221 | goto out; | |
222 | } | |
223 | ||
224 | /* Need to create more vclocks */ | |
225 | if (num > ptp->n_vclocks) { | |
226 | for (i = 0; i < num - ptp->n_vclocks; i++) { | |
227 | vclock = ptp_vclock_register(ptp); | |
228 | if (!vclock) | |
229 | goto out; | |
230 | ||
44c494c8 YL |
231 | *(ptp->vclock_index + ptp->n_vclocks + i) = |
232 | vclock->clock->index; | |
233 | ||
73f37068 YL |
234 | dev_info(dev, "new virtual clock ptp%d\n", |
235 | vclock->clock->index); | |
236 | } | |
237 | } | |
238 | ||
239 | /* Need to delete vclocks */ | |
240 | if (num < ptp->n_vclocks) { | |
241 | i = ptp->n_vclocks - num; | |
242 | device_for_each_child_reverse(dev, &i, | |
243 | unregister_vclock); | |
44c494c8 YL |
244 | |
245 | for (i = 1; i <= ptp->n_vclocks - num; i++) | |
246 | *(ptp->vclock_index + ptp->n_vclocks - i) = -1; | |
73f37068 YL |
247 | } |
248 | ||
42704b26 GE |
249 | /* Need to inform about changed physical clock behavior */ |
250 | if (!ptp->has_cycles) { | |
251 | if (num == 0) | |
252 | dev_info(dev, "only physical clock in use now\n"); | |
253 | else | |
254 | dev_info(dev, "guarantee physical clock free running\n"); | |
255 | } | |
73f37068 YL |
256 | |
257 | ptp->n_vclocks = num; | |
258 | mutex_unlock(&ptp->n_vclocks_mux); | |
259 | ||
260 | return count; | |
261 | out: | |
262 | mutex_unlock(&ptp->n_vclocks_mux); | |
263 | return err; | |
264 | } | |
265 | static DEVICE_ATTR_RW(n_vclocks); | |
266 | ||
267 | static ssize_t max_vclocks_show(struct device *dev, | |
268 | struct device_attribute *attr, char *page) | |
269 | { | |
270 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
271 | ssize_t size; | |
272 | ||
f6a175cf | 273 | size = snprintf(page, PAGE_SIZE - 1, "%u\n", ptp->max_vclocks); |
73f37068 YL |
274 | |
275 | return size; | |
276 | } | |
277 | ||
278 | static ssize_t max_vclocks_store(struct device *dev, | |
279 | struct device_attribute *attr, | |
280 | const char *buf, size_t count) | |
281 | { | |
282 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
44c494c8 YL |
283 | unsigned int *vclock_index; |
284 | int err = -EINVAL; | |
285 | size_t size; | |
73f37068 YL |
286 | u32 max; |
287 | ||
288 | if (kstrtou32(buf, 0, &max) || max == 0) | |
289 | return -EINVAL; | |
290 | ||
291 | if (max == ptp->max_vclocks) | |
292 | return count; | |
293 | ||
294 | if (mutex_lock_interruptible(&ptp->n_vclocks_mux)) | |
295 | return -ERESTARTSYS; | |
296 | ||
44c494c8 YL |
297 | if (max < ptp->n_vclocks) |
298 | goto out; | |
299 | ||
300 | size = sizeof(int) * max; | |
301 | vclock_index = kzalloc(size, GFP_KERNEL); | |
302 | if (!vclock_index) { | |
303 | err = -ENOMEM; | |
304 | goto out; | |
73f37068 YL |
305 | } |
306 | ||
44c494c8 YL |
307 | size = sizeof(int) * ptp->n_vclocks; |
308 | memcpy(vclock_index, ptp->vclock_index, size); | |
309 | ||
310 | kfree(ptp->vclock_index); | |
311 | ptp->vclock_index = vclock_index; | |
73f37068 YL |
312 | ptp->max_vclocks = max; |
313 | ||
314 | mutex_unlock(&ptp->n_vclocks_mux); | |
315 | ||
316 | return count; | |
44c494c8 YL |
317 | out: |
318 | mutex_unlock(&ptp->n_vclocks_mux); | |
319 | return err; | |
73f37068 YL |
320 | } |
321 | static DEVICE_ATTR_RW(max_vclocks); | |
322 | ||
af59e717 DT |
323 | static struct attribute *ptp_attrs[] = { |
324 | &dev_attr_clock_name.attr, | |
325 | ||
326 | &dev_attr_max_adjustment.attr, | |
c3b60ab7 | 327 | &dev_attr_max_phase_adjustment.attr, |
af59e717 DT |
328 | &dev_attr_n_alarms.attr, |
329 | &dev_attr_n_external_timestamps.attr, | |
330 | &dev_attr_n_periodic_outputs.attr, | |
331 | &dev_attr_n_programmable_pins.attr, | |
332 | &dev_attr_pps_available.attr, | |
333 | ||
334 | &dev_attr_extts_enable.attr, | |
335 | &dev_attr_fifo.attr, | |
336 | &dev_attr_period.attr, | |
337 | &dev_attr_pps_enable.attr, | |
73f37068 YL |
338 | &dev_attr_n_vclocks.attr, |
339 | &dev_attr_max_vclocks.attr, | |
af59e717 DT |
340 | NULL |
341 | }; | |
342 | ||
343 | static umode_t ptp_is_attribute_visible(struct kobject *kobj, | |
344 | struct attribute *attr, int n) | |
345 | { | |
346 | struct device *dev = kobj_to_dev(kobj); | |
347 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
348 | struct ptp_clock_info *info = ptp->info; | |
349 | umode_t mode = attr->mode; | |
350 | ||
351 | if (attr == &dev_attr_extts_enable.attr || | |
352 | attr == &dev_attr_fifo.attr) { | |
353 | if (!info->n_ext_ts) | |
354 | mode = 0; | |
355 | } else if (attr == &dev_attr_period.attr) { | |
356 | if (!info->n_per_out) | |
357 | mode = 0; | |
358 | } else if (attr == &dev_attr_pps_enable.attr) { | |
359 | if (!info->pps) | |
360 | mode = 0; | |
73f37068 YL |
361 | } else if (attr == &dev_attr_n_vclocks.attr || |
362 | attr == &dev_attr_max_vclocks.attr) { | |
363 | if (ptp->is_virtual_clock) | |
364 | mode = 0; | |
2c5d234d RR |
365 | } else if (attr == &dev_attr_max_phase_adjustment.attr) { |
366 | if (!info->adjphase || !info->getmaxphase) | |
367 | mode = 0; | |
af59e717 DT |
368 | } |
369 | ||
370 | return mode; | |
371 | } | |
372 | ||
373 | static const struct attribute_group ptp_group = { | |
374 | .is_visible = ptp_is_attribute_visible, | |
375 | .attrs = ptp_attrs, | |
376 | }; | |
377 | ||
378 | const struct attribute_group *ptp_groups[] = { | |
379 | &ptp_group, | |
380 | NULL | |
381 | }; | |
d94ba80e | 382 | |
653104d1 RC |
383 | static int ptp_pin_name2index(struct ptp_clock *ptp, const char *name) |
384 | { | |
385 | int i; | |
386 | for (i = 0; i < ptp->info->n_pins; i++) { | |
387 | if (!strcmp(ptp->info->pin_config[i].name, name)) | |
388 | return i; | |
389 | } | |
390 | return -1; | |
391 | } | |
392 | ||
393 | static ssize_t ptp_pin_show(struct device *dev, struct device_attribute *attr, | |
394 | char *page) | |
395 | { | |
396 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
397 | unsigned int func, chan; | |
398 | int index; | |
399 | ||
400 | index = ptp_pin_name2index(ptp, attr->attr.name); | |
401 | if (index < 0) | |
402 | return -EINVAL; | |
403 | ||
404 | if (mutex_lock_interruptible(&ptp->pincfg_mux)) | |
405 | return -ERESTARTSYS; | |
406 | ||
407 | func = ptp->info->pin_config[index].func; | |
408 | chan = ptp->info->pin_config[index].chan; | |
409 | ||
410 | mutex_unlock(&ptp->pincfg_mux); | |
411 | ||
e2cf0765 | 412 | return sysfs_emit(page, "%u %u\n", func, chan); |
653104d1 RC |
413 | } |
414 | ||
415 | static ssize_t ptp_pin_store(struct device *dev, struct device_attribute *attr, | |
416 | const char *buf, size_t count) | |
417 | { | |
418 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
419 | unsigned int func, chan; | |
420 | int cnt, err, index; | |
421 | ||
422 | cnt = sscanf(buf, "%u %u", &func, &chan); | |
423 | if (cnt != 2) | |
424 | return -EINVAL; | |
425 | ||
426 | index = ptp_pin_name2index(ptp, attr->attr.name); | |
427 | if (index < 0) | |
428 | return -EINVAL; | |
429 | ||
430 | if (mutex_lock_interruptible(&ptp->pincfg_mux)) | |
431 | return -ERESTARTSYS; | |
432 | err = ptp_set_pinfunc(ptp, index, func, chan); | |
433 | mutex_unlock(&ptp->pincfg_mux); | |
434 | if (err) | |
435 | return err; | |
436 | ||
437 | return count; | |
438 | } | |
439 | ||
85a66e55 | 440 | int ptp_populate_pin_groups(struct ptp_clock *ptp) |
d94ba80e | 441 | { |
653104d1 RC |
442 | struct ptp_clock_info *info = ptp->info; |
443 | int err = -ENOMEM, i, n_pins = info->n_pins; | |
444 | ||
85a66e55 DT |
445 | if (!n_pins) |
446 | return 0; | |
447 | ||
6f7aa56b | 448 | ptp->pin_dev_attr = kcalloc(n_pins, sizeof(*ptp->pin_dev_attr), |
653104d1 RC |
449 | GFP_KERNEL); |
450 | if (!ptp->pin_dev_attr) | |
451 | goto no_dev_attr; | |
452 | ||
6f7aa56b | 453 | ptp->pin_attr = kcalloc(1 + n_pins, sizeof(*ptp->pin_attr), GFP_KERNEL); |
653104d1 RC |
454 | if (!ptp->pin_attr) |
455 | goto no_pin_attr; | |
456 | ||
457 | for (i = 0; i < n_pins; i++) { | |
458 | struct device_attribute *da = &ptp->pin_dev_attr[i]; | |
459 | sysfs_attr_init(&da->attr); | |
460 | da->attr.name = info->pin_config[i].name; | |
461 | da->attr.mode = 0644; | |
462 | da->show = ptp_pin_show; | |
463 | da->store = ptp_pin_store; | |
464 | ptp->pin_attr[i] = &da->attr; | |
465 | } | |
466 | ||
467 | ptp->pin_attr_group.name = "pins"; | |
468 | ptp->pin_attr_group.attrs = ptp->pin_attr; | |
469 | ||
85a66e55 DT |
470 | ptp->pin_attr_groups[0] = &ptp->pin_attr_group; |
471 | ||
653104d1 RC |
472 | return 0; |
473 | ||
653104d1 RC |
474 | no_pin_attr: |
475 | kfree(ptp->pin_dev_attr); | |
476 | no_dev_attr: | |
477 | return err; | |
478 | } | |
479 | ||
85a66e55 | 480 | void ptp_cleanup_pin_groups(struct ptp_clock *ptp) |
d94ba80e | 481 | { |
85a66e55 DT |
482 | kfree(ptp->pin_attr); |
483 | kfree(ptp->pin_dev_attr); | |
d94ba80e | 484 | } |