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1ddfecaf ML |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * PTP hardware clock driver for the FemtoClock3 family of timing and | |
4 | * synchronization devices. | |
5 | * | |
6 | * Copyright (C) 2023 Integrated Device Technology, Inc., a Renesas Company. | |
7 | */ | |
8 | #ifndef PTP_IDTFC3_H | |
9 | #define PTP_IDTFC3_H | |
10 | ||
11 | #include <linux/ktime.h> | |
12 | #include <linux/ptp_clock.h> | |
13 | #include <linux/regmap.h> | |
14 | ||
15 | #define FW_FILENAME "idtfc3.bin" | |
16 | ||
17 | #define MAX_FFO_PPB (244000) | |
18 | #define TDC_GET_PERIOD (10) | |
19 | ||
20 | struct idtfc3 { | |
21 | struct ptp_clock_info caps; | |
22 | struct ptp_clock *ptp_clock; | |
23 | struct device *dev; | |
24 | /* Mutex to protect operations from being interrupted */ | |
25 | struct mutex *lock; | |
26 | struct device *mfd; | |
27 | struct regmap *regmap; | |
28 | struct idtfc3_hw_param hw_param; | |
29 | u32 sub_sync_count; | |
30 | u32 ns_per_sync; | |
31 | int tdc_offset_sign; | |
32 | u64 tdc_apll_freq; | |
33 | u32 time_ref_freq; | |
34 | u16 fod_n; | |
35 | u8 lpf_mode; | |
36 | /* Time counter */ | |
37 | u32 last_counter; | |
38 | s64 ns; | |
39 | u32 ns_per_counter; | |
40 | u32 tc_update_period; | |
41 | u32 tc_write_timeout; | |
42 | s64 tod_write_overhead; | |
43 | }; | |
44 | ||
45 | #endif /* PTP_IDTFC3_H */ |