Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d94ba80e RC |
2 | /* |
3 | * PTP 1588 clock support | |
4 | * | |
5 | * Copyright (C) 2010 OMICRON electronics GmbH | |
d94ba80e | 6 | */ |
7356a764 | 7 | #include <linux/idr.h> |
d94ba80e RC |
8 | #include <linux/device.h> |
9 | #include <linux/err.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/posix-clock.h> | |
14 | #include <linux/pps_kernel.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/syscalls.h> | |
17 | #include <linux/uaccess.h> | |
403376dd | 18 | #include <linux/debugfs.h> |
d9535cb7 | 19 | #include <uapi/linux/sched/types.h> |
d94ba80e RC |
20 | |
21 | #include "ptp_private.h" | |
22 | ||
23 | #define PTP_MAX_ALARMS 4 | |
d94ba80e RC |
24 | #define PTP_PPS_DEFAULTS (PPS_CAPTUREASSERT | PPS_OFFSETASSERT) |
25 | #define PTP_PPS_EVENT PPS_CAPTUREASSERT | |
26 | #define PTP_PPS_MODE (PTP_PPS_DEFAULTS | PPS_CANWAIT | PPS_TSFMT_TSPEC) | |
27 | ||
acb288e8 YL |
28 | struct class *ptp_class; |
29 | ||
d94ba80e RC |
30 | /* private globals */ |
31 | ||
32 | static dev_t ptp_devt; | |
d94ba80e | 33 | |
7356a764 | 34 | static DEFINE_IDA(ptp_clocks_map); |
d94ba80e RC |
35 | |
36 | /* time stamp event queue operations */ | |
37 | ||
38 | static inline int queue_free(struct timestamp_event_queue *q) | |
39 | { | |
40 | return PTP_MAX_TIMESTAMPS - queue_cnt(q) - 1; | |
41 | } | |
42 | ||
43 | static void enqueue_external_timestamp(struct timestamp_event_queue *queue, | |
44 | struct ptp_clock_event *src) | |
45 | { | |
46 | struct ptp_extts_event *dst; | |
47 | unsigned long flags; | |
48 | s64 seconds; | |
49 | u32 remainder; | |
50 | ||
51 | seconds = div_u64_rem(src->timestamp, 1000000000, &remainder); | |
52 | ||
53 | spin_lock_irqsave(&queue->lock, flags); | |
54 | ||
55 | dst = &queue->buf[queue->tail]; | |
56 | dst->index = src->index; | |
57 | dst->t.sec = seconds; | |
58 | dst->t.nsec = remainder; | |
59 | ||
73bde5a3 | 60 | /* Both WRITE_ONCE() are paired with READ_ONCE() in queue_cnt() */ |
d94ba80e | 61 | if (!queue_free(queue)) |
73bde5a3 | 62 | WRITE_ONCE(queue->head, (queue->head + 1) % PTP_MAX_TIMESTAMPS); |
d94ba80e | 63 | |
73bde5a3 | 64 | WRITE_ONCE(queue->tail, (queue->tail + 1) % PTP_MAX_TIMESTAMPS); |
d94ba80e RC |
65 | |
66 | spin_unlock_irqrestore(&queue->lock, flags); | |
67 | } | |
68 | ||
d94ba80e RC |
69 | /* posix clock implementation */ |
70 | ||
d340266e | 71 | static int ptp_clock_getres(struct posix_clock *pc, struct timespec64 *tp) |
d94ba80e | 72 | { |
d68fb11c TG |
73 | tp->tv_sec = 0; |
74 | tp->tv_nsec = 1; | |
75 | return 0; | |
d94ba80e RC |
76 | } |
77 | ||
d340266e | 78 | static int ptp_clock_settime(struct posix_clock *pc, const struct timespec64 *tp) |
d94ba80e RC |
79 | { |
80 | struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); | |
d7d38f5b | 81 | |
42704b26 GE |
82 | if (ptp_clock_freerun(ptp)) { |
83 | pr_err("ptp: physical clock is free running\n"); | |
73f37068 YL |
84 | return -EBUSY; |
85 | } | |
86 | ||
d340266e | 87 | return ptp->info->settime64(ptp->info, tp); |
d94ba80e RC |
88 | } |
89 | ||
d340266e | 90 | static int ptp_clock_gettime(struct posix_clock *pc, struct timespec64 *tp) |
d94ba80e RC |
91 | { |
92 | struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); | |
d7d38f5b RC |
93 | int err; |
94 | ||
916444df ML |
95 | if (ptp->info->gettimex64) |
96 | err = ptp->info->gettimex64(ptp->info, tp, NULL); | |
97 | else | |
98 | err = ptp->info->gettime64(ptp->info, tp); | |
d7d38f5b | 99 | return err; |
d94ba80e RC |
100 | } |
101 | ||
ead25417 | 102 | static int ptp_clock_adjtime(struct posix_clock *pc, struct __kernel_timex *tx) |
d94ba80e RC |
103 | { |
104 | struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); | |
105 | struct ptp_clock_info *ops; | |
106 | int err = -EOPNOTSUPP; | |
107 | ||
42704b26 GE |
108 | if (ptp_clock_freerun(ptp)) { |
109 | pr_err("ptp: physical clock is free running\n"); | |
73f37068 YL |
110 | return -EBUSY; |
111 | } | |
112 | ||
d94ba80e RC |
113 | ops = ptp->info; |
114 | ||
115 | if (tx->modes & ADJ_SETOFFSET) { | |
d340266e | 116 | struct timespec64 ts; |
d94ba80e RC |
117 | ktime_t kt; |
118 | s64 delta; | |
119 | ||
120 | ts.tv_sec = tx->time.tv_sec; | |
121 | ts.tv_nsec = tx->time.tv_usec; | |
122 | ||
123 | if (!(tx->modes & ADJ_NANO)) | |
124 | ts.tv_nsec *= 1000; | |
125 | ||
126 | if ((unsigned long) ts.tv_nsec >= NSEC_PER_SEC) | |
127 | return -EINVAL; | |
128 | ||
d340266e | 129 | kt = timespec64_to_ktime(ts); |
d94ba80e RC |
130 | delta = ktime_to_ns(kt); |
131 | err = ops->adjtime(ops, delta); | |
d94ba80e | 132 | } else if (tx->modes & ADJ_FREQUENCY) { |
475b92f9 | 133 | long ppb = scaled_ppm_to_ppb(tx->freq); |
d39a7435 RC |
134 | if (ppb > ops->max_adj || ppb < -ops->max_adj) |
135 | return -ERANGE; | |
75ab70ec | 136 | err = ops->adjfine(ops, tx->freq); |
39a8cbd9 | 137 | ptp->dialed_frequency = tx->freq; |
184ecc9e | 138 | } else if (tx->modes & ADJ_OFFSET) { |
eabd5c9d | 139 | if (ops->adjphase) { |
c3b60ab7 | 140 | s32 max_phase_adj = ops->getmaxphase(ops); |
eabd5c9d RC |
141 | s32 offset = tx->offset; |
142 | ||
143 | if (!(tx->modes & ADJ_NANO)) | |
144 | offset *= NSEC_PER_USEC; | |
145 | ||
c3b60ab7 RR |
146 | if (offset > max_phase_adj || offset < -max_phase_adj) |
147 | return -ERANGE; | |
148 | ||
eabd5c9d RC |
149 | err = ops->adjphase(ops, offset); |
150 | } | |
5c35bad5 RC |
151 | } else if (tx->modes == 0) { |
152 | tx->freq = ptp->dialed_frequency; | |
153 | err = 0; | |
d94ba80e RC |
154 | } |
155 | ||
156 | return err; | |
157 | } | |
158 | ||
159 | static struct posix_clock_operations ptp_clock_ops = { | |
160 | .owner = THIS_MODULE, | |
161 | .clock_adjtime = ptp_clock_adjtime, | |
162 | .clock_gettime = ptp_clock_gettime, | |
163 | .clock_getres = ptp_clock_getres, | |
164 | .clock_settime = ptp_clock_settime, | |
165 | .ioctl = ptp_ioctl, | |
166 | .open = ptp_open, | |
8f5de6fb | 167 | .release = ptp_release, |
d94ba80e RC |
168 | .poll = ptp_poll, |
169 | .read = ptp_read, | |
170 | }; | |
171 | ||
a33121e5 | 172 | static void ptp_clock_release(struct device *dev) |
d94ba80e | 173 | { |
a33121e5 | 174 | struct ptp_clock *ptp = container_of(dev, struct ptp_clock, dev); |
d26ab5a3 XM |
175 | struct timestamp_event_queue *tsevq; |
176 | unsigned long flags; | |
d94ba80e | 177 | |
75718584 | 178 | ptp_cleanup_pin_groups(ptp); |
b6b19a71 | 179 | kfree(ptp->vclock_index); |
6092315d | 180 | mutex_destroy(&ptp->pincfg_mux); |
73f37068 | 181 | mutex_destroy(&ptp->n_vclocks_mux); |
d26ab5a3 | 182 | /* Delete first entry */ |
1bea2c3e | 183 | spin_lock_irqsave(&ptp->tsevqs_lock, flags); |
d26ab5a3 XM |
184 | tsevq = list_first_entry(&ptp->tsevqs, struct timestamp_event_queue, |
185 | qlist); | |
d26ab5a3 | 186 | list_del(&tsevq->qlist); |
1bea2c3e | 187 | spin_unlock_irqrestore(&ptp->tsevqs_lock, flags); |
c5a445b1 | 188 | bitmap_free(tsevq->mask); |
d26ab5a3 | 189 | kfree(tsevq); |
403376dd | 190 | debugfs_remove(ptp->debugfs_root); |
ab7ea1e7 | 191 | ida_free(&ptp_clocks_map, ptp->index); |
d94ba80e RC |
192 | kfree(ptp); |
193 | } | |
194 | ||
42704b26 GE |
195 | static int ptp_getcycles64(struct ptp_clock_info *info, struct timespec64 *ts) |
196 | { | |
197 | if (info->getcyclesx64) | |
198 | return info->getcyclesx64(info, ts, NULL); | |
199 | else | |
200 | return info->gettime64(info, ts); | |
201 | } | |
202 | ||
d9535cb7 GS |
203 | static void ptp_aux_kworker(struct kthread_work *work) |
204 | { | |
205 | struct ptp_clock *ptp = container_of(work, struct ptp_clock, | |
206 | aux_work.work); | |
207 | struct ptp_clock_info *info = ptp->info; | |
208 | long delay; | |
209 | ||
210 | delay = info->do_aux_work(info); | |
211 | ||
212 | if (delay >= 0) | |
213 | kthread_queue_delayed_work(ptp->kworker, &ptp->aux_work, delay); | |
214 | } | |
215 | ||
d94ba80e RC |
216 | /* public interface */ |
217 | ||
1ef76158 RC |
218 | struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, |
219 | struct device *parent) | |
d94ba80e RC |
220 | { |
221 | struct ptp_clock *ptp; | |
d26ab5a3 | 222 | struct timestamp_event_queue *queue = NULL; |
d94ba80e | 223 | int err = 0, index, major = MAJOR(ptp_devt); |
75a384ce | 224 | char debugfsname[16]; |
44c494c8 | 225 | size_t size; |
d94ba80e RC |
226 | |
227 | if (info->n_alarm > PTP_MAX_ALARMS) | |
228 | return ERR_PTR(-EINVAL); | |
229 | ||
d94ba80e RC |
230 | /* Initialize a clock structure. */ |
231 | err = -ENOMEM; | |
232 | ptp = kzalloc(sizeof(struct ptp_clock), GFP_KERNEL); | |
233 | if (ptp == NULL) | |
234 | goto no_memory; | |
235 | ||
ab7ea1e7 | 236 | index = ida_alloc_max(&ptp_clocks_map, MINORMASK, GFP_KERNEL); |
7356a764 JB |
237 | if (index < 0) { |
238 | err = index; | |
239 | goto no_slot; | |
240 | } | |
241 | ||
d94ba80e | 242 | ptp->clock.ops = ptp_clock_ops; |
d94ba80e RC |
243 | ptp->info = info; |
244 | ptp->devid = MKDEV(major, index); | |
245 | ptp->index = index; | |
d26ab5a3 XM |
246 | INIT_LIST_HEAD(&ptp->tsevqs); |
247 | queue = kzalloc(sizeof(*queue), GFP_KERNEL); | |
248 | if (!queue) | |
249 | goto no_memory_queue; | |
d26ab5a3 | 250 | list_add_tail(&queue->qlist, &ptp->tsevqs); |
1bea2c3e | 251 | spin_lock_init(&ptp->tsevqs_lock); |
c5a445b1 XM |
252 | queue->mask = bitmap_alloc(PTP_MAX_CHANNELS, GFP_KERNEL); |
253 | if (!queue->mask) | |
254 | goto no_memory_bitmap; | |
255 | bitmap_set(queue->mask, 0, PTP_MAX_CHANNELS); | |
8f5de6fb | 256 | spin_lock_init(&queue->lock); |
6092315d | 257 | mutex_init(&ptp->pincfg_mux); |
73f37068 | 258 | mutex_init(&ptp->n_vclocks_mux); |
d94ba80e RC |
259 | init_waitqueue_head(&ptp->tsev_wq); |
260 | ||
42704b26 GE |
261 | if (ptp->info->getcycles64 || ptp->info->getcyclesx64) { |
262 | ptp->has_cycles = true; | |
263 | if (!ptp->info->getcycles64 && ptp->info->getcyclesx64) | |
264 | ptp->info->getcycles64 = ptp_getcycles64; | |
265 | } else { | |
266 | /* Free running cycle counter not supported, use time. */ | |
267 | ptp->info->getcycles64 = ptp_getcycles64; | |
268 | ||
269 | if (ptp->info->gettimex64) | |
270 | ptp->info->getcyclesx64 = ptp->info->gettimex64; | |
271 | ||
272 | if (ptp->info->getcrosststamp) | |
273 | ptp->info->getcrosscycles = ptp->info->getcrosststamp; | |
274 | } | |
275 | ||
d9535cb7 | 276 | if (ptp->info->do_aux_work) { |
d9535cb7 | 277 | kthread_init_delayed_work(&ptp->aux_work, ptp_aux_kworker); |
822c5f73 | 278 | ptp->kworker = kthread_create_worker(0, "ptp%d", ptp->index); |
d9535cb7 GS |
279 | if (IS_ERR(ptp->kworker)) { |
280 | err = PTR_ERR(ptp->kworker); | |
281 | pr_err("failed to create ptp aux_worker %d\n", err); | |
282 | goto kworker_err; | |
283 | } | |
284 | } | |
285 | ||
73f37068 | 286 | /* PTP virtual clock is being registered under physical clock */ |
55eac206 | 287 | if (parent && parent->class && parent->class->name && |
73f37068 YL |
288 | strcmp(parent->class->name, "ptp") == 0) |
289 | ptp->is_virtual_clock = true; | |
290 | ||
44c494c8 | 291 | if (!ptp->is_virtual_clock) { |
73f37068 YL |
292 | ptp->max_vclocks = PTP_DEFAULT_MAX_VCLOCKS; |
293 | ||
44c494c8 YL |
294 | size = sizeof(int) * ptp->max_vclocks; |
295 | ptp->vclock_index = kzalloc(size, GFP_KERNEL); | |
296 | if (!ptp->vclock_index) { | |
297 | err = -ENOMEM; | |
298 | goto no_mem_for_vclocks; | |
299 | } | |
300 | } | |
301 | ||
85a66e55 DT |
302 | err = ptp_populate_pin_groups(ptp); |
303 | if (err) | |
304 | goto no_pin_groups; | |
305 | ||
d94ba80e RC |
306 | /* Register a new PPS source. */ |
307 | if (info->pps) { | |
308 | struct pps_source_info pps; | |
309 | memset(&pps, 0, sizeof(pps)); | |
310 | snprintf(pps.name, PPS_MAX_NAME_LEN, "ptp%d", index); | |
311 | pps.mode = PTP_PPS_MODE; | |
312 | pps.owner = info->owner; | |
313 | ptp->pps_source = pps_register_source(&pps, PTP_PPS_DEFAULTS); | |
b9d93594 DC |
314 | if (IS_ERR(ptp->pps_source)) { |
315 | err = PTR_ERR(ptp->pps_source); | |
d94ba80e RC |
316 | pr_err("failed to register pps source\n"); |
317 | goto no_pps; | |
318 | } | |
debdd8e3 | 319 | ptp->pps_source->lookup_cookie = ptp; |
d94ba80e RC |
320 | } |
321 | ||
a33121e5 VD |
322 | /* Initialize a new device of our class in our clock structure. */ |
323 | device_initialize(&ptp->dev); | |
324 | ptp->dev.devt = ptp->devid; | |
325 | ptp->dev.class = ptp_class; | |
326 | ptp->dev.parent = parent; | |
327 | ptp->dev.groups = ptp->pin_attr_groups; | |
328 | ptp->dev.release = ptp_clock_release; | |
329 | dev_set_drvdata(&ptp->dev, ptp); | |
330 | dev_set_name(&ptp->dev, "ptp%d", ptp->index); | |
331 | ||
332 | /* Create a posix clock and link it to the device. */ | |
333 | err = posix_clock_register(&ptp->clock, &ptp->dev); | |
d94ba80e | 334 | if (err) { |
11195bf5 CL |
335 | if (ptp->pps_source) |
336 | pps_unregister_source(ptp->pps_source); | |
4225fea1 | 337 | |
4225fea1 | 338 | if (ptp->kworker) |
11195bf5 | 339 | kthread_destroy_worker(ptp->kworker); |
4225fea1 YY |
340 | |
341 | put_device(&ptp->dev); | |
342 | ||
d94ba80e | 343 | pr_err("failed to create posix clock\n"); |
4225fea1 | 344 | return ERR_PTR(err); |
d94ba80e RC |
345 | } |
346 | ||
403376dd | 347 | /* Debugfs initialization */ |
75a384ce | 348 | snprintf(debugfsname, sizeof(debugfsname), "ptp%d", ptp->index); |
403376dd XM |
349 | ptp->debugfs_root = debugfs_create_dir(debugfsname, NULL); |
350 | ||
d94ba80e RC |
351 | return ptp; |
352 | ||
d94ba80e | 353 | no_pps: |
85a66e55 DT |
354 | ptp_cleanup_pin_groups(ptp); |
355 | no_pin_groups: | |
44c494c8 YL |
356 | kfree(ptp->vclock_index); |
357 | no_mem_for_vclocks: | |
d9535cb7 GS |
358 | if (ptp->kworker) |
359 | kthread_destroy_worker(ptp->kworker); | |
360 | kworker_err: | |
6092315d | 361 | mutex_destroy(&ptp->pincfg_mux); |
73f37068 | 362 | mutex_destroy(&ptp->n_vclocks_mux); |
c5a445b1 XM |
363 | bitmap_free(queue->mask); |
364 | no_memory_bitmap: | |
d26ab5a3 XM |
365 | list_del(&queue->qlist); |
366 | kfree(queue); | |
367 | no_memory_queue: | |
ab7ea1e7 | 368 | ida_free(&ptp_clocks_map, index); |
7356a764 | 369 | no_slot: |
d94ba80e RC |
370 | kfree(ptp); |
371 | no_memory: | |
d94ba80e RC |
372 | return ERR_PTR(err); |
373 | } | |
374 | EXPORT_SYMBOL(ptp_clock_register); | |
375 | ||
bfcbb76b ML |
376 | static int unregister_vclock(struct device *dev, void *data) |
377 | { | |
378 | struct ptp_clock *ptp = dev_get_drvdata(dev); | |
379 | ||
380 | ptp_vclock_unregister(info_to_vclock(ptp->info)); | |
381 | return 0; | |
382 | } | |
383 | ||
d94ba80e RC |
384 | int ptp_clock_unregister(struct ptp_clock *ptp) |
385 | { | |
73f37068 | 386 | if (ptp_vclock_in_use(ptp)) { |
bfcbb76b | 387 | device_for_each_child(&ptp->dev, NULL, unregister_vclock); |
73f37068 YL |
388 | } |
389 | ||
d94ba80e RC |
390 | ptp->defunct = 1; |
391 | wake_up_interruptible(&ptp->tsev_wq); | |
392 | ||
d9535cb7 GS |
393 | if (ptp->kworker) { |
394 | kthread_cancel_delayed_work_sync(&ptp->aux_work); | |
395 | kthread_destroy_worker(ptp->kworker); | |
396 | } | |
397 | ||
d94ba80e RC |
398 | /* Release the clock's resources. */ |
399 | if (ptp->pps_source) | |
400 | pps_unregister_source(ptp->pps_source); | |
85a66e55 | 401 | |
d94ba80e | 402 | posix_clock_unregister(&ptp->clock); |
75718584 | 403 | |
d94ba80e RC |
404 | return 0; |
405 | } | |
406 | EXPORT_SYMBOL(ptp_clock_unregister); | |
407 | ||
408 | void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event) | |
409 | { | |
d26ab5a3 | 410 | struct timestamp_event_queue *tsevq; |
d94ba80e | 411 | struct pps_event_time evt; |
1bea2c3e | 412 | unsigned long flags; |
d94ba80e RC |
413 | |
414 | switch (event->type) { | |
415 | ||
416 | case PTP_CLOCK_ALARM: | |
417 | break; | |
418 | ||
419 | case PTP_CLOCK_EXTTS: | |
c5a445b1 | 420 | /* Enqueue timestamp on selected queues */ |
1bea2c3e | 421 | spin_lock_irqsave(&ptp->tsevqs_lock, flags); |
d26ab5a3 | 422 | list_for_each_entry(tsevq, &ptp->tsevqs, qlist) { |
c5a445b1 XM |
423 | if (test_bit((unsigned int)event->index, tsevq->mask)) |
424 | enqueue_external_timestamp(tsevq, event); | |
d26ab5a3 | 425 | } |
1bea2c3e | 426 | spin_unlock_irqrestore(&ptp->tsevqs_lock, flags); |
d94ba80e RC |
427 | wake_up_interruptible(&ptp->tsev_wq); |
428 | break; | |
429 | ||
430 | case PTP_CLOCK_PPS: | |
431 | pps_get_ts(&evt); | |
432 | pps_event(ptp->pps_source, &evt, PTP_PPS_EVENT, NULL); | |
433 | break; | |
220a60a4 BH |
434 | |
435 | case PTP_CLOCK_PPSUSR: | |
436 | pps_event(ptp->pps_source, &event->pps_times, | |
437 | PTP_PPS_EVENT, NULL); | |
438 | break; | |
d94ba80e RC |
439 | } |
440 | } | |
441 | EXPORT_SYMBOL(ptp_clock_event); | |
442 | ||
995a9090 RC |
443 | int ptp_clock_index(struct ptp_clock *ptp) |
444 | { | |
445 | return ptp->index; | |
446 | } | |
447 | EXPORT_SYMBOL(ptp_clock_index); | |
448 | ||
6092315d RC |
449 | int ptp_find_pin(struct ptp_clock *ptp, |
450 | enum ptp_pin_function func, unsigned int chan) | |
451 | { | |
452 | struct ptp_pin_desc *pin = NULL; | |
453 | int i; | |
454 | ||
6092315d RC |
455 | for (i = 0; i < ptp->info->n_pins; i++) { |
456 | if (ptp->info->pin_config[i].func == func && | |
457 | ptp->info->pin_config[i].chan == chan) { | |
458 | pin = &ptp->info->pin_config[i]; | |
459 | break; | |
460 | } | |
461 | } | |
6092315d RC |
462 | |
463 | return pin ? i : -1; | |
464 | } | |
465 | EXPORT_SYMBOL(ptp_find_pin); | |
466 | ||
62582a7e RC |
467 | int ptp_find_pin_unlocked(struct ptp_clock *ptp, |
468 | enum ptp_pin_function func, unsigned int chan) | |
469 | { | |
470 | int result; | |
471 | ||
472 | mutex_lock(&ptp->pincfg_mux); | |
473 | ||
474 | result = ptp_find_pin(ptp, func, chan); | |
475 | ||
476 | mutex_unlock(&ptp->pincfg_mux); | |
477 | ||
478 | return result; | |
479 | } | |
480 | EXPORT_SYMBOL(ptp_find_pin_unlocked); | |
481 | ||
d9535cb7 GS |
482 | int ptp_schedule_worker(struct ptp_clock *ptp, unsigned long delay) |
483 | { | |
484 | return kthread_mod_delayed_work(ptp->kworker, &ptp->aux_work, delay); | |
485 | } | |
486 | EXPORT_SYMBOL(ptp_schedule_worker); | |
487 | ||
544fed47 VO |
488 | void ptp_cancel_worker_sync(struct ptp_clock *ptp) |
489 | { | |
490 | kthread_cancel_delayed_work_sync(&ptp->aux_work); | |
491 | } | |
492 | EXPORT_SYMBOL(ptp_cancel_worker_sync); | |
493 | ||
d94ba80e RC |
494 | /* module operations */ |
495 | ||
496 | static void __exit ptp_exit(void) | |
497 | { | |
498 | class_destroy(ptp_class); | |
7356a764 JB |
499 | unregister_chrdev_region(ptp_devt, MINORMASK + 1); |
500 | ida_destroy(&ptp_clocks_map); | |
d94ba80e RC |
501 | } |
502 | ||
503 | static int __init ptp_init(void) | |
504 | { | |
505 | int err; | |
506 | ||
1aaba11d | 507 | ptp_class = class_create("ptp"); |
d94ba80e RC |
508 | if (IS_ERR(ptp_class)) { |
509 | pr_err("ptp: failed to allocate class\n"); | |
510 | return PTR_ERR(ptp_class); | |
511 | } | |
512 | ||
7356a764 | 513 | err = alloc_chrdev_region(&ptp_devt, 0, MINORMASK + 1, "ptp"); |
d94ba80e RC |
514 | if (err < 0) { |
515 | pr_err("ptp: failed to allocate device region\n"); | |
516 | goto no_region; | |
517 | } | |
518 | ||
3499116b | 519 | ptp_class->dev_groups = ptp_groups; |
d94ba80e RC |
520 | pr_info("PTP clock support registered\n"); |
521 | return 0; | |
522 | ||
523 | no_region: | |
524 | class_destroy(ptp_class); | |
525 | return err; | |
526 | } | |
527 | ||
528 | subsys_initcall(ptp_init); | |
529 | module_exit(ptp_exit); | |
530 | ||
c2ec3ff6 | 531 | MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); |
d94ba80e RC |
532 | MODULE_DESCRIPTION("PTP clocks support"); |
533 | MODULE_LICENSE("GPL"); |