platform:x86: Add Intel telemetry platform driver
[linux-2.6-block.git] / drivers / platform / x86 / intel_pmc_ipc.c
CommitLineData
0a8b8353 1/*
2 * intel_pmc_ipc.c: Driver for the Intel PMC IPC mechanism
3 *
4 * (C) Copyright 2014-2015 Intel Corporation
5 *
6 * This driver is based on Intel SCU IPC driver(intel_scu_opc.c) by
7 * Sreedhara DS <sreedhara.ds@intel.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 *
14 * PMC running in ARC processor communicates with other entity running in IA
15 * core through IPC mechanism which in turn messaging between IA core ad PMC.
16 */
17
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/device.h>
23#include <linux/pm.h>
24#include <linux/pci.h>
25#include <linux/platform_device.h>
26#include <linux/interrupt.h>
27#include <linux/pm_qos.h>
28#include <linux/kernel.h>
29#include <linux/bitops.h>
30#include <linux/sched.h>
31#include <linux/atomic.h>
32#include <linux/notifier.h>
33#include <linux/suspend.h>
34#include <linux/acpi.h>
35#include <asm/intel_pmc_ipc.h>
420b54de 36#include <linux/platform_data/itco_wdt.h>
0a8b8353 37
38/*
39 * IPC registers
40 * The IA write to IPC_CMD command register triggers an interrupt to the ARC,
41 * The ARC handles the interrupt and services it, writing optional data to
42 * the IPC1 registers, updates the IPC_STS response register with the status.
43 */
44#define IPC_CMD 0x0
45#define IPC_CMD_MSI 0x100
46#define IPC_CMD_SIZE 16
47#define IPC_CMD_SUBCMD 12
48#define IPC_STATUS 0x04
49#define IPC_STATUS_IRQ 0x4
50#define IPC_STATUS_ERR 0x2
51#define IPC_STATUS_BUSY 0x1
52#define IPC_SPTR 0x08
53#define IPC_DPTR 0x0C
54#define IPC_WRITE_BUFFER 0x80
55#define IPC_READ_BUFFER 0x90
56
57/*
58 * 16-byte buffer for sending data associated with IPC command.
59 */
60#define IPC_DATA_BUFFER_SIZE 16
61
62#define IPC_LOOP_CNT 3000000
63#define IPC_MAX_SEC 3
64
65#define IPC_TRIGGER_MODE_IRQ true
66
67/* exported resources from IFWI */
68#define PLAT_RESOURCE_IPC_INDEX 0
69#define PLAT_RESOURCE_IPC_SIZE 0x1000
70#define PLAT_RESOURCE_GCR_SIZE 0x1000
8cc7fb4a
QZ
71#define PLAT_RESOURCE_BIOS_DATA_INDEX 1
72#define PLAT_RESOURCE_BIOS_IFACE_INDEX 2
73#define PLAT_RESOURCE_ISP_DATA_INDEX 4
74#define PLAT_RESOURCE_ISP_IFACE_INDEX 5
75#define PLAT_RESOURCE_GTD_DATA_INDEX 6
76#define PLAT_RESOURCE_GTD_IFACE_INDEX 7
0a8b8353 77#define PLAT_RESOURCE_ACPI_IO_INDEX 0
78
79/*
80 * BIOS does not create an ACPI device for each PMC function,
81 * but exports multiple resources from one ACPI device(IPC) for
82 * multiple functions. This driver is responsible to create a
83 * platform device and to export resources for those functions.
84 */
85#define TCO_DEVICE_NAME "iTCO_wdt"
86#define SMI_EN_OFFSET 0x30
87#define SMI_EN_SIZE 4
88#define TCO_BASE_OFFSET 0x60
89#define TCO_REGS_SIZE 16
90#define PUNIT_DEVICE_NAME "intel_punit_ipc"
91
92static const int iTCO_version = 3;
93
94static struct intel_pmc_ipc_dev {
95 struct device *dev;
96 void __iomem *ipc_base;
97 bool irq_mode;
98 int irq;
99 int cmd;
100 struct completion cmd_complete;
101
102 /* The following PMC BARs share the same ACPI device with the IPC */
b78fb51b 103 resource_size_t acpi_io_base;
0a8b8353 104 int acpi_io_size;
105 struct platform_device *tco_dev;
106
107 /* gcr */
b78fb51b 108 resource_size_t gcr_base;
0a8b8353 109 int gcr_size;
110
111 /* punit */
0a8b8353 112 struct platform_device *punit_dev;
113} ipcdev;
114
115static char *ipc_err_sources[] = {
116 [IPC_ERR_NONE] =
117 "no error",
118 [IPC_ERR_CMD_NOT_SUPPORTED] =
119 "command not supported",
120 [IPC_ERR_CMD_NOT_SERVICED] =
121 "command not serviced",
122 [IPC_ERR_UNABLE_TO_SERVICE] =
123 "unable to service",
124 [IPC_ERR_CMD_INVALID] =
125 "command invalid",
126 [IPC_ERR_CMD_FAILED] =
127 "command failed",
128 [IPC_ERR_EMSECURITY] =
129 "Invalid Battery",
130 [IPC_ERR_UNSIGNEDKERNEL] =
131 "Unsigned kernel",
132};
133
134/* Prevent concurrent calls to the PMC */
135static DEFINE_MUTEX(ipclock);
136
137static inline void ipc_send_command(u32 cmd)
138{
139 ipcdev.cmd = cmd;
140 if (ipcdev.irq_mode) {
141 reinit_completion(&ipcdev.cmd_complete);
142 cmd |= IPC_CMD_MSI;
143 }
144 writel(cmd, ipcdev.ipc_base + IPC_CMD);
145}
146
147static inline u32 ipc_read_status(void)
148{
149 return readl(ipcdev.ipc_base + IPC_STATUS);
150}
151
152static inline void ipc_data_writel(u32 data, u32 offset)
153{
154 writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);
155}
156
157static inline u8 ipc_data_readb(u32 offset)
158{
159 return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
160}
161
162static inline u32 ipc_data_readl(u32 offset)
163{
164 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
165}
166
167static int intel_pmc_ipc_check_status(void)
168{
169 int status;
170 int ret = 0;
171
172 if (ipcdev.irq_mode) {
173 if (0 == wait_for_completion_timeout(
174 &ipcdev.cmd_complete, IPC_MAX_SEC * HZ))
175 ret = -ETIMEDOUT;
176 } else {
177 int loop_count = IPC_LOOP_CNT;
178
179 while ((ipc_read_status() & IPC_STATUS_BUSY) && --loop_count)
180 udelay(1);
181 if (loop_count == 0)
182 ret = -ETIMEDOUT;
183 }
184
185 status = ipc_read_status();
186 if (ret == -ETIMEDOUT) {
187 dev_err(ipcdev.dev,
188 "IPC timed out, TS=0x%x, CMD=0x%x\n",
189 status, ipcdev.cmd);
190 return ret;
191 }
192
193 if (status & IPC_STATUS_ERR) {
194 int i;
195
196 ret = -EIO;
197 i = (status >> IPC_CMD_SIZE) & 0xFF;
198 if (i < ARRAY_SIZE(ipc_err_sources))
199 dev_err(ipcdev.dev,
200 "IPC failed: %s, STS=0x%x, CMD=0x%x\n",
201 ipc_err_sources[i], status, ipcdev.cmd);
202 else
203 dev_err(ipcdev.dev,
204 "IPC failed: unknown, STS=0x%x, CMD=0x%x\n",
205 status, ipcdev.cmd);
206 if ((i == IPC_ERR_UNSIGNEDKERNEL) || (i == IPC_ERR_EMSECURITY))
207 ret = -EACCES;
208 }
209
210 return ret;
211}
212
02941007 213/**
214 * intel_pmc_ipc_simple_command() - Simple IPC command
215 * @cmd: IPC command code.
216 * @sub: IPC command sub type.
217 *
218 * Send a simple IPC command to PMC when don't need to specify
219 * input/output data and source/dest pointers.
220 *
221 * Return: an IPC error code or 0 on success.
0a8b8353 222 */
223int intel_pmc_ipc_simple_command(int cmd, int sub)
224{
225 int ret;
226
227 mutex_lock(&ipclock);
228 if (ipcdev.dev == NULL) {
229 mutex_unlock(&ipclock);
230 return -ENODEV;
231 }
232 ipc_send_command(sub << IPC_CMD_SUBCMD | cmd);
233 ret = intel_pmc_ipc_check_status();
234 mutex_unlock(&ipclock);
235
236 return ret;
237}
238EXPORT_SYMBOL_GPL(intel_pmc_ipc_simple_command);
239
02941007 240/**
241 * intel_pmc_ipc_raw_cmd() - IPC command with data and pointers
242 * @cmd: IPC command code.
243 * @sub: IPC command sub type.
244 * @in: input data of this IPC command.
245 * @inlen: input data length in bytes.
246 * @out: output data of this IPC command.
247 * @outlen: output data length in dwords.
248 * @sptr: data writing to SPTR register.
249 * @dptr: data writing to DPTR register.
250 *
251 * Send an IPC command to PMC with input/output data and source/dest pointers.
252 *
253 * Return: an IPC error code or 0 on success.
0a8b8353 254 */
255int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out,
256 u32 outlen, u32 dptr, u32 sptr)
257{
258 u32 wbuf[4] = { 0 };
259 int ret;
260 int i;
261
262 if (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE / 4)
263 return -EINVAL;
264
265 mutex_lock(&ipclock);
266 if (ipcdev.dev == NULL) {
267 mutex_unlock(&ipclock);
268 return -ENODEV;
269 }
270 memcpy(wbuf, in, inlen);
271 writel(dptr, ipcdev.ipc_base + IPC_DPTR);
272 writel(sptr, ipcdev.ipc_base + IPC_SPTR);
273 /* The input data register is 32bit register and inlen is in Byte */
274 for (i = 0; i < ((inlen + 3) / 4); i++)
275 ipc_data_writel(wbuf[i], 4 * i);
276 ipc_send_command((inlen << IPC_CMD_SIZE) |
277 (sub << IPC_CMD_SUBCMD) | cmd);
278 ret = intel_pmc_ipc_check_status();
279 if (!ret) {
280 /* out is read from 32bit register and outlen is in 32bit */
281 for (i = 0; i < outlen; i++)
282 *out++ = ipc_data_readl(4 * i);
283 }
284 mutex_unlock(&ipclock);
285
286 return ret;
287}
288EXPORT_SYMBOL_GPL(intel_pmc_ipc_raw_cmd);
289
02941007 290/**
291 * intel_pmc_ipc_command() - IPC command with input/output data
292 * @cmd: IPC command code.
293 * @sub: IPC command sub type.
294 * @in: input data of this IPC command.
295 * @inlen: input data length in bytes.
296 * @out: output data of this IPC command.
297 * @outlen: output data length in dwords.
298 *
299 * Send an IPC command to PMC with input/output data.
300 *
301 * Return: an IPC error code or 0 on success.
0a8b8353 302 */
303int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
304 u32 *out, u32 outlen)
305{
306 return intel_pmc_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0);
307}
308EXPORT_SYMBOL_GPL(intel_pmc_ipc_command);
309
310static irqreturn_t ioc(int irq, void *dev_id)
311{
312 int status;
313
314 if (ipcdev.irq_mode) {
315 status = ipc_read_status();
316 writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);
317 }
318 complete(&ipcdev.cmd_complete);
319
320 return IRQ_HANDLED;
321}
322
323static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
324{
325 resource_size_t pci_resource;
326 int ret;
327 int len;
328
329 ipcdev.dev = &pci_dev_get(pdev)->dev;
330 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
331
332 ret = pci_enable_device(pdev);
333 if (ret)
334 return ret;
335
336 ret = pci_request_regions(pdev, "intel_pmc_ipc");
337 if (ret)
338 return ret;
339
340 pci_resource = pci_resource_start(pdev, 0);
341 len = pci_resource_len(pdev, 0);
342 if (!pci_resource || !len) {
343 dev_err(&pdev->dev, "Failed to get resource\n");
344 return -ENOMEM;
345 }
346
347 init_completion(&ipcdev.cmd_complete);
348
349 if (request_irq(pdev->irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
350 dev_err(&pdev->dev, "Failed to request irq\n");
351 return -EBUSY;
352 }
353
354 ipcdev.ipc_base = ioremap_nocache(pci_resource, len);
355 if (!ipcdev.ipc_base) {
356 dev_err(&pdev->dev, "Failed to ioremap ipc base\n");
357 free_irq(pdev->irq, &ipcdev);
358 ret = -ENOMEM;
359 }
360
361 return ret;
362}
363
364static void ipc_pci_remove(struct pci_dev *pdev)
365{
366 free_irq(pdev->irq, &ipcdev);
367 pci_release_regions(pdev);
368 pci_dev_put(pdev);
369 iounmap(ipcdev.ipc_base);
370 ipcdev.dev = NULL;
371}
372
373static const struct pci_device_id ipc_pci_ids[] = {
374 {PCI_VDEVICE(INTEL, 0x0a94), 0},
375 {PCI_VDEVICE(INTEL, 0x1a94), 0},
376 { 0,}
377};
378MODULE_DEVICE_TABLE(pci, ipc_pci_ids);
379
380static struct pci_driver ipc_pci_driver = {
381 .name = "intel_pmc_ipc",
382 .id_table = ipc_pci_ids,
383 .probe = ipc_pci_probe,
384 .remove = ipc_pci_remove,
385};
386
387static ssize_t intel_pmc_ipc_simple_cmd_store(struct device *dev,
388 struct device_attribute *attr,
389 const char *buf, size_t count)
390{
391 int subcmd;
392 int cmd;
393 int ret;
394
395 ret = sscanf(buf, "%d %d", &cmd, &subcmd);
396 if (ret != 2) {
397 dev_err(dev, "Error args\n");
398 return -EINVAL;
399 }
400
401 ret = intel_pmc_ipc_simple_command(cmd, subcmd);
402 if (ret) {
403 dev_err(dev, "command %d error with %d\n", cmd, ret);
404 return ret;
405 }
406 return (ssize_t)count;
407}
408
409static ssize_t intel_pmc_ipc_northpeak_store(struct device *dev,
410 struct device_attribute *attr,
411 const char *buf, size_t count)
412{
413 unsigned long val;
414 int subcmd;
415 int ret;
416
417 if (kstrtoul(buf, 0, &val))
418 return -EINVAL;
419
420 if (val)
421 subcmd = 1;
422 else
423 subcmd = 0;
424 ret = intel_pmc_ipc_simple_command(PMC_IPC_NORTHPEAK_CTRL, subcmd);
425 if (ret) {
426 dev_err(dev, "command north %d error with %d\n", subcmd, ret);
427 return ret;
428 }
429 return (ssize_t)count;
430}
431
432static DEVICE_ATTR(simplecmd, S_IWUSR,
433 NULL, intel_pmc_ipc_simple_cmd_store);
434static DEVICE_ATTR(northpeak, S_IWUSR,
435 NULL, intel_pmc_ipc_northpeak_store);
436
437static struct attribute *intel_ipc_attrs[] = {
438 &dev_attr_northpeak.attr,
439 &dev_attr_simplecmd.attr,
440 NULL
441};
442
443static const struct attribute_group intel_ipc_group = {
444 .attrs = intel_ipc_attrs,
445};
446
8cc7fb4a
QZ
447static struct resource punit_res_array[] = {
448 /* Punit BIOS */
449 {
450 .flags = IORESOURCE_MEM,
451 },
452 {
453 .flags = IORESOURCE_MEM,
454 },
455 /* Punit ISP */
456 {
457 .flags = IORESOURCE_MEM,
458 },
459 {
460 .flags = IORESOURCE_MEM,
461 },
462 /* Punit GTD */
0a8b8353 463 {
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .flags = IORESOURCE_MEM,
468 },
469};
470
471#define TCO_RESOURCE_ACPI_IO 0
472#define TCO_RESOURCE_SMI_EN_IO 1
473#define TCO_RESOURCE_GCR_MEM 2
474static struct resource tco_res[] = {
475 /* ACPI - TCO */
476 {
477 .flags = IORESOURCE_IO,
478 },
479 /* ACPI - SMI */
480 {
481 .flags = IORESOURCE_IO,
482 },
483 /* GCS */
484 {
485 .flags = IORESOURCE_MEM,
486 },
487};
488
420b54de 489static struct itco_wdt_platform_data tco_info = {
0a8b8353 490 .name = "Apollo Lake SoC",
420b54de 491 .version = 3,
0a8b8353 492};
493
494static int ipc_create_punit_device(void)
495{
496 struct platform_device *pdev;
0a8b8353 497 int ret;
498
499 pdev = platform_device_alloc(PUNIT_DEVICE_NAME, -1);
500 if (!pdev) {
501 dev_err(ipcdev.dev, "Failed to alloc punit platform device\n");
502 return -ENOMEM;
503 }
504
505 pdev->dev.parent = ipcdev.dev;
8cc7fb4a
QZ
506 ret = platform_device_add_resources(pdev, punit_res_array,
507 ARRAY_SIZE(punit_res_array));
0a8b8353 508 if (ret) {
509 dev_err(ipcdev.dev, "Failed to add platform punit resources\n");
510 goto err;
511 }
512
513 ret = platform_device_add(pdev);
514 if (ret) {
515 dev_err(ipcdev.dev, "Failed to add punit platform device\n");
516 goto err;
517 }
518 ipcdev.punit_dev = pdev;
519
520 return 0;
521err:
522 platform_device_put(pdev);
523 return ret;
524}
525
526static int ipc_create_tco_device(void)
527{
528 struct platform_device *pdev;
529 struct resource *res;
530 int ret;
531
532 pdev = platform_device_alloc(TCO_DEVICE_NAME, -1);
533 if (!pdev) {
534 dev_err(ipcdev.dev, "Failed to alloc tco platform device\n");
535 return -ENOMEM;
536 }
537
538 pdev->dev.parent = ipcdev.dev;
539
540 res = tco_res + TCO_RESOURCE_ACPI_IO;
b78fb51b 541 res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET;
0a8b8353 542 res->end = res->start + TCO_REGS_SIZE - 1;
543
544 res = tco_res + TCO_RESOURCE_SMI_EN_IO;
b78fb51b 545 res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET;
0a8b8353 546 res->end = res->start + SMI_EN_SIZE - 1;
547
548 res = tco_res + TCO_RESOURCE_GCR_MEM;
b78fb51b 549 res->start = ipcdev.gcr_base;
0a8b8353 550 res->end = res->start + ipcdev.gcr_size - 1;
551
552 ret = platform_device_add_resources(pdev, tco_res, ARRAY_SIZE(tco_res));
553 if (ret) {
554 dev_err(ipcdev.dev, "Failed to add tco platform resources\n");
555 goto err;
556 }
557
420b54de 558 ret = platform_device_add_data(pdev, &tco_info, sizeof(tco_info));
0a8b8353 559 if (ret) {
560 dev_err(ipcdev.dev, "Failed to add tco platform data\n");
561 goto err;
562 }
563
564 ret = platform_device_add(pdev);
565 if (ret) {
566 dev_err(ipcdev.dev, "Failed to add tco platform device\n");
567 goto err;
568 }
569 ipcdev.tco_dev = pdev;
570
571 return 0;
572err:
573 platform_device_put(pdev);
574 return ret;
575}
576
577static int ipc_create_pmc_devices(void)
578{
579 int ret;
580
581 ret = ipc_create_tco_device();
582 if (ret) {
583 dev_err(ipcdev.dev, "Failed to add tco platform device\n");
584 return ret;
585 }
586 ret = ipc_create_punit_device();
587 if (ret) {
588 dev_err(ipcdev.dev, "Failed to add punit platform device\n");
589 platform_device_unregister(ipcdev.tco_dev);
590 }
591 return ret;
592}
593
594static int ipc_plat_get_res(struct platform_device *pdev)
595{
8cc7fb4a 596 struct resource *res, *punit_res;
0a8b8353 597 void __iomem *addr;
598 int size;
599
600 res = platform_get_resource(pdev, IORESOURCE_IO,
601 PLAT_RESOURCE_ACPI_IO_INDEX);
602 if (!res) {
603 dev_err(&pdev->dev, "Failed to get io resource\n");
604 return -ENXIO;
605 }
606 size = resource_size(res);
b78fb51b 607 ipcdev.acpi_io_base = res->start;
0a8b8353 608 ipcdev.acpi_io_size = size;
8cc7fb4a 609 dev_info(&pdev->dev, "io res: %pR\n", res);
0a8b8353 610
8cc7fb4a
QZ
611 /* This is index 0 to cover BIOS data register */
612 punit_res = punit_res_array;
0a8b8353 613 res = platform_get_resource(pdev, IORESOURCE_MEM,
8cc7fb4a 614 PLAT_RESOURCE_BIOS_DATA_INDEX);
0a8b8353 615 if (!res) {
8cc7fb4a 616 dev_err(&pdev->dev, "Failed to get res of punit BIOS data\n");
0a8b8353 617 return -ENXIO;
618 }
8cc7fb4a
QZ
619 *punit_res = *res;
620 dev_info(&pdev->dev, "punit BIOS data res: %pR\n", res);
0a8b8353 621
622 res = platform_get_resource(pdev, IORESOURCE_MEM,
8cc7fb4a 623 PLAT_RESOURCE_BIOS_IFACE_INDEX);
0a8b8353 624 if (!res) {
8cc7fb4a 625 dev_err(&pdev->dev, "Failed to get res of punit BIOS iface\n");
0a8b8353 626 return -ENXIO;
627 }
8cc7fb4a
QZ
628 /* This is index 1 to cover BIOS interface register */
629 *++punit_res = *res;
630 dev_info(&pdev->dev, "punit BIOS interface res: %pR\n", res);
631
632 res = platform_get_resource(pdev, IORESOURCE_MEM,
633 PLAT_RESOURCE_ISP_DATA_INDEX);
634 if (!res) {
635 dev_err(&pdev->dev, "Failed to get res of punit ISP data\n");
636 return -ENXIO;
637 }
638 /* This is index 2 to cover ISP data register */
639 *++punit_res = *res;
640 dev_info(&pdev->dev, "punit ISP data res: %pR\n", res);
641
642 res = platform_get_resource(pdev, IORESOURCE_MEM,
643 PLAT_RESOURCE_ISP_IFACE_INDEX);
644 if (!res) {
645 dev_err(&pdev->dev, "Failed to get res of punit ISP iface\n");
646 return -ENXIO;
647 }
648 /* This is index 3 to cover ISP interface register */
649 *++punit_res = *res;
650 dev_info(&pdev->dev, "punit ISP interface res: %pR\n", res);
651
652 res = platform_get_resource(pdev, IORESOURCE_MEM,
653 PLAT_RESOURCE_GTD_DATA_INDEX);
654 if (!res) {
655 dev_err(&pdev->dev, "Failed to get res of punit GTD data\n");
656 return -ENXIO;
657 }
658 /* This is index 4 to cover GTD data register */
659 *++punit_res = *res;
660 dev_info(&pdev->dev, "punit GTD data res: %pR\n", res);
661
662 res = platform_get_resource(pdev, IORESOURCE_MEM,
663 PLAT_RESOURCE_GTD_IFACE_INDEX);
664 if (!res) {
665 dev_err(&pdev->dev, "Failed to get res of punit GTD iface\n");
666 return -ENXIO;
667 }
668 /* This is index 5 to cover GTD interface register */
669 *++punit_res = *res;
670 dev_info(&pdev->dev, "punit GTD interface res: %pR\n", res);
0a8b8353 671
672 res = platform_get_resource(pdev, IORESOURCE_MEM,
673 PLAT_RESOURCE_IPC_INDEX);
674 if (!res) {
675 dev_err(&pdev->dev, "Failed to get ipc resource\n");
676 return -ENXIO;
677 }
678 size = PLAT_RESOURCE_IPC_SIZE;
679 if (!request_mem_region(res->start, size, pdev->name)) {
680 dev_err(&pdev->dev, "Failed to request ipc resource\n");
681 return -EBUSY;
682 }
683 addr = ioremap_nocache(res->start, size);
684 if (!addr) {
685 dev_err(&pdev->dev, "I/O memory remapping failed\n");
686 release_mem_region(res->start, size);
687 return -ENOMEM;
688 }
689 ipcdev.ipc_base = addr;
690
b78fb51b 691 ipcdev.gcr_base = res->start + size;
0a8b8353 692 ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE;
8cc7fb4a 693 dev_info(&pdev->dev, "ipc res: %pR\n", res);
0a8b8353 694
695 return 0;
696}
697
698#ifdef CONFIG_ACPI
699static const struct acpi_device_id ipc_acpi_ids[] = {
700 { "INT34D2", 0},
701 { }
702};
703MODULE_DEVICE_TABLE(acpi, ipc_acpi_ids);
704#endif
705
706static int ipc_plat_probe(struct platform_device *pdev)
707{
708 struct resource *res;
709 int ret;
710
711 ipcdev.dev = &pdev->dev;
712 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
713 init_completion(&ipcdev.cmd_complete);
714
715 ipcdev.irq = platform_get_irq(pdev, 0);
716 if (ipcdev.irq < 0) {
717 dev_err(&pdev->dev, "Failed to get irq\n");
718 return -EINVAL;
719 }
720
721 ret = ipc_plat_get_res(pdev);
722 if (ret) {
723 dev_err(&pdev->dev, "Failed to request resource\n");
724 return ret;
725 }
726
727 ret = ipc_create_pmc_devices();
728 if (ret) {
729 dev_err(&pdev->dev, "Failed to create pmc devices\n");
730 goto err_device;
731 }
732
733 if (request_irq(ipcdev.irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
734 dev_err(&pdev->dev, "Failed to request irq\n");
735 ret = -EBUSY;
736 goto err_irq;
737 }
738
739 ret = sysfs_create_group(&pdev->dev.kobj, &intel_ipc_group);
740 if (ret) {
741 dev_err(&pdev->dev, "Failed to create sysfs group %d\n",
742 ret);
743 goto err_sys;
744 }
745
746 return 0;
747err_sys:
748 free_irq(ipcdev.irq, &ipcdev);
749err_irq:
750 platform_device_unregister(ipcdev.tco_dev);
751 platform_device_unregister(ipcdev.punit_dev);
752err_device:
753 iounmap(ipcdev.ipc_base);
754 res = platform_get_resource(pdev, IORESOURCE_MEM,
755 PLAT_RESOURCE_IPC_INDEX);
756 if (res)
757 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
758 return ret;
759}
760
761static int ipc_plat_remove(struct platform_device *pdev)
762{
763 struct resource *res;
764
765 sysfs_remove_group(&pdev->dev.kobj, &intel_ipc_group);
766 free_irq(ipcdev.irq, &ipcdev);
767 platform_device_unregister(ipcdev.tco_dev);
768 platform_device_unregister(ipcdev.punit_dev);
769 iounmap(ipcdev.ipc_base);
770 res = platform_get_resource(pdev, IORESOURCE_MEM,
771 PLAT_RESOURCE_IPC_INDEX);
772 if (res)
773 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
774 ipcdev.dev = NULL;
775 return 0;
776}
777
778static struct platform_driver ipc_plat_driver = {
779 .remove = ipc_plat_remove,
780 .probe = ipc_plat_probe,
781 .driver = {
782 .name = "pmc-ipc-plat",
783 .acpi_match_table = ACPI_PTR(ipc_acpi_ids),
784 },
785};
786
787static int __init intel_pmc_ipc_init(void)
788{
789 int ret;
790
791 ret = platform_driver_register(&ipc_plat_driver);
792 if (ret) {
793 pr_err("Failed to register PMC ipc platform driver\n");
794 return ret;
795 }
796 ret = pci_register_driver(&ipc_pci_driver);
797 if (ret) {
798 pr_err("Failed to register PMC ipc pci driver\n");
799 platform_driver_unregister(&ipc_plat_driver);
800 return ret;
801 }
802 return ret;
803}
804
805static void __exit intel_pmc_ipc_exit(void)
806{
807 pci_unregister_driver(&ipc_pci_driver);
808 platform_driver_unregister(&ipc_plat_driver);
809}
810
811MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
812MODULE_DESCRIPTION("Intel PMC IPC driver");
813MODULE_LICENSE("GPL");
814
815/* Some modules are dependent on this, so init earlier */
816fs_initcall(intel_pmc_ipc_init);
817module_exit(intel_pmc_ipc_exit);