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170c6152 TP |
1 | /* |
2 | * Pinctrl driver for the Wondermedia SoC's | |
3 | * | |
4 | * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | */ | |
15 | ||
16 | #include <linux/err.h> | |
5c809c63 | 17 | #include <linux/gpio/driver.h> |
170c6152 TP |
18 | #include <linux/interrupt.h> |
19 | #include <linux/io.h> | |
20 | #include <linux/irq.h> | |
170c6152 TP |
21 | #include <linux/of.h> |
22 | #include <linux/of_irq.h> | |
23 | #include <linux/pinctrl/consumer.h> | |
24 | #include <linux/pinctrl/machine.h> | |
25 | #include <linux/pinctrl/pinconf.h> | |
26 | #include <linux/pinctrl/pinconf-generic.h> | |
27 | #include <linux/pinctrl/pinctrl.h> | |
28 | #include <linux/pinctrl/pinmux.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/slab.h> | |
31 | ||
32 | #include "pinctrl-wmt.h" | |
33 | ||
34 | static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg, | |
35 | u32 mask) | |
36 | { | |
37 | u32 val; | |
38 | ||
39 | val = readl_relaxed(data->base + reg); | |
40 | val |= mask; | |
41 | writel_relaxed(val, data->base + reg); | |
42 | } | |
43 | ||
44 | static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg, | |
45 | u32 mask) | |
46 | { | |
47 | u32 val; | |
48 | ||
49 | val = readl_relaxed(data->base + reg); | |
50 | val &= ~mask; | |
51 | writel_relaxed(val, data->base + reg); | |
52 | } | |
53 | ||
54 | enum wmt_func_sel { | |
55 | WMT_FSEL_GPIO_IN = 0, | |
56 | WMT_FSEL_GPIO_OUT = 1, | |
57 | WMT_FSEL_ALT = 2, | |
58 | WMT_FSEL_COUNT = 3, | |
59 | }; | |
60 | ||
61 | static const char * const wmt_functions[WMT_FSEL_COUNT] = { | |
62 | [WMT_FSEL_GPIO_IN] = "gpio_in", | |
63 | [WMT_FSEL_GPIO_OUT] = "gpio_out", | |
64 | [WMT_FSEL_ALT] = "alt", | |
65 | }; | |
66 | ||
67 | static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev) | |
68 | { | |
69 | return WMT_FSEL_COUNT; | |
70 | } | |
71 | ||
72 | static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev, | |
73 | unsigned selector) | |
74 | { | |
75 | return wmt_functions[selector]; | |
76 | } | |
77 | ||
78 | static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev, | |
79 | unsigned selector, | |
80 | const char * const **groups, | |
81 | unsigned * const num_groups) | |
82 | { | |
83 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
84 | ||
85 | /* every pin does every function */ | |
86 | *groups = data->groups; | |
87 | *num_groups = data->ngroups; | |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func, | |
93 | unsigned pin) | |
94 | { | |
95 | u32 bank = WMT_BANK_FROM_PIN(pin); | |
96 | u32 bit = WMT_BIT_FROM_PIN(pin); | |
97 | u32 reg_en = data->banks[bank].reg_en; | |
98 | u32 reg_dir = data->banks[bank].reg_dir; | |
99 | ||
100 | if (reg_dir == NO_REG) { | |
101 | dev_err(data->dev, "pin:%d no direction register defined\n", | |
102 | pin); | |
103 | return -EINVAL; | |
104 | } | |
105 | ||
106 | /* | |
107 | * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be | |
108 | * disabled (as on VT8500) and that no alternate function is available. | |
109 | */ | |
110 | switch (func) { | |
111 | case WMT_FSEL_GPIO_IN: | |
112 | if (reg_en != NO_REG) | |
113 | wmt_setbits(data, reg_en, BIT(bit)); | |
114 | wmt_clearbits(data, reg_dir, BIT(bit)); | |
115 | break; | |
116 | case WMT_FSEL_GPIO_OUT: | |
117 | if (reg_en != NO_REG) | |
118 | wmt_setbits(data, reg_en, BIT(bit)); | |
119 | wmt_setbits(data, reg_dir, BIT(bit)); | |
120 | break; | |
121 | case WMT_FSEL_ALT: | |
122 | if (reg_en == NO_REG) { | |
123 | dev_err(data->dev, "pin:%d no alt function available\n", | |
124 | pin); | |
125 | return -EINVAL; | |
126 | } | |
127 | wmt_clearbits(data, reg_en, BIT(bit)); | |
128 | } | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
03e9f0ca LW |
133 | static int wmt_pmx_set_mux(struct pinctrl_dev *pctldev, |
134 | unsigned func_selector, | |
135 | unsigned group_selector) | |
170c6152 TP |
136 | { |
137 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
138 | u32 pinnum = data->pins[group_selector].number; | |
139 | ||
140 | return wmt_set_pinmux(data, func_selector, pinnum); | |
141 | } | |
142 | ||
170c6152 TP |
143 | static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev, |
144 | struct pinctrl_gpio_range *range, | |
145 | unsigned offset) | |
146 | { | |
147 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
148 | ||
149 | /* disable by setting GPIO_IN */ | |
150 | wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset); | |
151 | } | |
152 | ||
153 | static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, | |
154 | struct pinctrl_gpio_range *range, | |
155 | unsigned offset, | |
156 | bool input) | |
157 | { | |
158 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
159 | ||
160 | wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT), | |
161 | offset); | |
162 | ||
163 | return 0; | |
164 | } | |
165 | ||
a228d74f | 166 | static const struct pinmux_ops wmt_pinmux_ops = { |
170c6152 TP |
167 | .get_functions_count = wmt_pmx_get_functions_count, |
168 | .get_function_name = wmt_pmx_get_function_name, | |
169 | .get_function_groups = wmt_pmx_get_function_groups, | |
03e9f0ca | 170 | .set_mux = wmt_pmx_set_mux, |
170c6152 TP |
171 | .gpio_disable_free = wmt_pmx_gpio_disable_free, |
172 | .gpio_set_direction = wmt_pmx_gpio_set_direction, | |
173 | }; | |
174 | ||
175 | static int wmt_get_groups_count(struct pinctrl_dev *pctldev) | |
176 | { | |
177 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
178 | ||
179 | return data->ngroups; | |
180 | } | |
181 | ||
182 | static const char *wmt_get_group_name(struct pinctrl_dev *pctldev, | |
183 | unsigned selector) | |
184 | { | |
185 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
186 | ||
187 | return data->groups[selector]; | |
188 | } | |
189 | ||
190 | static int wmt_get_group_pins(struct pinctrl_dev *pctldev, | |
191 | unsigned selector, | |
192 | const unsigned **pins, | |
193 | unsigned *num_pins) | |
194 | { | |
195 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
196 | ||
197 | *pins = &data->pins[selector].number; | |
198 | *num_pins = 1; | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin) | |
204 | { | |
205 | int i; | |
206 | ||
207 | for (i = 0; i < data->npins; i++) { | |
208 | if (data->pins[i].number == pin) | |
209 | return i; | |
210 | } | |
211 | ||
212 | return -EINVAL; | |
213 | } | |
214 | ||
215 | static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data, | |
216 | struct device_node *np, | |
217 | u32 pin, u32 fnum, | |
218 | struct pinctrl_map **maps) | |
219 | { | |
220 | int group; | |
221 | struct pinctrl_map *map = *maps; | |
222 | ||
223 | if (fnum >= ARRAY_SIZE(wmt_functions)) { | |
224 | dev_err(data->dev, "invalid wm,function %d\n", fnum); | |
225 | return -EINVAL; | |
226 | } | |
227 | ||
228 | group = wmt_pctl_find_group_by_pin(data, pin); | |
229 | if (group < 0) { | |
230 | dev_err(data->dev, "unable to match pin %d to group\n", pin); | |
231 | return group; | |
232 | } | |
233 | ||
234 | map->type = PIN_MAP_TYPE_MUX_GROUP; | |
235 | map->data.mux.group = data->groups[group]; | |
236 | map->data.mux.function = wmt_functions[fnum]; | |
237 | (*maps)++; | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
242 | static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data, | |
243 | struct device_node *np, | |
244 | u32 pin, u32 pull, | |
245 | struct pinctrl_map **maps) | |
246 | { | |
247 | int group; | |
248 | unsigned long *configs; | |
249 | struct pinctrl_map *map = *maps; | |
250 | ||
251 | if (pull > 2) { | |
252 | dev_err(data->dev, "invalid wm,pull %d\n", pull); | |
253 | return -EINVAL; | |
254 | } | |
255 | ||
256 | group = wmt_pctl_find_group_by_pin(data, pin); | |
257 | if (group < 0) { | |
258 | dev_err(data->dev, "unable to match pin %d to group\n", pin); | |
259 | return group; | |
260 | } | |
261 | ||
262 | configs = kzalloc(sizeof(*configs), GFP_KERNEL); | |
263 | if (!configs) | |
264 | return -ENOMEM; | |
265 | ||
f17248ed TP |
266 | switch (pull) { |
267 | case 0: | |
268 | configs[0] = PIN_CONFIG_BIAS_DISABLE; | |
269 | break; | |
270 | case 1: | |
271 | configs[0] = PIN_CONFIG_BIAS_PULL_DOWN; | |
272 | break; | |
273 | case 2: | |
274 | configs[0] = PIN_CONFIG_BIAS_PULL_UP; | |
275 | break; | |
276 | default: | |
277 | configs[0] = PIN_CONFIG_BIAS_DISABLE; | |
278 | dev_err(data->dev, "invalid pull state %d - disabling\n", pull); | |
279 | } | |
170c6152 TP |
280 | |
281 | map->type = PIN_MAP_TYPE_CONFIGS_PIN; | |
282 | map->data.configs.group_or_pin = data->groups[group]; | |
283 | map->data.configs.configs = configs; | |
284 | map->data.configs.num_configs = 1; | |
285 | (*maps)++; | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev, | |
291 | struct pinctrl_map *maps, | |
292 | unsigned num_maps) | |
293 | { | |
294 | int i; | |
295 | ||
296 | for (i = 0; i < num_maps; i++) | |
297 | if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN) | |
298 | kfree(maps[i].data.configs.configs); | |
299 | ||
300 | kfree(maps); | |
301 | } | |
302 | ||
303 | static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev, | |
304 | struct device_node *np, | |
305 | struct pinctrl_map **map, | |
306 | unsigned *num_maps) | |
307 | { | |
308 | struct pinctrl_map *maps, *cur_map; | |
309 | struct property *pins, *funcs, *pulls; | |
310 | u32 pin, func, pull; | |
311 | int num_pins, num_funcs, num_pulls, maps_per_pin; | |
312 | int i, err; | |
313 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
314 | ||
315 | pins = of_find_property(np, "wm,pins", NULL); | |
316 | if (!pins) { | |
317 | dev_err(data->dev, "missing wmt,pins property\n"); | |
318 | return -EINVAL; | |
319 | } | |
320 | ||
321 | funcs = of_find_property(np, "wm,function", NULL); | |
322 | pulls = of_find_property(np, "wm,pull", NULL); | |
323 | ||
324 | if (!funcs && !pulls) { | |
325 | dev_err(data->dev, "neither wm,function nor wm,pull specified\n"); | |
326 | return -EINVAL; | |
327 | } | |
328 | ||
329 | /* | |
330 | * The following lines calculate how many values are defined for each | |
331 | * of the properties. | |
332 | */ | |
333 | num_pins = pins->length / sizeof(u32); | |
334 | num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0; | |
335 | num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0; | |
336 | ||
337 | if (num_funcs > 1 && num_funcs != num_pins) { | |
338 | dev_err(data->dev, "wm,function must have 1 or %d entries\n", | |
339 | num_pins); | |
340 | return -EINVAL; | |
341 | } | |
342 | ||
343 | if (num_pulls > 1 && num_pulls != num_pins) { | |
344 | dev_err(data->dev, "wm,pull must have 1 or %d entries\n", | |
345 | num_pins); | |
346 | return -EINVAL; | |
347 | } | |
348 | ||
349 | maps_per_pin = 0; | |
350 | if (num_funcs) | |
351 | maps_per_pin++; | |
352 | if (num_pulls) | |
353 | maps_per_pin++; | |
354 | ||
355 | cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps), | |
356 | GFP_KERNEL); | |
357 | if (!maps) | |
358 | return -ENOMEM; | |
359 | ||
360 | for (i = 0; i < num_pins; i++) { | |
361 | err = of_property_read_u32_index(np, "wm,pins", i, &pin); | |
362 | if (err) | |
363 | goto fail; | |
364 | ||
365 | if (pin >= (data->nbanks * 32)) { | |
366 | dev_err(data->dev, "invalid wm,pins value\n"); | |
367 | err = -EINVAL; | |
368 | goto fail; | |
369 | } | |
370 | ||
371 | if (num_funcs) { | |
372 | err = of_property_read_u32_index(np, "wm,function", | |
373 | (num_funcs > 1 ? i : 0), &func); | |
374 | if (err) | |
375 | goto fail; | |
376 | ||
377 | err = wmt_pctl_dt_node_to_map_func(data, np, pin, func, | |
378 | &cur_map); | |
379 | if (err) | |
380 | goto fail; | |
381 | } | |
382 | ||
383 | if (num_pulls) { | |
384 | err = of_property_read_u32_index(np, "wm,pull", | |
385 | (num_pulls > 1 ? i : 0), &pull); | |
386 | if (err) | |
387 | goto fail; | |
388 | ||
389 | err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull, | |
390 | &cur_map); | |
391 | if (err) | |
392 | goto fail; | |
393 | } | |
394 | } | |
395 | *map = maps; | |
396 | *num_maps = num_pins * maps_per_pin; | |
397 | return 0; | |
398 | ||
399 | /* | |
400 | * The fail path removes any maps that have been allocated. The fail path is | |
401 | * only called from code after maps has been kzalloc'd. It is also safe to | |
402 | * pass 'num_pins * maps_per_pin' as the map count even though we probably | |
403 | * failed before all the mappings were read as all maps are allocated at once, | |
404 | * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there | |
405 | * is no failpath where a config can be allocated without .type being set. | |
406 | */ | |
407 | fail: | |
408 | wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin); | |
409 | return err; | |
410 | } | |
411 | ||
a228d74f | 412 | static const struct pinctrl_ops wmt_pctl_ops = { |
170c6152 TP |
413 | .get_groups_count = wmt_get_groups_count, |
414 | .get_group_name = wmt_get_group_name, | |
415 | .get_group_pins = wmt_get_group_pins, | |
416 | .dt_node_to_map = wmt_pctl_dt_node_to_map, | |
417 | .dt_free_map = wmt_pctl_dt_free_map, | |
418 | }; | |
419 | ||
420 | static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, | |
421 | unsigned long *config) | |
422 | { | |
423 | return -ENOTSUPP; | |
424 | } | |
425 | ||
426 | static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, | |
03b054e9 | 427 | unsigned long *configs, unsigned num_configs) |
170c6152 TP |
428 | { |
429 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
03b054e9 | 430 | enum pin_config_param param; |
58957d2e | 431 | u32 arg; |
170c6152 TP |
432 | u32 bank = WMT_BANK_FROM_PIN(pin); |
433 | u32 bit = WMT_BIT_FROM_PIN(pin); | |
434 | u32 reg_pull_en = data->banks[bank].reg_pull_en; | |
435 | u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; | |
03b054e9 | 436 | int i; |
170c6152 TP |
437 | |
438 | if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) { | |
439 | dev_err(data->dev, "bias functions not supported on pin %d\n", | |
440 | pin); | |
441 | return -EINVAL; | |
442 | } | |
443 | ||
03b054e9 SY |
444 | for (i = 0; i < num_configs; i++) { |
445 | param = pinconf_to_config_param(configs[i]); | |
446 | arg = pinconf_to_config_argument(configs[i]); | |
170c6152 | 447 | |
03b054e9 SY |
448 | if ((param == PIN_CONFIG_BIAS_PULL_DOWN) || |
449 | (param == PIN_CONFIG_BIAS_PULL_UP)) { | |
450 | if (arg == 0) | |
451 | param = PIN_CONFIG_BIAS_DISABLE; | |
452 | } | |
453 | ||
454 | switch (param) { | |
455 | case PIN_CONFIG_BIAS_DISABLE: | |
456 | wmt_clearbits(data, reg_pull_en, BIT(bit)); | |
457 | break; | |
458 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
459 | wmt_clearbits(data, reg_pull_cfg, BIT(bit)); | |
460 | wmt_setbits(data, reg_pull_en, BIT(bit)); | |
461 | break; | |
462 | case PIN_CONFIG_BIAS_PULL_UP: | |
463 | wmt_setbits(data, reg_pull_cfg, BIT(bit)); | |
464 | wmt_setbits(data, reg_pull_en, BIT(bit)); | |
465 | break; | |
466 | default: | |
467 | dev_err(data->dev, "unknown pinconf param\n"); | |
468 | return -EINVAL; | |
469 | } | |
470 | } /* for each config */ | |
170c6152 TP |
471 | |
472 | return 0; | |
473 | } | |
474 | ||
a228d74f | 475 | static const struct pinconf_ops wmt_pinconf_ops = { |
170c6152 TP |
476 | .pin_config_get = wmt_pinconf_get, |
477 | .pin_config_set = wmt_pinconf_set, | |
478 | }; | |
479 | ||
480 | static struct pinctrl_desc wmt_desc = { | |
481 | .owner = THIS_MODULE, | |
482 | .name = "pinctrl-wmt", | |
483 | .pctlops = &wmt_pctl_ops, | |
484 | .pmxops = &wmt_pinmux_ops, | |
485 | .confops = &wmt_pinconf_ops, | |
486 | }; | |
487 | ||
170c6152 TP |
488 | static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
489 | { | |
5c809c63 | 490 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
170c6152 TP |
491 | u32 bank = WMT_BANK_FROM_PIN(offset); |
492 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
493 | u32 reg_dir = data->banks[bank].reg_dir; | |
494 | u32 val; | |
495 | ||
496 | val = readl_relaxed(data->base + reg_dir); | |
497 | if (val & BIT(bit)) | |
498 | return GPIOF_DIR_OUT; | |
499 | else | |
500 | return GPIOF_DIR_IN; | |
501 | } | |
502 | ||
170c6152 TP |
503 | static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) |
504 | { | |
5c809c63 | 505 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
170c6152 TP |
506 | u32 bank = WMT_BANK_FROM_PIN(offset); |
507 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
508 | u32 reg_data_in = data->banks[bank].reg_data_in; | |
509 | ||
510 | if (reg_data_in == NO_REG) { | |
511 | dev_err(data->dev, "no data in register defined\n"); | |
512 | return -EINVAL; | |
513 | } | |
514 | ||
515 | return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit)); | |
516 | } | |
517 | ||
518 | static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset, | |
519 | int val) | |
520 | { | |
5c809c63 | 521 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
170c6152 TP |
522 | u32 bank = WMT_BANK_FROM_PIN(offset); |
523 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
524 | u32 reg_data_out = data->banks[bank].reg_data_out; | |
525 | ||
526 | if (reg_data_out == NO_REG) { | |
527 | dev_err(data->dev, "no data out register defined\n"); | |
528 | return; | |
529 | } | |
530 | ||
531 | if (val) | |
532 | wmt_setbits(data, reg_data_out, BIT(bit)); | |
533 | else | |
534 | wmt_clearbits(data, reg_data_out, BIT(bit)); | |
535 | } | |
536 | ||
7ea45643 AC |
537 | static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
538 | { | |
539 | return pinctrl_gpio_direction_input(chip->base + offset); | |
540 | } | |
541 | ||
542 | static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |
543 | int value) | |
544 | { | |
545 | wmt_gpio_set_value(chip, offset, value); | |
546 | return pinctrl_gpio_direction_output(chip->base + offset); | |
547 | } | |
548 | ||
3d9c2563 | 549 | static const struct gpio_chip wmt_gpio_chip = { |
170c6152 TP |
550 | .label = "gpio-wmt", |
551 | .owner = THIS_MODULE, | |
98c85d58 JG |
552 | .request = gpiochip_generic_request, |
553 | .free = gpiochip_generic_free, | |
170c6152 TP |
554 | .get_direction = wmt_gpio_get_direction, |
555 | .direction_input = wmt_gpio_direction_input, | |
556 | .direction_output = wmt_gpio_direction_output, | |
557 | .get = wmt_gpio_get_value, | |
558 | .set = wmt_gpio_set_value, | |
9fb1f39e | 559 | .can_sleep = false, |
170c6152 TP |
560 | }; |
561 | ||
562 | int wmt_pinctrl_probe(struct platform_device *pdev, | |
563 | struct wmt_pinctrl_data *data) | |
564 | { | |
565 | int err; | |
566 | struct resource *res; | |
567 | ||
568 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
76cda6ec | 569 | data->base = devm_ioremap_resource(&pdev->dev, res); |
2207a4e1 | 570 | if (IS_ERR(data->base)) |
76cda6ec | 571 | return PTR_ERR(data->base); |
170c6152 TP |
572 | |
573 | wmt_desc.pins = data->pins; | |
574 | wmt_desc.npins = data->npins; | |
575 | ||
576 | data->gpio_chip = wmt_gpio_chip; | |
58383c78 | 577 | data->gpio_chip.parent = &pdev->dev; |
170c6152 TP |
578 | data->gpio_chip.of_node = pdev->dev.of_node; |
579 | data->gpio_chip.ngpio = data->nbanks * 32; | |
580 | ||
581 | platform_set_drvdata(pdev, data); | |
582 | ||
583 | data->dev = &pdev->dev; | |
584 | ||
f3abcb66 | 585 | data->pctl_dev = devm_pinctrl_register(&pdev->dev, &wmt_desc, data); |
323de9ef | 586 | if (IS_ERR(data->pctl_dev)) { |
170c6152 | 587 | dev_err(&pdev->dev, "Failed to register pinctrl\n"); |
323de9ef | 588 | return PTR_ERR(data->pctl_dev); |
170c6152 TP |
589 | } |
590 | ||
5c809c63 | 591 | err = gpiochip_add_data(&data->gpio_chip, data); |
170c6152 TP |
592 | if (err) { |
593 | dev_err(&pdev->dev, "could not add GPIO chip\n"); | |
f3abcb66 | 594 | return err; |
170c6152 TP |
595 | } |
596 | ||
597 | err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev), | |
598 | 0, 0, data->nbanks * 32); | |
599 | if (err) | |
600 | goto fail_range; | |
601 | ||
602 | dev_info(&pdev->dev, "Pin controller initialized\n"); | |
603 | ||
604 | return 0; | |
605 | ||
606 | fail_range: | |
b4e7c55d | 607 | gpiochip_remove(&data->gpio_chip); |
170c6152 TP |
608 | return err; |
609 | } |