projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 14c868b0 IZ |
1 | /* |
| 2 | * Allwinner A64 SoCs special pins pinctrl driver. | |
| 3 | * | |
| 4 | * Based on pinctrl-sun8i-a23-r.c | |
| 5 | * | |
| 6 | * Copyright (C) 2016 Icenowy Zheng | |
| 7 | * Icenowy Zheng <icenowy@aosc.xyz> | |
| 8 | * | |
| 9 | * Copyright (C) 2014 Chen-Yu Tsai | |
| 10 | * Chen-Yu Tsai <wens@csie.org> | |
| 11 | * | |
| 12 | * Copyright (C) 2014 Boris Brezillon | |
| 13 | * Boris Brezillon <boris.brezillon@free-electrons.com> | |
| 14 | * | |
| 15 | * Copyright (C) 2014 Maxime Ripard | |
| 16 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
| 17 | * | |
| 18 | * This file is licensed under the terms of the GNU General Public | |
| 19 | * License version 2. This program is licensed "as is" without any | |
| 20 | * warranty of any kind, whether express or implied. | |
| 21 | */ | |
| 22 | ||
| 23 | #include <linux/of.h> | |
| 24 | #include <linux/of_device.h> | |
| 25 | #include <linux/pinctrl/pinctrl.h> | |
| 26 | #include <linux/platform_device.h> | |
| 27 | #include <linux/reset.h> | |
| 28 | ||
| 29 | #include "pinctrl-sunxi.h" | |
| 30 | ||
| 31 | static const struct sunxi_desc_pin sun50i_a64_r_pins[] = { | |
| 32 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), | |
| 33 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 34 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 35 | SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */ | |
| 36 | SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */ | |
| 37 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ | |
| 38 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), | |
| 39 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 40 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 41 | SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */ | |
| 42 | SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */ | |
| 43 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ | |
| 44 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), | |
| 45 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 46 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 47 | SUNXI_FUNCTION(0x2, "s_uart"), /* TX */ | |
| 48 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ | |
| 49 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), | |
| 50 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 51 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 52 | SUNXI_FUNCTION(0x2, "s_uart"), /* RX */ | |
| 53 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ | |
| 54 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), | |
| 55 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 56 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 57 | SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ | |
| 58 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ | |
| 59 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), | |
| 60 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 61 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 62 | SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ | |
| 63 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ | |
| 64 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), | |
| 65 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 66 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 67 | SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ | |
| 68 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ | |
| 69 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), | |
| 70 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 71 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 72 | SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ | |
| 73 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ | |
| 74 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), | |
| 75 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 76 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 77 | SUNXI_FUNCTION(0x2, "s_i2c"), /* SCK */ | |
| 78 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ | |
| 79 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), | |
| 80 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 81 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 82 | SUNXI_FUNCTION(0x2, "s_i2c"), /* SDA */ | |
| 83 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ | |
| 84 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), | |
| 85 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 86 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 87 | SUNXI_FUNCTION(0x2, "s_pwm"), | |
| 88 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ | |
| 89 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11), | |
| 90 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 91 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 92 | SUNXI_FUNCTION(0x2, "s_cir_rx"), | |
| 93 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */ | |
| 94 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12), | |
| 95 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
| 96 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
| 97 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PL_EINT12 */ | |
| 98 | }; | |
| 99 | ||
| 100 | static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_data = { | |
| 101 | .pins = sun50i_a64_r_pins, | |
| 102 | .npins = ARRAY_SIZE(sun50i_a64_r_pins), | |
| 103 | .pin_base = PL_BASE, | |
| 104 | .irq_banks = 1, | |
| 105 | }; | |
| 106 | ||
| 107 | static int sun50i_a64_r_pinctrl_probe(struct platform_device *pdev) | |
| 108 | { | |
| 109 | return sunxi_pinctrl_init(pdev, | |
| 110 | &sun50i_a64_r_pinctrl_data); | |
| 111 | } | |
| 112 | ||
| 113 | static const struct of_device_id sun50i_a64_r_pinctrl_match[] = { | |
| 114 | { .compatible = "allwinner,sun50i-a64-r-pinctrl", }, | |
| 115 | {} | |
| 116 | }; | |
| 117 | ||
| 118 | static struct platform_driver sun50i_a64_r_pinctrl_driver = { | |
| 119 | .probe = sun50i_a64_r_pinctrl_probe, | |
| 120 | .driver = { | |
| 121 | .name = "sun50i-a64-r-pinctrl", | |
| 122 | .of_match_table = sun50i_a64_r_pinctrl_match, | |
| 123 | }, | |
| 124 | }; | |
| 125 | builtin_platform_driver(sun50i_a64_r_pinctrl_driver); |