[linux-2.6-block.git] / drivers / pinctrl / spear / pinctrl-spear.c

/*
 * Driver for the ST Microelectronics SPEAr pinmux
 *
 * Copyright (C) 2012 ST Microelectronics
 * Viresh Kumar <vireshk@kernel.org>
 *
 * Inspired from:
 * - U300 Pinctl drivers
 * - Tegra Pinctl drivers
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/err.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_gpio.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include "pinctrl-spear.h"

#define DRIVER_NAME "spear-pinmux"

static void muxregs_endisable(struct spear_pmx *pmx,
		struct spear_muxreg *muxregs, u8 count, bool enable)
{
	struct spear_muxreg *muxreg;
	u32 val, temp, j;

	for (j = 0; j < count; j++) {
		muxreg = &muxregs[j];

		val = pmx_readl(pmx, muxreg->reg);
		val &= ~muxreg->mask;

		if (enable)
			temp = muxreg->val;
		else
			temp = ~muxreg->val;

		val |= muxreg->mask & temp;
		pmx_writel(pmx, val, muxreg->reg);
	}
}

static int set_mode(struct spear_pmx *pmx, int mode)
{
	struct spear_pmx_mode *pmx_mode = NULL;
	int i;
	u32 val;

	if (!pmx->machdata->pmx_modes || !pmx->machdata->npmx_modes)
		return -EINVAL;

	for (i = 0; i < pmx->machdata->npmx_modes; i++) {
		if (pmx->machdata->pmx_modes[i]->mode == (1 << mode)) {
			pmx_mode = pmx->machdata->pmx_modes[i];
			break;
		}
	}

	if (!pmx_mode)
		return -EINVAL;

	val = pmx_readl(pmx, pmx_mode->reg);
	val &= ~pmx_mode->mask;
	val |= pmx_mode->val;
	pmx_writel(pmx, val, pmx_mode->reg);

	pmx->machdata->mode = pmx_mode->mode;
	dev_info(pmx->dev, "Configured Mode: %s with id: %x\n\n",
			pmx_mode->name ? pmx_mode->name : "no_name",
			pmx_mode->reg);

	return 0;
}

void pmx_init_gpio_pingroup_addr(struct spear_gpio_pingroup *gpio_pingroup,
				 unsigned count, u16 reg)
{
	int i, j;

	for (i = 0; i < count; i++)
		for (j = 0; j < gpio_pingroup[i].nmuxregs; j++)
			gpio_pingroup[i].muxregs[j].reg = reg;
}

void pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg)
{
	struct spear_pingroup *pgroup;
	struct spear_modemux *modemux;
	int i, j, group;

	for (group = 0; group < machdata->ngroups; group++) {
		pgroup = machdata->groups[group];

		for (i = 0; i < pgroup->nmodemuxs; i++) {
			modemux = &pgroup->modemuxs[i];

			for (j = 0; j < modemux->nmuxregs; j++)
				if (modemux->muxregs[j].reg == 0xFFFF)
					modemux->muxregs[j].reg = reg;
		}
	}
}

static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->machdata->ngroups;
}

static const char *spear_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
		unsigned group)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->machdata->groups[group]->name;
}

static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
		unsigned group, const unsigned **pins, unsigned *num_pins)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	*pins = pmx->machdata->groups[group]->pins;
	*num_pins = pmx->machdata->groups[group]->npins;

	return 0;
}

static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
		struct seq_file *s, unsigned offset)
{
	seq_printf(s, " " DRIVER_NAME);
}

static int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
					struct device_node *np_config,
					struct pinctrl_map **map,
					unsigned *num_maps)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	struct device_node *np;
	struct property *prop;
	const char *function, *group;
	int ret, index = 0, count = 0;

	/* calculate number of maps required */
	for_each_child_of_node(np_config, np) {
		ret = of_property_read_string(np, "st,function", &function);
		if (ret < 0)
			return ret;

		ret = of_property_count_strings(np, "st,pins");
		if (ret < 0)
			return ret;

		count += ret;
	}

	if (!count) {
		dev_err(pmx->dev, "No child nodes passed via DT\n");
		return -ENODEV;
	}

	*map = kcalloc(count, sizeof(**map), GFP_KERNEL);
	if (!*map)
		return -ENOMEM;

	for_each_child_of_node(np_config, np) {
		of_property_read_string(np, "st,function", &function);
		of_property_for_each_string(np, "st,pins", prop, group) {
			(*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;
			(*map)[index].data.mux.group = group;
			(*map)[index].data.mux.function = function;
			index++;
		}
	}

	*num_maps = count;

	return 0;
}

static void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
				      struct pinctrl_map *map,
				      unsigned num_maps)
{
	kfree(map);
}

static const struct pinctrl_ops spear_pinctrl_ops = {
	.get_groups_count = spear_pinctrl_get_groups_cnt,
	.get_group_name = spear_pinctrl_get_group_name,
	.get_group_pins = spear_pinctrl_get_group_pins,
	.pin_dbg_show = spear_pinctrl_pin_dbg_show,
	.dt_node_to_map = spear_pinctrl_dt_node_to_map,
	.dt_free_map = spear_pinctrl_dt_free_map,
};

static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->machdata->nfunctions;
}

static const char *spear_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
		unsigned function)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	return pmx->machdata->functions[function]->name;
}

static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
		unsigned function, const char *const **groups,
		unsigned * const ngroups)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);

	*groups = pmx->machdata->functions[function]->groups;
	*ngroups = pmx->machdata->functions[function]->ngroups;

	return 0;
}

static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev,
		unsigned function, unsigned group, bool enable)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	const struct spear_pingroup *pgroup;
	const struct spear_modemux *modemux;
	int i;
	bool found = false;

	pgroup = pmx->machdata->groups[group];

	for (i = 0; i < pgroup->nmodemuxs; i++) {
		modemux = &pgroup->modemuxs[i];

		/* SoC have any modes */
		if (pmx->machdata->modes_supported) {
			if (!(pmx->machdata->mode & modemux->modes))
				continue;
		}

		found = true;
		muxregs_endisable(pmx, modemux->muxregs, modemux->nmuxregs,
				enable);
	}

	if (!found) {
		dev_err(pmx->dev, "pinmux group: %s not supported\n",
				pgroup->name);
		return -ENODEV;
	}

	return 0;
}

static int spear_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned function,
		unsigned group)
{
	return spear_pinctrl_endisable(pctldev, function, group, true);
}

/* gpio with pinmux */
static struct spear_gpio_pingroup *get_gpio_pingroup(struct spear_pmx *pmx,
		unsigned pin)
{
	struct spear_gpio_pingroup *gpio_pingroup;
	int i, j;

	if (!pmx->machdata->gpio_pingroups)
		return NULL;

	for (i = 0; i < pmx->machdata->ngpio_pingroups; i++) {
		gpio_pingroup = &pmx->machdata->gpio_pingroups[i];

		for (j = 0; j < gpio_pingroup->npins; j++) {
			if (gpio_pingroup->pins[j] == pin)
				return gpio_pingroup;
		}
	}

	return NULL;
}

static int gpio_request_endisable(struct pinctrl_dev *pctldev,
		struct pinctrl_gpio_range *range, unsigned offset, bool enable)
{
	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	struct spear_pinctrl_machdata *machdata = pmx->machdata;
	struct spear_gpio_pingroup *gpio_pingroup;

	/*
	 * Some SoC have configuration options applicable to group of pins,
	 * rather than a single pin.
	 */
	gpio_pingroup = get_gpio_pingroup(pmx, offset);
	if (gpio_pingroup)
		muxregs_endisable(pmx, gpio_pingroup->muxregs,
				gpio_pingroup->nmuxregs, enable);

	/*
	 * SoC may need some extra configurations, or configurations for single
	 * pin
	 */
	if (machdata->gpio_request_endisable)
		machdata->gpio_request_endisable(pmx, offset, enable);

	return 0;
}

static int gpio_request_enable(struct pinctrl_dev *pctldev,
		struct pinctrl_gpio_range *range, unsigned offset)
{
	return gpio_request_endisable(pctldev, range, offset, true);
}

static void gpio_disable_free(struct pinctrl_dev *pctldev,
		struct pinctrl_gpio_range *range, unsigned offset)
{
	gpio_request_endisable(pctldev, range, offset, false);
}

static const struct pinmux_ops spear_pinmux_ops = {
	.get_functions_count = spear_pinctrl_get_funcs_count,
	.get_function_name = spear_pinctrl_get_func_name,
	.get_function_groups = spear_pinctrl_get_func_groups,
	.set_mux = spear_pinctrl_set_mux,
	.gpio_request_enable = gpio_request_enable,
	.gpio_disable_free = gpio_disable_free,
};

static struct pinctrl_desc spear_pinctrl_desc = {
	.name = DRIVER_NAME,
	.pctlops = &spear_pinctrl_ops,
	.pmxops = &spear_pinmux_ops,
	.owner = THIS_MODULE,
};

int spear_pinctrl_probe(struct platform_device *pdev,
			struct spear_pinctrl_machdata *machdata)
{
	struct device_node *np = pdev->dev.of_node;
	struct resource *res;
	struct spear_pmx *pmx;

	if (!machdata)
		return -ENODEV;

	pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
	if (!pmx)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	pmx->vbase = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(pmx->vbase))
		return PTR_ERR(pmx->vbase);

	pmx->dev = &pdev->dev;
	pmx->machdata = machdata;

	/* configure mode, if supported by SoC */
	if (machdata->modes_supported) {
		int mode = 0;

		if (of_property_read_u32(np, "st,pinmux-mode", &mode)) {
			dev_err(&pdev->dev, "OF: pinmux mode not passed\n");
			return -EINVAL;
		}

		if (set_mode(pmx, mode)) {
			dev_err(&pdev->dev, "OF: Couldn't configure mode: %x\n",
					mode);
			return -EINVAL;
		}
	}

	platform_set_drvdata(pdev, pmx);

	spear_pinctrl_desc.pins = machdata->pins;
	spear_pinctrl_desc.npins = machdata->npins;

	pmx->pctl = devm_pinctrl_register(&pdev->dev, &spear_pinctrl_desc, pmx);
	if (IS_ERR(pmx->pctl)) {
		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
		return PTR_ERR(pmx->pctl);
	}

	return 0;
}
Commit	Line	Data
deda8287 VK	1	/*
	2	* Driver for the ST Microelectronics SPEAr pinmux
	3	*
	4	* Copyright (C) 2012 ST Microelectronics
da89947b	5	* Viresh Kumar <vireshk@kernel.org>
deda8287 VK	6	*
	7	* Inspired from:
	8	* - U300 Pinctl drivers
	9	* - Tegra Pinctl drivers
	10	*
	11	* This file is licensed under the terms of the GNU General Public
	12	* License version 2. This program is licensed "as is" without any
	13	* warranty of any kind, whether express or implied.
	14	*/
	15
	16	#include <linux/err.h>
deda8287 VK	17	#include <linux/module.h>
	18	#include <linux/of.h>
	19	#include <linux/of_address.h>
f4f8e563	20	#include <linux/of_gpio.h>
deda8287 VK	21	#include <linux/pinctrl/machine.h>
	22	#include <linux/pinctrl/pinctrl.h>
	23	#include <linux/pinctrl/pinmux.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/slab.h>
	26
	27	#include "pinctrl-spear.h"
	28
	29	#define DRIVER_NAME "spear-pinmux"
	30
f4f8e563 VK	31	static void muxregs_endisable(struct spear_pmx *pmx,
	32	struct spear_muxreg *muxregs, u8 count, bool enable)
	33	{
	34	struct spear_muxreg *muxreg;
	35	u32 val, temp, j;
	36
	37	for (j = 0; j < count; j++) {
	38	muxreg = &muxregs[j];
	39
	40	val = pmx_readl(pmx, muxreg->reg);
	41	val &= ~muxreg->mask;
	42
	43	if (enable)
	44	temp = muxreg->val;
	45	else
	46	temp = ~muxreg->val;
	47
	48	val \|= muxreg->mask & temp;
	49	pmx_writel(pmx, val, muxreg->reg);
	50	}
	51	}
	52
deda8287 VK	53	static int set_mode(struct spear_pmx *pmx, int mode)
	54	{
	55	struct spear_pmx_mode *pmx_mode = NULL;
	56	int i;
	57	u32 val;
	58
	59	if (!pmx->machdata->pmx_modes \|\| !pmx->machdata->npmx_modes)
	60	return -EINVAL;
	61
	62	for (i = 0; i < pmx->machdata->npmx_modes; i++) {
	63	if (pmx->machdata->pmx_modes[i]->mode == (1 << mode)) {
	64	pmx_mode = pmx->machdata->pmx_modes[i];
	65	break;
	66	}
	67	}
	68
	69	if (!pmx_mode)
	70	return -EINVAL;
	71
	72	val = pmx_readl(pmx, pmx_mode->reg);
	73	val &= ~pmx_mode->mask;
	74	val \|= pmx_mode->val;
	75	pmx_writel(pmx, val, pmx_mode->reg);
	76
	77	pmx->machdata->mode = pmx_mode->mode;
	78	dev_info(pmx->dev, "Configured Mode: %s with id: %x\n\n",
	79	pmx_mode->name ? pmx_mode->name : "no_name",
	80	pmx_mode->reg);
	81
	82	return 0;
	83	}
	84
150632b0 GKH	85	void pmx_init_gpio_pingroup_addr(struct spear_gpio_pingroup *gpio_pingroup,
150632b0 GKH	86	unsigned count, u16 reg)
f4f8e563	87	{
4484d0b1	88	int i, j;
f4f8e563	89
4484d0b1 AL	90	for (i = 0; i < count; i++)
4484d0b1 AL	91	for (j = 0; j < gpio_pingroup[i].nmuxregs; j++)
f4f8e563 VK	92	gpio_pingroup[i].muxregs[j].reg = reg;
	93	}
	94
150632b0	95	void pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg)
deda8287 VK	96	{
	97	struct spear_pingroup *pgroup;
	98	struct spear_modemux *modemux;
	99	int i, j, group;
	100
	101	for (group = 0; group < machdata->ngroups; group++) {
	102	pgroup = machdata->groups[group];
	103
	104	for (i = 0; i < pgroup->nmodemuxs; i++) {
	105	modemux = &pgroup->modemuxs[i];
	106
	107	for (j = 0; j < modemux->nmuxregs; j++)
	108	if (modemux->muxregs[j].reg == 0xFFFF)
	109	modemux->muxregs[j].reg = reg;
	110	}
	111	}
	112	}
	113
	114	static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev)
	115	{
	116	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	117
	118	return pmx->machdata->ngroups;
	119	}
	120
	121	static const char spear_pinctrl_get_group_name(struct pinctrl_dev pctldev,
	122	unsigned group)
	123	{
	124	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	125
	126	return pmx->machdata->groups[group]->name;
	127	}
	128
	129	static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
	130	unsigned group, const unsigned *pins, unsigned num_pins)
	131	{
	132	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	133
	134	*pins = pmx->machdata->groups[group]->pins;
	135	*num_pins = pmx->machdata->groups[group]->npins;
	136
	137	return 0;
	138	}
	139
	140	static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
	141	struct seq_file *s, unsigned offset)
	142	{
	143	seq_printf(s, " " DRIVER_NAME);
	144	}
	145
9b2b1740 AL	146	static int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
	147	struct device_node *np_config,
	148	struct pinctrl_map **map,
	149	unsigned *num_maps)
deda8287 VK	150	{
	151	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	152	struct device_node *np;
	153	struct property *prop;
	154	const char function, group;
	155	int ret, index = 0, count = 0;
	156
	157	/* calculate number of maps required */
	158	for_each_child_of_node(np_config, np) {
	159	ret = of_property_read_string(np, "st,function", &function);
	160	if (ret < 0)
	161	return ret;
	162
	163	ret = of_property_count_strings(np, "st,pins");
	164	if (ret < 0)
	165	return ret;
	166
	167	count += ret;
	168	}
	169
	170	if (!count) {
	171	dev_err(pmx->dev, "No child nodes passed via DT\n");
	172	return -ENODEV;
	173	}
	174
6396bb22	175	map = kcalloc(count, sizeof(*map), GFP_KERNEL);
deda8287 VK	176	if (!*map)
	177	return -ENOMEM;
	178
	179	for_each_child_of_node(np_config, np) {
	180	of_property_read_string(np, "st,function", &function);
	181	of_property_for_each_string(np, "st,pins", prop, group) {
	182	(*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;
	183	(*map)[index].data.mux.group = group;
	184	(*map)[index].data.mux.function = function;
	185	index++;
	186	}
	187	}
	188
	189	*num_maps = count;
	190
	191	return 0;
	192	}
	193
9b2b1740 AL	194	static void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
	195	struct pinctrl_map *map,
	196	unsigned num_maps)
deda8287 VK	197	{
	198	kfree(map);
	199	}
	200
022ab148	201	static const struct pinctrl_ops spear_pinctrl_ops = {
deda8287 VK	202	.get_groups_count = spear_pinctrl_get_groups_cnt,
	203	.get_group_name = spear_pinctrl_get_group_name,
	204	.get_group_pins = spear_pinctrl_get_group_pins,
	205	.pin_dbg_show = spear_pinctrl_pin_dbg_show,
	206	.dt_node_to_map = spear_pinctrl_dt_node_to_map,
	207	.dt_free_map = spear_pinctrl_dt_free_map,
	208	};
	209
	210	static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
	211	{
	212	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	213
	214	return pmx->machdata->nfunctions;
	215	}
	216
	217	static const char spear_pinctrl_get_func_name(struct pinctrl_dev pctldev,
	218	unsigned function)
	219	{
	220	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	221
	222	return pmx->machdata->functions[function]->name;
	223	}
	224
	225	static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
	226	unsigned function, const char const *groups,
	227	unsigned * const ngroups)
	228	{
	229	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	230
	231	*groups = pmx->machdata->functions[function]->groups;
	232	*ngroups = pmx->machdata->functions[function]->ngroups;
	233
	234	return 0;
	235	}
	236
	237	static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev,
	238	unsigned function, unsigned group, bool enable)
	239	{
	240	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
	241	const struct spear_pingroup *pgroup;
	242	const struct spear_modemux *modemux;
f4f8e563	243	int i;
deda8287 VK	244	bool found = false;
	245
	246	pgroup = pmx->machdata->groups[group];
	247
	248	for (i = 0; i < pgroup->nmodemuxs; i++) {
	249	modemux = &pgroup->modemuxs[i];
	250
	251	/* SoC have any modes */
	252	if (pmx->machdata->modes_supported) {
	253	if (!(pmx->machdata->mode & modemux->modes))
	254	continue;
	255	}
	256
	257	found = true;
f4f8e563 VK	258	muxregs_endisable(pmx, modemux->muxregs, modemux->nmuxregs,
f4f8e563 VK	259	enable);
deda8287 VK	260	}
	261
	262	if (!found) {
	263	dev_err(pmx->dev, "pinmux group: %s not supported\n",
	264	pgroup->name);
	265	return -ENODEV;
	266	}
	267
	268	return 0;
	269	}
	270
03e9f0ca	271	static int spear_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned function,
deda8287 VK	272	unsigned group)
	273	{
	274	return spear_pinctrl_endisable(pctldev, function, group, true);
	275	}
	276
f4f8e563 VK	277	/* gpio with pinmux */
	278	static struct spear_gpio_pingroup get_gpio_pingroup(struct spear_pmx pmx,
	279	unsigned pin)
	280	{
	281	struct spear_gpio_pingroup *gpio_pingroup;
6f37b1b4	282	int i, j;
f4f8e563 VK	283
	284	if (!pmx->machdata->gpio_pingroups)
	285	return NULL;
	286
6f37b1b4	287	for (i = 0; i < pmx->machdata->ngpio_pingroups; i++) {
f4f8e563 VK	288	gpio_pingroup = &pmx->machdata->gpio_pingroups[i];
	289
	290	for (j = 0; j < gpio_pingroup->npins; j++) {
	291	if (gpio_pingroup->pins[j] == pin)
	292	return gpio_pingroup;
	293	}
	294	}
	295
6f37b1b4	296	return NULL;
f4f8e563 VK	297	}
	298
	299	static int gpio_request_endisable(struct pinctrl_dev *pctldev,
	300	struct pinctrl_gpio_range *range, unsigned offset, bool enable)
	301	{
	302	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
826d6ca8	303	struct spear_pinctrl_machdata *machdata = pmx->machdata;
f4f8e563 VK	304	struct spear_gpio_pingroup *gpio_pingroup;
f4f8e563 VK	305
826d6ca8 SH	306	/*
	307	* Some SoC have configuration options applicable to group of pins,
	308	* rather than a single pin.
	309	*/
f4f8e563	310	gpio_pingroup = get_gpio_pingroup(pmx, offset);
f4f8e563 VK	311	if (gpio_pingroup)
	312	muxregs_endisable(pmx, gpio_pingroup->muxregs,
	313	gpio_pingroup->nmuxregs, enable);
	314
826d6ca8 SH	315	/*
	316	* SoC may need some extra configurations, or configurations for single
	317	* pin
	318	*/
	319	if (machdata->gpio_request_endisable)
	320	machdata->gpio_request_endisable(pmx, offset, enable);
	321
f4f8e563 VK	322	return 0;
	323	}
	324
	325	static int gpio_request_enable(struct pinctrl_dev *pctldev,
	326	struct pinctrl_gpio_range *range, unsigned offset)
	327	{
	328	return gpio_request_endisable(pctldev, range, offset, true);
	329	}
	330
	331	static void gpio_disable_free(struct pinctrl_dev *pctldev,
	332	struct pinctrl_gpio_range *range, unsigned offset)
	333	{
	334	gpio_request_endisable(pctldev, range, offset, false);
	335	}
	336
022ab148	337	static const struct pinmux_ops spear_pinmux_ops = {
deda8287 VK	338	.get_functions_count = spear_pinctrl_get_funcs_count,
	339	.get_function_name = spear_pinctrl_get_func_name,
	340	.get_function_groups = spear_pinctrl_get_func_groups,
03e9f0ca	341	.set_mux = spear_pinctrl_set_mux,
f4f8e563 VK	342	.gpio_request_enable = gpio_request_enable,
f4f8e563 VK	343	.gpio_disable_free = gpio_disable_free,
deda8287 VK	344	};
	345
	346	static struct pinctrl_desc spear_pinctrl_desc = {
	347	.name = DRIVER_NAME,
	348	.pctlops = &spear_pinctrl_ops,
	349	.pmxops = &spear_pinmux_ops,
	350	.owner = THIS_MODULE,
	351	};
	352
150632b0 GKH	353	int spear_pinctrl_probe(struct platform_device *pdev,
150632b0 GKH	354	struct spear_pinctrl_machdata *machdata)
deda8287 VK	355	{
	356	struct device_node *np = pdev->dev.of_node;
	357	struct resource *res;
	358	struct spear_pmx *pmx;
	359
	360	if (!machdata)
	361	return -ENODEV;
	362
deda8287	363	pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
51d7a036	364	if (!pmx)
deda8287	365	return -ENOMEM;
deda8287	366
dff5a99c AL	367	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	368	pmx->vbase = devm_ioremap_resource(&pdev->dev, res);
	369	if (IS_ERR(pmx->vbase))
	370	return PTR_ERR(pmx->vbase);
deda8287 VK	371
	372	pmx->dev = &pdev->dev;
	373	pmx->machdata = machdata;
	374
	375	/* configure mode, if supported by SoC */
	376	if (machdata->modes_supported) {
	377	int mode = 0;
	378
	379	if (of_property_read_u32(np, "st,pinmux-mode", &mode)) {
	380	dev_err(&pdev->dev, "OF: pinmux mode not passed\n");
	381	return -EINVAL;
	382	}
	383
	384	if (set_mode(pmx, mode)) {
	385	dev_err(&pdev->dev, "OF: Couldn't configure mode: %x\n",
	386	mode);
	387	return -EINVAL;
	388	}
	389	}
	390
	391	platform_set_drvdata(pdev, pmx);
	392
	393	spear_pinctrl_desc.pins = machdata->pins;
	394	spear_pinctrl_desc.npins = machdata->npins;
	395
d39de313	396	pmx->pctl = devm_pinctrl_register(&pdev->dev, &spear_pinctrl_desc, pmx);
323de9ef	397	if (IS_ERR(pmx->pctl)) {
deda8287	398	dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
323de9ef	399	return PTR_ERR(pmx->pctl);
deda8287 VK	400	}
	401
	402	return 0;
	403	}