Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
44 | !ops->enable || | |
45 | !ops->disable) | |
46 | return -EINVAL; | |
47 | ||
48 | /* Check that all functions registered have names */ | |
a1d31f71 | 49 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 50 | while (selector < nfuncs) { |
03665e0f SW |
51 | const char *fname = ops->get_function_name(pctldev, |
52 | selector); | |
53 | if (!fname) { | |
a1d31f71 | 54 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
55 | selector); |
56 | return -EINVAL; | |
57 | } | |
58 | selector++; | |
59 | } | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
1e2082b5 SW |
64 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
65 | { | |
66 | if (!map->data.mux.function) { | |
67 | pr_err("failed to register map %s (%d): no function given\n", | |
68 | map->name, i); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
2744e8af LW |
75 | /** |
76 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
77 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
78 | * @owner: a representation of the owner of this pin; typically the device |
79 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
80 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
81 | * single GPIO pin | |
82 | */ | |
83 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 84 | int pin, const char *owner, |
2744e8af LW |
85 | struct pinctrl_gpio_range *gpio_range) |
86 | { | |
87 | struct pin_desc *desc; | |
88 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
89 | int status = -EINVAL; | |
90 | ||
3cc70ed3 | 91 | dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); |
2744e8af | 92 | |
2744e8af LW |
93 | desc = pin_desc_get(pctldev, pin); |
94 | if (desc == NULL) { | |
51cd24ee | 95 | dev_err(pctldev->dev, |
2744e8af LW |
96 | "pin is not registered so it cannot be requested\n"); |
97 | goto out; | |
98 | } | |
99 | ||
652162d4 SW |
100 | if (gpio_range) { |
101 | /* There's no need to support multiple GPIO requests */ | |
102 | if (desc->gpio_owner) { | |
103 | dev_err(pctldev->dev, | |
104 | "pin already requested\n"); | |
105 | goto out; | |
106 | } | |
0e3db173 | 107 | |
652162d4 SW |
108 | desc->gpio_owner = owner; |
109 | } else { | |
110 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
111 | dev_err(pctldev->dev, | |
112 | "pin already requested\n"); | |
113 | goto out; | |
114 | } | |
0e3db173 | 115 | |
652162d4 SW |
116 | desc->mux_usecount++; |
117 | if (desc->mux_usecount > 1) | |
118 | return 0; | |
119 | ||
120 | desc->mux_owner = owner; | |
121 | } | |
2744e8af LW |
122 | |
123 | /* Let each pin increase references to this module */ | |
124 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 125 | dev_err(pctldev->dev, |
2744e8af LW |
126 | "could not increase module refcount for pin %d\n", |
127 | pin); | |
128 | status = -EINVAL; | |
129 | goto out_free_pin; | |
130 | } | |
131 | ||
132 | /* | |
133 | * If there is no kind of request function for the pin we just assume | |
134 | * we got it by default and proceed. | |
135 | */ | |
3712a3c4 | 136 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
137 | /* This requests and enables a single GPIO pin */ |
138 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
139 | else if (ops->request) | |
140 | status = ops->request(pctldev, pin); | |
141 | else | |
142 | status = 0; | |
143 | ||
0e3db173 | 144 | if (status) { |
f9d41d7c | 145 | dev_err(pctldev->dev, "->request on device %s failed for pin %d\n", |
2744e8af | 146 | pctldev->desc->name, pin); |
0e3db173 SW |
147 | module_put(pctldev->owner); |
148 | } | |
149 | ||
2744e8af | 150 | out_free_pin: |
0e3db173 | 151 | if (status) { |
652162d4 SW |
152 | if (gpio_range) { |
153 | desc->gpio_owner = NULL; | |
154 | } else { | |
155 | desc->mux_usecount--; | |
156 | if (!desc->mux_usecount) | |
157 | desc->mux_owner = NULL; | |
158 | } | |
0e3db173 | 159 | } |
2744e8af LW |
160 | out: |
161 | if (status) | |
51cd24ee | 162 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
3cc70ed3 | 163 | pin, owner, status); |
2744e8af LW |
164 | |
165 | return status; | |
166 | } | |
167 | ||
168 | /** | |
169 | * pin_free() - release a single muxed in pin so something else can be muxed | |
170 | * @pctldev: pin controller device handling this pin | |
171 | * @pin: the pin to free | |
3712a3c4 SW |
172 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
173 | * single GPIO pin | |
336cdba0 | 174 | * |
3cc70ed3 SW |
175 | * This function returns a pointer to the previous owner. This is used |
176 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 177 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 178 | */ |
3712a3c4 SW |
179 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
180 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
181 | { |
182 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
183 | struct pin_desc *desc; | |
3cc70ed3 | 184 | const char *owner; |
2744e8af LW |
185 | |
186 | desc = pin_desc_get(pctldev, pin); | |
187 | if (desc == NULL) { | |
51cd24ee | 188 | dev_err(pctldev->dev, |
2744e8af | 189 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 190 | return NULL; |
2744e8af LW |
191 | } |
192 | ||
652162d4 SW |
193 | if (!gpio_range) { |
194 | desc->mux_usecount--; | |
195 | if (desc->mux_usecount) | |
196 | return NULL; | |
197 | } | |
0e3db173 | 198 | |
3712a3c4 SW |
199 | /* |
200 | * If there is no kind of request function for the pin we just assume | |
201 | * we got it by default and proceed. | |
202 | */ | |
203 | if (gpio_range && ops->gpio_disable_free) | |
204 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
205 | else if (ops->free) | |
2744e8af LW |
206 | ops->free(pctldev, pin); |
207 | ||
652162d4 SW |
208 | if (gpio_range) { |
209 | owner = desc->gpio_owner; | |
210 | desc->gpio_owner = NULL; | |
211 | } else { | |
212 | owner = desc->mux_owner; | |
213 | desc->mux_owner = NULL; | |
214 | desc->mux_setting = NULL; | |
215 | } | |
216 | ||
2744e8af | 217 | module_put(pctldev->owner); |
3712a3c4 | 218 | |
3cc70ed3 | 219 | return owner; |
2744e8af LW |
220 | } |
221 | ||
222 | /** | |
befe5bdf LW |
223 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
224 | * @pctldev: pin controller device affected | |
225 | * @pin: the pin to mux in for GPIO | |
226 | * @range: the applicable GPIO range | |
2744e8af | 227 | */ |
befe5bdf LW |
228 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
229 | struct pinctrl_gpio_range *range, | |
230 | unsigned pin, unsigned gpio) | |
2744e8af LW |
231 | { |
232 | char gpiostr[16]; | |
3cc70ed3 | 233 | const char *owner; |
2744e8af | 234 | int ret; |
2744e8af LW |
235 | |
236 | /* Conjure some name stating what chip and pin this is taken by */ | |
237 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
238 | ||
3cc70ed3 SW |
239 | owner = kstrdup(gpiostr, GFP_KERNEL); |
240 | if (!owner) | |
5d2eaf80 SW |
241 | return -EINVAL; |
242 | ||
3cc70ed3 | 243 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 244 | if (ret < 0) |
3cc70ed3 | 245 | kfree(owner); |
5d2eaf80 SW |
246 | |
247 | return ret; | |
2744e8af | 248 | } |
2744e8af LW |
249 | |
250 | /** | |
befe5bdf LW |
251 | * pinmux_free_gpio() - release a pin from GPIO muxing |
252 | * @pctldev: the pin controller device for the pin | |
253 | * @pin: the affected currently GPIO-muxed in pin | |
254 | * @range: applicable GPIO range | |
2744e8af | 255 | */ |
befe5bdf LW |
256 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
257 | struct pinctrl_gpio_range *range) | |
2744e8af | 258 | { |
3cc70ed3 | 259 | const char *owner; |
2744e8af | 260 | |
3cc70ed3 SW |
261 | owner = pin_free(pctldev, pin, range); |
262 | kfree(owner); | |
2744e8af | 263 | } |
2744e8af | 264 | |
befe5bdf LW |
265 | /** |
266 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
267 | * @pctldev: the pin controller handling this pin | |
268 | * @range: applicable GPIO range | |
269 | * @pin: the affected GPIO pin in this controller | |
270 | * @input: true if we set the pin as input, false for output | |
271 | */ | |
272 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
273 | struct pinctrl_gpio_range *range, | |
274 | unsigned pin, bool input) | |
542e704f | 275 | { |
542e704f LW |
276 | const struct pinmux_ops *ops; |
277 | int ret; | |
542e704f LW |
278 | |
279 | ops = pctldev->desc->pmxops; | |
280 | ||
542e704f LW |
281 | if (ops->gpio_set_direction) |
282 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
283 | else | |
284 | ret = 0; | |
285 | ||
286 | return ret; | |
287 | } | |
288 | ||
7ecdb16f SW |
289 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
290 | const char *function) | |
2744e8af LW |
291 | { |
292 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 293 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
294 | unsigned selector = 0; |
295 | ||
296 | /* See if this pctldev has this function */ | |
d1e90e9e | 297 | while (selector < nfuncs) { |
2744e8af LW |
298 | const char *fname = ops->get_function_name(pctldev, |
299 | selector); | |
2744e8af | 300 | |
7ecdb16f SW |
301 | if (!strcmp(function, fname)) |
302 | return selector; | |
2744e8af | 303 | |
2744e8af LW |
304 | selector++; |
305 | } | |
306 | ||
307 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 308 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
309 | return -EINVAL; |
310 | } | |
311 | ||
7ecdb16f SW |
312 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
313 | struct pinctrl_setting *setting) | |
2744e8af | 314 | { |
7ecdb16f SW |
315 | struct pinctrl_dev *pctldev = setting->pctldev; |
316 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
317 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
318 | char const * const *groups; | |
319 | unsigned num_groups; | |
2744e8af | 320 | int ret; |
7ecdb16f SW |
321 | const char *group; |
322 | int i; | |
323 | const unsigned *pins; | |
324 | unsigned num_pins; | |
2744e8af | 325 | |
1e2082b5 SW |
326 | setting->data.mux.func = |
327 | pinmux_func_name_to_selector(pctldev, map->data.mux.function); | |
328 | if (setting->data.mux.func < 0) | |
329 | return setting->data.mux.func; | |
2744e8af | 330 | |
1e2082b5 | 331 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f SW |
332 | &groups, &num_groups); |
333 | if (ret < 0) | |
334 | return ret; | |
335 | if (!num_groups) | |
2744e8af | 336 | return -EINVAL; |
7ecdb16f | 337 | |
1e2082b5 | 338 | if (map->data.mux.group) { |
7ecdb16f | 339 | bool found = false; |
1e2082b5 | 340 | group = map->data.mux.group; |
7ecdb16f SW |
341 | for (i = 0; i < num_groups; i++) { |
342 | if (!strcmp(group, groups[i])) { | |
343 | found = true; | |
344 | break; | |
345 | } | |
346 | } | |
347 | if (!found) | |
348 | return -EINVAL; | |
349 | } else { | |
350 | group = groups[0]; | |
2744e8af | 351 | } |
2744e8af | 352 | |
1e2082b5 SW |
353 | setting->data.mux.group = pinctrl_get_group_selector(pctldev, group); |
354 | if (setting->data.mux.group < 0) | |
355 | return setting->data.mux.group; | |
2744e8af | 356 | |
1e2082b5 SW |
357 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
358 | &num_pins); | |
2744e8af | 359 | if (ret) { |
7ecdb16f SW |
360 | dev_err(pctldev->dev, |
361 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 362 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
363 | return -ENODEV; |
364 | } | |
365 | ||
366 | /* Try to allocate all pins in this group, one by one */ | |
367 | for (i = 0; i < num_pins; i++) { | |
368 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
369 | if (ret) { | |
370 | dev_err(pctldev->dev, | |
371 | "could not get request pin %d on device %s\n", | |
372 | pins[i], pinctrl_dev_get_name(pctldev)); | |
373 | /* On error release all taken pins */ | |
374 | i--; /* this pin just failed */ | |
375 | for (; i >= 0; i--) | |
376 | pin_free(pctldev, pins[i], NULL); | |
377 | return -ENODEV; | |
378 | } | |
2744e8af | 379 | } |
2744e8af LW |
380 | |
381 | return 0; | |
382 | } | |
383 | ||
7ecdb16f | 384 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 385 | { |
7ecdb16f SW |
386 | struct pinctrl_dev *pctldev = setting->pctldev; |
387 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
388 | const unsigned *pins; | |
389 | unsigned num_pins; | |
befe5bdf | 390 | int ret; |
7ecdb16f | 391 | int i; |
2744e8af | 392 | |
1e2082b5 | 393 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 394 | &pins, &num_pins); |
befe5bdf | 395 | if (ret) { |
7ecdb16f SW |
396 | dev_err(pctldev->dev, |
397 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 398 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 399 | return; |
2744e8af LW |
400 | } |
401 | ||
7ecdb16f SW |
402 | for (i = 0; i < num_pins; i++) |
403 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 404 | } |
2744e8af | 405 | |
7ecdb16f | 406 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 407 | { |
7ecdb16f | 408 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 409 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 410 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
411 | int ret; |
412 | const unsigned *pins; | |
413 | unsigned num_pins; | |
414 | int i; | |
415 | struct pin_desc *desc; | |
416 | ||
417 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
418 | &pins, &num_pins); | |
419 | if (ret) { | |
420 | /* errors only affect debug data, so just warn */ | |
421 | dev_warn(pctldev->dev, | |
422 | "could not get pins for group selector %d\n", | |
423 | setting->data.mux.group); | |
424 | num_pins = 0; | |
425 | } | |
426 | ||
427 | for (i = 0; i < num_pins; i++) { | |
428 | desc = pin_desc_get(pctldev, pins[i]); | |
429 | if (desc == NULL) { | |
430 | dev_warn(pctldev->dev, | |
431 | "could not get pin desc for pin %d\n", | |
432 | pins[i]); | |
433 | continue; | |
434 | } | |
435 | desc->mux_setting = &(setting->data.mux); | |
436 | } | |
2744e8af | 437 | |
1e2082b5 SW |
438 | return ops->enable(pctldev, setting->data.mux.func, |
439 | setting->data.mux.group); | |
2744e8af | 440 | } |
2744e8af | 441 | |
7ecdb16f | 442 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 443 | { |
7ecdb16f | 444 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 445 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 446 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
447 | int ret; |
448 | const unsigned *pins; | |
449 | unsigned num_pins; | |
450 | int i; | |
451 | struct pin_desc *desc; | |
452 | ||
453 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
454 | &pins, &num_pins); | |
455 | if (ret) { | |
456 | /* errors only affect debug data, so just warn */ | |
457 | dev_warn(pctldev->dev, | |
458 | "could not get pins for group selector %d\n", | |
459 | setting->data.mux.group); | |
460 | num_pins = 0; | |
461 | } | |
462 | ||
463 | for (i = 0; i < num_pins; i++) { | |
464 | desc = pin_desc_get(pctldev, pins[i]); | |
465 | if (desc == NULL) { | |
466 | dev_warn(pctldev->dev, | |
467 | "could not get pin desc for pin %d\n", | |
468 | pins[i]); | |
469 | continue; | |
470 | } | |
471 | desc->mux_setting = NULL; | |
472 | } | |
2744e8af | 473 | |
1e2082b5 | 474 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); |
2744e8af | 475 | } |
2744e8af | 476 | |
2744e8af LW |
477 | #ifdef CONFIG_DEBUG_FS |
478 | ||
479 | /* Called from pincontrol core */ | |
480 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
481 | { | |
482 | struct pinctrl_dev *pctldev = s->private; | |
483 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
d1e90e9e | 484 | unsigned nfuncs = pmxops->get_functions_count(pctldev); |
2744e8af LW |
485 | unsigned func_selector = 0; |
486 | ||
57b676f9 SW |
487 | mutex_lock(&pinctrl_mutex); |
488 | ||
d1e90e9e | 489 | while (func_selector < nfuncs) { |
2744e8af LW |
490 | const char *func = pmxops->get_function_name(pctldev, |
491 | func_selector); | |
492 | const char * const *groups; | |
493 | unsigned num_groups; | |
494 | int ret; | |
495 | int i; | |
496 | ||
497 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
498 | &groups, &num_groups); | |
499 | if (ret) | |
500 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
501 | func); | |
502 | ||
503 | seq_printf(s, "function: %s, groups = [ ", func); | |
504 | for (i = 0; i < num_groups; i++) | |
505 | seq_printf(s, "%s ", groups[i]); | |
506 | seq_puts(s, "]\n"); | |
507 | ||
508 | func_selector++; | |
2744e8af LW |
509 | } |
510 | ||
57b676f9 SW |
511 | mutex_unlock(&pinctrl_mutex); |
512 | ||
2744e8af LW |
513 | return 0; |
514 | } | |
515 | ||
516 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
517 | { | |
518 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
519 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
520 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 521 | unsigned i, pin; |
2744e8af LW |
522 | |
523 | seq_puts(s, "Pinmux settings per pin\n"); | |
652162d4 | 524 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 525 | |
57b676f9 SW |
526 | mutex_lock(&pinctrl_mutex); |
527 | ||
706e8520 CP |
528 | /* The pin number can be retrived from the pin controller descriptor */ |
529 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 530 | struct pin_desc *desc; |
1cf94c45 | 531 | bool is_hog = false; |
2744e8af | 532 | |
706e8520 | 533 | pin = pctldev->desc->pins[i].number; |
2744e8af | 534 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 535 | /* Skip if we cannot search the pin */ |
2744e8af LW |
536 | if (desc == NULL) |
537 | continue; | |
538 | ||
652162d4 SW |
539 | if (desc->mux_owner && |
540 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
541 | is_hog = true; |
542 | ||
652162d4 | 543 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 544 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
545 | desc->mux_owner ? desc->mux_owner |
546 | : "(MUX UNCLAIMED)", | |
547 | desc->gpio_owner ? desc->gpio_owner | |
548 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 549 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
550 | |
551 | if (desc->mux_setting) | |
552 | seq_printf(s, " function %s group %s\n", | |
553 | pmxops->get_function_name(pctldev, | |
554 | desc->mux_setting->func), | |
555 | pctlops->get_group_name(pctldev, | |
556 | desc->mux_setting->group)); | |
557 | else | |
558 | seq_printf(s, "\n"); | |
2744e8af LW |
559 | } |
560 | ||
57b676f9 SW |
561 | mutex_unlock(&pinctrl_mutex); |
562 | ||
2744e8af LW |
563 | return 0; |
564 | } | |
565 | ||
1e2082b5 SW |
566 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
567 | { | |
568 | seq_printf(s, "group %s\nfunction %s\n", | |
569 | map->data.mux.group ? map->data.mux.group : "(default)", | |
570 | map->data.mux.function); | |
571 | } | |
572 | ||
573 | void pinmux_show_setting(struct seq_file *s, | |
574 | struct pinctrl_setting const *setting) | |
2744e8af | 575 | { |
7ecdb16f SW |
576 | struct pinctrl_dev *pctldev = setting->pctldev; |
577 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
578 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
579 | ||
1e2082b5 SW |
580 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
581 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
582 | setting->data.mux.group, | |
583 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
584 | setting->data.mux.func); | |
2744e8af LW |
585 | } |
586 | ||
587 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
588 | { | |
589 | return single_open(file, pinmux_functions_show, inode->i_private); | |
590 | } | |
591 | ||
592 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
593 | { | |
594 | return single_open(file, pinmux_pins_show, inode->i_private); | |
595 | } | |
596 | ||
2744e8af LW |
597 | static const struct file_operations pinmux_functions_ops = { |
598 | .open = pinmux_functions_open, | |
599 | .read = seq_read, | |
600 | .llseek = seq_lseek, | |
601 | .release = single_release, | |
602 | }; | |
603 | ||
604 | static const struct file_operations pinmux_pins_ops = { | |
605 | .open = pinmux_pins_open, | |
606 | .read = seq_read, | |
607 | .llseek = seq_lseek, | |
608 | .release = single_release, | |
609 | }; | |
610 | ||
2744e8af LW |
611 | void pinmux_init_device_debugfs(struct dentry *devroot, |
612 | struct pinctrl_dev *pctldev) | |
613 | { | |
614 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
615 | devroot, pctldev, &pinmux_functions_ops); | |
616 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
617 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
618 | } |
619 | ||
620 | #endif /* CONFIG_DEBUG_FS */ |