Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
02b50ce4 | 44 | !ops->enable) { |
ad6e1107 | 45 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 46 | return -EINVAL; |
ad6e1107 | 47 | } |
03665e0f | 48 | /* Check that all functions registered have names */ |
a1d31f71 | 49 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 50 | while (selector < nfuncs) { |
03665e0f SW |
51 | const char *fname = ops->get_function_name(pctldev, |
52 | selector); | |
53 | if (!fname) { | |
a1d31f71 | 54 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
55 | selector); |
56 | return -EINVAL; | |
57 | } | |
58 | selector++; | |
59 | } | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
1e2082b5 SW |
64 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
65 | { | |
66 | if (!map->data.mux.function) { | |
67 | pr_err("failed to register map %s (%d): no function given\n", | |
68 | map->name, i); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
2744e8af LW |
75 | /** |
76 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
77 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
78 | * @owner: a representation of the owner of this pin; typically the device |
79 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
80 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
81 | * single GPIO pin | |
82 | */ | |
83 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 84 | int pin, const char *owner, |
2744e8af LW |
85 | struct pinctrl_gpio_range *gpio_range) |
86 | { | |
87 | struct pin_desc *desc; | |
88 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
89 | int status = -EINVAL; | |
90 | ||
2744e8af LW |
91 | desc = pin_desc_get(pctldev, pin); |
92 | if (desc == NULL) { | |
51cd24ee | 93 | dev_err(pctldev->dev, |
d4705316 SW |
94 | "pin %d is not registered so it cannot be requested\n", |
95 | pin); | |
2744e8af LW |
96 | goto out; |
97 | } | |
98 | ||
d0bd8df5 DA |
99 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
100 | pin, desc->name, owner); | |
101 | ||
652162d4 SW |
102 | if (gpio_range) { |
103 | /* There's no need to support multiple GPIO requests */ | |
104 | if (desc->gpio_owner) { | |
105 | dev_err(pctldev->dev, | |
d4705316 SW |
106 | "pin %s already requested by %s; cannot claim for %s\n", |
107 | desc->name, desc->gpio_owner, owner); | |
652162d4 SW |
108 | goto out; |
109 | } | |
0e3db173 | 110 | |
652162d4 SW |
111 | desc->gpio_owner = owner; |
112 | } else { | |
113 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
114 | dev_err(pctldev->dev, | |
d4705316 SW |
115 | "pin %s already requested by %s; cannot claim for %s\n", |
116 | desc->name, desc->mux_owner, owner); | |
652162d4 SW |
117 | goto out; |
118 | } | |
0e3db173 | 119 | |
652162d4 SW |
120 | desc->mux_usecount++; |
121 | if (desc->mux_usecount > 1) | |
122 | return 0; | |
123 | ||
124 | desc->mux_owner = owner; | |
125 | } | |
2744e8af LW |
126 | |
127 | /* Let each pin increase references to this module */ | |
128 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 129 | dev_err(pctldev->dev, |
2744e8af LW |
130 | "could not increase module refcount for pin %d\n", |
131 | pin); | |
132 | status = -EINVAL; | |
133 | goto out_free_pin; | |
134 | } | |
135 | ||
136 | /* | |
137 | * If there is no kind of request function for the pin we just assume | |
138 | * we got it by default and proceed. | |
139 | */ | |
3712a3c4 | 140 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
141 | /* This requests and enables a single GPIO pin */ |
142 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
143 | else if (ops->request) | |
144 | status = ops->request(pctldev, pin); | |
145 | else | |
146 | status = 0; | |
147 | ||
0e3db173 | 148 | if (status) { |
d4705316 | 149 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
150 | module_put(pctldev->owner); |
151 | } | |
152 | ||
2744e8af | 153 | out_free_pin: |
0e3db173 | 154 | if (status) { |
652162d4 SW |
155 | if (gpio_range) { |
156 | desc->gpio_owner = NULL; | |
157 | } else { | |
158 | desc->mux_usecount--; | |
159 | if (!desc->mux_usecount) | |
160 | desc->mux_owner = NULL; | |
161 | } | |
0e3db173 | 162 | } |
2744e8af LW |
163 | out: |
164 | if (status) | |
51cd24ee | 165 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 166 | pin, owner, status); |
2744e8af LW |
167 | |
168 | return status; | |
169 | } | |
170 | ||
171 | /** | |
172 | * pin_free() - release a single muxed in pin so something else can be muxed | |
173 | * @pctldev: pin controller device handling this pin | |
174 | * @pin: the pin to free | |
3712a3c4 SW |
175 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
176 | * single GPIO pin | |
336cdba0 | 177 | * |
3cc70ed3 SW |
178 | * This function returns a pointer to the previous owner. This is used |
179 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 180 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 181 | */ |
3712a3c4 SW |
182 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
183 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
184 | { |
185 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
186 | struct pin_desc *desc; | |
3cc70ed3 | 187 | const char *owner; |
2744e8af LW |
188 | |
189 | desc = pin_desc_get(pctldev, pin); | |
190 | if (desc == NULL) { | |
51cd24ee | 191 | dev_err(pctldev->dev, |
2744e8af | 192 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 193 | return NULL; |
2744e8af LW |
194 | } |
195 | ||
652162d4 SW |
196 | if (!gpio_range) { |
197 | desc->mux_usecount--; | |
198 | if (desc->mux_usecount) | |
199 | return NULL; | |
200 | } | |
0e3db173 | 201 | |
3712a3c4 SW |
202 | /* |
203 | * If there is no kind of request function for the pin we just assume | |
204 | * we got it by default and proceed. | |
205 | */ | |
206 | if (gpio_range && ops->gpio_disable_free) | |
207 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
208 | else if (ops->free) | |
2744e8af LW |
209 | ops->free(pctldev, pin); |
210 | ||
652162d4 SW |
211 | if (gpio_range) { |
212 | owner = desc->gpio_owner; | |
213 | desc->gpio_owner = NULL; | |
214 | } else { | |
215 | owner = desc->mux_owner; | |
216 | desc->mux_owner = NULL; | |
217 | desc->mux_setting = NULL; | |
218 | } | |
219 | ||
2744e8af | 220 | module_put(pctldev->owner); |
3712a3c4 | 221 | |
3cc70ed3 | 222 | return owner; |
2744e8af LW |
223 | } |
224 | ||
225 | /** | |
befe5bdf LW |
226 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
227 | * @pctldev: pin controller device affected | |
228 | * @pin: the pin to mux in for GPIO | |
229 | * @range: the applicable GPIO range | |
2744e8af | 230 | */ |
befe5bdf LW |
231 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
232 | struct pinctrl_gpio_range *range, | |
233 | unsigned pin, unsigned gpio) | |
2744e8af | 234 | { |
3cc70ed3 | 235 | const char *owner; |
2744e8af | 236 | int ret; |
2744e8af LW |
237 | |
238 | /* Conjure some name stating what chip and pin this is taken by */ | |
23a895ae | 239 | owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); |
3cc70ed3 | 240 | if (!owner) |
5d2eaf80 SW |
241 | return -EINVAL; |
242 | ||
3cc70ed3 | 243 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 244 | if (ret < 0) |
3cc70ed3 | 245 | kfree(owner); |
5d2eaf80 SW |
246 | |
247 | return ret; | |
2744e8af | 248 | } |
2744e8af LW |
249 | |
250 | /** | |
befe5bdf LW |
251 | * pinmux_free_gpio() - release a pin from GPIO muxing |
252 | * @pctldev: the pin controller device for the pin | |
253 | * @pin: the affected currently GPIO-muxed in pin | |
254 | * @range: applicable GPIO range | |
2744e8af | 255 | */ |
befe5bdf LW |
256 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
257 | struct pinctrl_gpio_range *range) | |
2744e8af | 258 | { |
3cc70ed3 | 259 | const char *owner; |
2744e8af | 260 | |
3cc70ed3 SW |
261 | owner = pin_free(pctldev, pin, range); |
262 | kfree(owner); | |
2744e8af | 263 | } |
2744e8af | 264 | |
befe5bdf LW |
265 | /** |
266 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
267 | * @pctldev: the pin controller handling this pin | |
268 | * @range: applicable GPIO range | |
269 | * @pin: the affected GPIO pin in this controller | |
270 | * @input: true if we set the pin as input, false for output | |
271 | */ | |
272 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
273 | struct pinctrl_gpio_range *range, | |
274 | unsigned pin, bool input) | |
542e704f | 275 | { |
542e704f LW |
276 | const struct pinmux_ops *ops; |
277 | int ret; | |
542e704f LW |
278 | |
279 | ops = pctldev->desc->pmxops; | |
280 | ||
542e704f LW |
281 | if (ops->gpio_set_direction) |
282 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
283 | else | |
284 | ret = 0; | |
285 | ||
286 | return ret; | |
287 | } | |
288 | ||
7ecdb16f SW |
289 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
290 | const char *function) | |
2744e8af LW |
291 | { |
292 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 293 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
294 | unsigned selector = 0; |
295 | ||
296 | /* See if this pctldev has this function */ | |
d1e90e9e | 297 | while (selector < nfuncs) { |
2744e8af LW |
298 | const char *fname = ops->get_function_name(pctldev, |
299 | selector); | |
2744e8af | 300 | |
7ecdb16f SW |
301 | if (!strcmp(function, fname)) |
302 | return selector; | |
2744e8af | 303 | |
2744e8af LW |
304 | selector++; |
305 | } | |
306 | ||
307 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 308 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
309 | return -EINVAL; |
310 | } | |
311 | ||
7ecdb16f SW |
312 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
313 | struct pinctrl_setting *setting) | |
2744e8af | 314 | { |
7ecdb16f SW |
315 | struct pinctrl_dev *pctldev = setting->pctldev; |
316 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
317 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
318 | char const * const *groups; | |
319 | unsigned num_groups; | |
2744e8af | 320 | int ret; |
7ecdb16f SW |
321 | const char *group; |
322 | int i; | |
323 | const unsigned *pins; | |
324 | unsigned num_pins; | |
2744e8af | 325 | |
ad8bb720 DA |
326 | if (!pmxops) { |
327 | dev_err(pctldev->dev, "does not support mux function\n"); | |
328 | return -EINVAL; | |
329 | } | |
330 | ||
15f70e1b | 331 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
332 | if (ret < 0) { |
333 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
334 | map->data.mux.function); | |
15f70e1b | 335 | return ret; |
ad6e1107 | 336 | } |
15f70e1b | 337 | setting->data.mux.func = ret; |
2744e8af | 338 | |
1e2082b5 | 339 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 340 | &groups, &num_groups); |
ad6e1107 JC |
341 | if (ret < 0) { |
342 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
343 | map->data.mux.function); | |
7ecdb16f | 344 | return ret; |
ad6e1107 JC |
345 | } |
346 | if (!num_groups) { | |
347 | dev_err(pctldev->dev, | |
348 | "function %s can't be selected on any group\n", | |
349 | map->data.mux.function); | |
2744e8af | 350 | return -EINVAL; |
ad6e1107 | 351 | } |
1e2082b5 | 352 | if (map->data.mux.group) { |
7ecdb16f | 353 | bool found = false; |
1e2082b5 | 354 | group = map->data.mux.group; |
7ecdb16f SW |
355 | for (i = 0; i < num_groups; i++) { |
356 | if (!strcmp(group, groups[i])) { | |
357 | found = true; | |
358 | break; | |
359 | } | |
360 | } | |
ad6e1107 JC |
361 | if (!found) { |
362 | dev_err(pctldev->dev, | |
363 | "invalid group \"%s\" for function \"%s\"\n", | |
364 | group, map->data.mux.function); | |
7ecdb16f | 365 | return -EINVAL; |
ad6e1107 | 366 | } |
7ecdb16f SW |
367 | } else { |
368 | group = groups[0]; | |
2744e8af | 369 | } |
2744e8af | 370 | |
15f70e1b | 371 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
372 | if (ret < 0) { |
373 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
374 | map->data.mux.group); | |
15f70e1b | 375 | return ret; |
ad6e1107 | 376 | } |
15f70e1b | 377 | setting->data.mux.group = ret; |
2744e8af | 378 | |
1e2082b5 SW |
379 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
380 | &num_pins); | |
2744e8af | 381 | if (ret) { |
7ecdb16f SW |
382 | dev_err(pctldev->dev, |
383 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 384 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
385 | return -ENODEV; |
386 | } | |
387 | ||
388 | /* Try to allocate all pins in this group, one by one */ | |
389 | for (i = 0; i < num_pins; i++) { | |
390 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
391 | if (ret) { | |
392 | dev_err(pctldev->dev, | |
ad6e1107 | 393 | "could not request pin %d on device %s\n", |
7ecdb16f SW |
394 | pins[i], pinctrl_dev_get_name(pctldev)); |
395 | /* On error release all taken pins */ | |
396 | i--; /* this pin just failed */ | |
397 | for (; i >= 0; i--) | |
398 | pin_free(pctldev, pins[i], NULL); | |
399 | return -ENODEV; | |
400 | } | |
2744e8af | 401 | } |
2744e8af LW |
402 | |
403 | return 0; | |
404 | } | |
405 | ||
7ecdb16f | 406 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 407 | { |
7ecdb16f SW |
408 | struct pinctrl_dev *pctldev = setting->pctldev; |
409 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
410 | const unsigned *pins; | |
411 | unsigned num_pins; | |
befe5bdf | 412 | int ret; |
7ecdb16f | 413 | int i; |
2744e8af | 414 | |
1e2082b5 | 415 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 416 | &pins, &num_pins); |
befe5bdf | 417 | if (ret) { |
7ecdb16f SW |
418 | dev_err(pctldev->dev, |
419 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 420 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 421 | return; |
2744e8af LW |
422 | } |
423 | ||
7ecdb16f SW |
424 | for (i = 0; i < num_pins; i++) |
425 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 426 | } |
2744e8af | 427 | |
7ecdb16f | 428 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 429 | { |
7ecdb16f | 430 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 431 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 432 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
433 | int ret; |
434 | const unsigned *pins; | |
435 | unsigned num_pins; | |
436 | int i; | |
437 | struct pin_desc *desc; | |
438 | ||
439 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
440 | &pins, &num_pins); | |
441 | if (ret) { | |
442 | /* errors only affect debug data, so just warn */ | |
443 | dev_warn(pctldev->dev, | |
444 | "could not get pins for group selector %d\n", | |
445 | setting->data.mux.group); | |
446 | num_pins = 0; | |
447 | } | |
448 | ||
449 | for (i = 0; i < num_pins; i++) { | |
450 | desc = pin_desc_get(pctldev, pins[i]); | |
451 | if (desc == NULL) { | |
452 | dev_warn(pctldev->dev, | |
453 | "could not get pin desc for pin %d\n", | |
454 | pins[i]); | |
455 | continue; | |
456 | } | |
457 | desc->mux_setting = &(setting->data.mux); | |
458 | } | |
2744e8af | 459 | |
1e2082b5 SW |
460 | return ops->enable(pctldev, setting->data.mux.func, |
461 | setting->data.mux.group); | |
2744e8af | 462 | } |
2744e8af | 463 | |
7ecdb16f | 464 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 465 | { |
7ecdb16f | 466 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 467 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 468 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
469 | int ret; |
470 | const unsigned *pins; | |
471 | unsigned num_pins; | |
472 | int i; | |
473 | struct pin_desc *desc; | |
474 | ||
475 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
476 | &pins, &num_pins); | |
477 | if (ret) { | |
478 | /* errors only affect debug data, so just warn */ | |
479 | dev_warn(pctldev->dev, | |
480 | "could not get pins for group selector %d\n", | |
481 | setting->data.mux.group); | |
482 | num_pins = 0; | |
483 | } | |
484 | ||
485 | for (i = 0; i < num_pins; i++) { | |
486 | desc = pin_desc_get(pctldev, pins[i]); | |
487 | if (desc == NULL) { | |
488 | dev_warn(pctldev->dev, | |
489 | "could not get pin desc for pin %d\n", | |
490 | pins[i]); | |
491 | continue; | |
492 | } | |
493 | desc->mux_setting = NULL; | |
494 | } | |
2744e8af | 495 | |
02b50ce4 DA |
496 | if (ops->disable) |
497 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); | |
2744e8af | 498 | } |
2744e8af | 499 | |
2744e8af LW |
500 | #ifdef CONFIG_DEBUG_FS |
501 | ||
502 | /* Called from pincontrol core */ | |
503 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
504 | { | |
505 | struct pinctrl_dev *pctldev = s->private; | |
506 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 507 | unsigned nfuncs; |
2744e8af LW |
508 | unsigned func_selector = 0; |
509 | ||
ad8bb720 DA |
510 | if (!pmxops) |
511 | return 0; | |
57b676f9 | 512 | |
ad8bb720 DA |
513 | mutex_lock(&pinctrl_mutex); |
514 | nfuncs = pmxops->get_functions_count(pctldev); | |
d1e90e9e | 515 | while (func_selector < nfuncs) { |
2744e8af LW |
516 | const char *func = pmxops->get_function_name(pctldev, |
517 | func_selector); | |
518 | const char * const *groups; | |
519 | unsigned num_groups; | |
520 | int ret; | |
521 | int i; | |
522 | ||
523 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
524 | &groups, &num_groups); | |
525 | if (ret) | |
526 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
527 | func); | |
528 | ||
529 | seq_printf(s, "function: %s, groups = [ ", func); | |
530 | for (i = 0; i < num_groups; i++) | |
531 | seq_printf(s, "%s ", groups[i]); | |
532 | seq_puts(s, "]\n"); | |
533 | ||
534 | func_selector++; | |
2744e8af LW |
535 | } |
536 | ||
57b676f9 SW |
537 | mutex_unlock(&pinctrl_mutex); |
538 | ||
2744e8af LW |
539 | return 0; |
540 | } | |
541 | ||
542 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
543 | { | |
544 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
545 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
546 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 547 | unsigned i, pin; |
2744e8af | 548 | |
ad8bb720 DA |
549 | if (!pmxops) |
550 | return 0; | |
551 | ||
2744e8af | 552 | seq_puts(s, "Pinmux settings per pin\n"); |
652162d4 | 553 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 554 | |
57b676f9 SW |
555 | mutex_lock(&pinctrl_mutex); |
556 | ||
706e8520 CP |
557 | /* The pin number can be retrived from the pin controller descriptor */ |
558 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 559 | struct pin_desc *desc; |
1cf94c45 | 560 | bool is_hog = false; |
2744e8af | 561 | |
706e8520 | 562 | pin = pctldev->desc->pins[i].number; |
2744e8af | 563 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 564 | /* Skip if we cannot search the pin */ |
2744e8af LW |
565 | if (desc == NULL) |
566 | continue; | |
567 | ||
652162d4 SW |
568 | if (desc->mux_owner && |
569 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
570 | is_hog = true; |
571 | ||
652162d4 | 572 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 573 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
574 | desc->mux_owner ? desc->mux_owner |
575 | : "(MUX UNCLAIMED)", | |
576 | desc->gpio_owner ? desc->gpio_owner | |
577 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 578 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
579 | |
580 | if (desc->mux_setting) | |
581 | seq_printf(s, " function %s group %s\n", | |
582 | pmxops->get_function_name(pctldev, | |
583 | desc->mux_setting->func), | |
584 | pctlops->get_group_name(pctldev, | |
585 | desc->mux_setting->group)); | |
586 | else | |
587 | seq_printf(s, "\n"); | |
2744e8af LW |
588 | } |
589 | ||
57b676f9 SW |
590 | mutex_unlock(&pinctrl_mutex); |
591 | ||
2744e8af LW |
592 | return 0; |
593 | } | |
594 | ||
1e2082b5 SW |
595 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
596 | { | |
597 | seq_printf(s, "group %s\nfunction %s\n", | |
598 | map->data.mux.group ? map->data.mux.group : "(default)", | |
599 | map->data.mux.function); | |
600 | } | |
601 | ||
602 | void pinmux_show_setting(struct seq_file *s, | |
603 | struct pinctrl_setting const *setting) | |
2744e8af | 604 | { |
7ecdb16f SW |
605 | struct pinctrl_dev *pctldev = setting->pctldev; |
606 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
607 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
608 | ||
1e2082b5 SW |
609 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
610 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
611 | setting->data.mux.group, | |
612 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
613 | setting->data.mux.func); | |
2744e8af LW |
614 | } |
615 | ||
616 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
617 | { | |
618 | return single_open(file, pinmux_functions_show, inode->i_private); | |
619 | } | |
620 | ||
621 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
622 | { | |
623 | return single_open(file, pinmux_pins_show, inode->i_private); | |
624 | } | |
625 | ||
2744e8af LW |
626 | static const struct file_operations pinmux_functions_ops = { |
627 | .open = pinmux_functions_open, | |
628 | .read = seq_read, | |
629 | .llseek = seq_lseek, | |
630 | .release = single_release, | |
631 | }; | |
632 | ||
633 | static const struct file_operations pinmux_pins_ops = { | |
634 | .open = pinmux_pins_open, | |
635 | .read = seq_read, | |
636 | .llseek = seq_lseek, | |
637 | .release = single_release, | |
638 | }; | |
639 | ||
2744e8af LW |
640 | void pinmux_init_device_debugfs(struct dentry *devroot, |
641 | struct pinctrl_dev *pctldev) | |
642 | { | |
643 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
644 | devroot, pctldev, &pinmux_functions_ops); | |
645 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
646 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
647 | } |
648 | ||
649 | #endif /* CONFIG_DEBUG_FS */ |