Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
36 | unsigned selector = 0; | |
37 | ||
38 | /* Check that we implement required operations */ | |
39 | if (!ops->list_functions || | |
40 | !ops->get_function_name || | |
41 | !ops->get_function_groups || | |
42 | !ops->enable || | |
43 | !ops->disable) | |
44 | return -EINVAL; | |
45 | ||
46 | /* Check that all functions registered have names */ | |
47 | while (ops->list_functions(pctldev, selector) >= 0) { | |
48 | const char *fname = ops->get_function_name(pctldev, | |
49 | selector); | |
50 | if (!fname) { | |
51 | pr_err("pinmux ops has no name for function%u\n", | |
52 | selector); | |
53 | return -EINVAL; | |
54 | } | |
55 | selector++; | |
56 | } | |
57 | ||
58 | return 0; | |
59 | } | |
60 | ||
1e2082b5 SW |
61 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
62 | { | |
63 | if (!map->data.mux.function) { | |
64 | pr_err("failed to register map %s (%d): no function given\n", | |
65 | map->name, i); | |
66 | return -EINVAL; | |
67 | } | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
2744e8af LW |
72 | /** |
73 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
74 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
75 | * @owner: a representation of the owner of this pin; typically the device |
76 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
77 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
78 | * single GPIO pin | |
79 | */ | |
80 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 81 | int pin, const char *owner, |
2744e8af LW |
82 | struct pinctrl_gpio_range *gpio_range) |
83 | { | |
84 | struct pin_desc *desc; | |
85 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
86 | int status = -EINVAL; | |
87 | ||
3cc70ed3 | 88 | dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); |
2744e8af | 89 | |
2744e8af LW |
90 | desc = pin_desc_get(pctldev, pin); |
91 | if (desc == NULL) { | |
51cd24ee | 92 | dev_err(pctldev->dev, |
2744e8af LW |
93 | "pin is not registered so it cannot be requested\n"); |
94 | goto out; | |
95 | } | |
96 | ||
652162d4 SW |
97 | if (gpio_range) { |
98 | /* There's no need to support multiple GPIO requests */ | |
99 | if (desc->gpio_owner) { | |
100 | dev_err(pctldev->dev, | |
101 | "pin already requested\n"); | |
102 | goto out; | |
103 | } | |
0e3db173 | 104 | |
652162d4 SW |
105 | desc->gpio_owner = owner; |
106 | } else { | |
107 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
108 | dev_err(pctldev->dev, | |
109 | "pin already requested\n"); | |
110 | goto out; | |
111 | } | |
0e3db173 | 112 | |
652162d4 SW |
113 | desc->mux_usecount++; |
114 | if (desc->mux_usecount > 1) | |
115 | return 0; | |
116 | ||
117 | desc->mux_owner = owner; | |
118 | } | |
2744e8af LW |
119 | |
120 | /* Let each pin increase references to this module */ | |
121 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 122 | dev_err(pctldev->dev, |
2744e8af LW |
123 | "could not increase module refcount for pin %d\n", |
124 | pin); | |
125 | status = -EINVAL; | |
126 | goto out_free_pin; | |
127 | } | |
128 | ||
129 | /* | |
130 | * If there is no kind of request function for the pin we just assume | |
131 | * we got it by default and proceed. | |
132 | */ | |
3712a3c4 | 133 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
134 | /* This requests and enables a single GPIO pin */ |
135 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
136 | else if (ops->request) | |
137 | status = ops->request(pctldev, pin); | |
138 | else | |
139 | status = 0; | |
140 | ||
0e3db173 | 141 | if (status) { |
f9d41d7c | 142 | dev_err(pctldev->dev, "->request on device %s failed for pin %d\n", |
2744e8af | 143 | pctldev->desc->name, pin); |
0e3db173 SW |
144 | module_put(pctldev->owner); |
145 | } | |
146 | ||
2744e8af | 147 | out_free_pin: |
0e3db173 | 148 | if (status) { |
652162d4 SW |
149 | if (gpio_range) { |
150 | desc->gpio_owner = NULL; | |
151 | } else { | |
152 | desc->mux_usecount--; | |
153 | if (!desc->mux_usecount) | |
154 | desc->mux_owner = NULL; | |
155 | } | |
0e3db173 | 156 | } |
2744e8af LW |
157 | out: |
158 | if (status) | |
51cd24ee | 159 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
3cc70ed3 | 160 | pin, owner, status); |
2744e8af LW |
161 | |
162 | return status; | |
163 | } | |
164 | ||
165 | /** | |
166 | * pin_free() - release a single muxed in pin so something else can be muxed | |
167 | * @pctldev: pin controller device handling this pin | |
168 | * @pin: the pin to free | |
3712a3c4 SW |
169 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
170 | * single GPIO pin | |
336cdba0 | 171 | * |
3cc70ed3 SW |
172 | * This function returns a pointer to the previous owner. This is used |
173 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 174 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 175 | */ |
3712a3c4 SW |
176 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
177 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
178 | { |
179 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
180 | struct pin_desc *desc; | |
3cc70ed3 | 181 | const char *owner; |
2744e8af LW |
182 | |
183 | desc = pin_desc_get(pctldev, pin); | |
184 | if (desc == NULL) { | |
51cd24ee | 185 | dev_err(pctldev->dev, |
2744e8af | 186 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 187 | return NULL; |
2744e8af LW |
188 | } |
189 | ||
652162d4 SW |
190 | if (!gpio_range) { |
191 | desc->mux_usecount--; | |
192 | if (desc->mux_usecount) | |
193 | return NULL; | |
194 | } | |
0e3db173 | 195 | |
3712a3c4 SW |
196 | /* |
197 | * If there is no kind of request function for the pin we just assume | |
198 | * we got it by default and proceed. | |
199 | */ | |
200 | if (gpio_range && ops->gpio_disable_free) | |
201 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
202 | else if (ops->free) | |
2744e8af LW |
203 | ops->free(pctldev, pin); |
204 | ||
652162d4 SW |
205 | if (gpio_range) { |
206 | owner = desc->gpio_owner; | |
207 | desc->gpio_owner = NULL; | |
208 | } else { | |
209 | owner = desc->mux_owner; | |
210 | desc->mux_owner = NULL; | |
211 | desc->mux_setting = NULL; | |
212 | } | |
213 | ||
2744e8af | 214 | module_put(pctldev->owner); |
3712a3c4 | 215 | |
3cc70ed3 | 216 | return owner; |
2744e8af LW |
217 | } |
218 | ||
219 | /** | |
befe5bdf LW |
220 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
221 | * @pctldev: pin controller device affected | |
222 | * @pin: the pin to mux in for GPIO | |
223 | * @range: the applicable GPIO range | |
2744e8af | 224 | */ |
befe5bdf LW |
225 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
226 | struct pinctrl_gpio_range *range, | |
227 | unsigned pin, unsigned gpio) | |
2744e8af LW |
228 | { |
229 | char gpiostr[16]; | |
3cc70ed3 | 230 | const char *owner; |
2744e8af | 231 | int ret; |
2744e8af LW |
232 | |
233 | /* Conjure some name stating what chip and pin this is taken by */ | |
234 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
235 | ||
3cc70ed3 SW |
236 | owner = kstrdup(gpiostr, GFP_KERNEL); |
237 | if (!owner) | |
5d2eaf80 SW |
238 | return -EINVAL; |
239 | ||
3cc70ed3 | 240 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 241 | if (ret < 0) |
3cc70ed3 | 242 | kfree(owner); |
5d2eaf80 SW |
243 | |
244 | return ret; | |
2744e8af | 245 | } |
2744e8af LW |
246 | |
247 | /** | |
befe5bdf LW |
248 | * pinmux_free_gpio() - release a pin from GPIO muxing |
249 | * @pctldev: the pin controller device for the pin | |
250 | * @pin: the affected currently GPIO-muxed in pin | |
251 | * @range: applicable GPIO range | |
2744e8af | 252 | */ |
befe5bdf LW |
253 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
254 | struct pinctrl_gpio_range *range) | |
2744e8af | 255 | { |
3cc70ed3 | 256 | const char *owner; |
2744e8af | 257 | |
3cc70ed3 SW |
258 | owner = pin_free(pctldev, pin, range); |
259 | kfree(owner); | |
2744e8af | 260 | } |
2744e8af | 261 | |
befe5bdf LW |
262 | /** |
263 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
264 | * @pctldev: the pin controller handling this pin | |
265 | * @range: applicable GPIO range | |
266 | * @pin: the affected GPIO pin in this controller | |
267 | * @input: true if we set the pin as input, false for output | |
268 | */ | |
269 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
270 | struct pinctrl_gpio_range *range, | |
271 | unsigned pin, bool input) | |
542e704f | 272 | { |
542e704f LW |
273 | const struct pinmux_ops *ops; |
274 | int ret; | |
542e704f LW |
275 | |
276 | ops = pctldev->desc->pmxops; | |
277 | ||
542e704f LW |
278 | if (ops->gpio_set_direction) |
279 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
280 | else | |
281 | ret = 0; | |
282 | ||
283 | return ret; | |
284 | } | |
285 | ||
7ecdb16f SW |
286 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
287 | const char *function) | |
2744e8af LW |
288 | { |
289 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
290 | unsigned selector = 0; | |
291 | ||
292 | /* See if this pctldev has this function */ | |
293 | while (ops->list_functions(pctldev, selector) >= 0) { | |
294 | const char *fname = ops->get_function_name(pctldev, | |
295 | selector); | |
2744e8af | 296 | |
7ecdb16f SW |
297 | if (!strcmp(function, fname)) |
298 | return selector; | |
2744e8af | 299 | |
2744e8af LW |
300 | selector++; |
301 | } | |
302 | ||
303 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 304 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
305 | return -EINVAL; |
306 | } | |
307 | ||
7ecdb16f SW |
308 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
309 | struct pinctrl_setting *setting) | |
2744e8af | 310 | { |
7ecdb16f SW |
311 | struct pinctrl_dev *pctldev = setting->pctldev; |
312 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
313 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
314 | char const * const *groups; | |
315 | unsigned num_groups; | |
2744e8af | 316 | int ret; |
7ecdb16f SW |
317 | const char *group; |
318 | int i; | |
319 | const unsigned *pins; | |
320 | unsigned num_pins; | |
2744e8af | 321 | |
1e2082b5 SW |
322 | setting->data.mux.func = |
323 | pinmux_func_name_to_selector(pctldev, map->data.mux.function); | |
324 | if (setting->data.mux.func < 0) | |
325 | return setting->data.mux.func; | |
2744e8af | 326 | |
1e2082b5 | 327 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f SW |
328 | &groups, &num_groups); |
329 | if (ret < 0) | |
330 | return ret; | |
331 | if (!num_groups) | |
2744e8af | 332 | return -EINVAL; |
7ecdb16f | 333 | |
1e2082b5 | 334 | if (map->data.mux.group) { |
7ecdb16f | 335 | bool found = false; |
1e2082b5 | 336 | group = map->data.mux.group; |
7ecdb16f SW |
337 | for (i = 0; i < num_groups; i++) { |
338 | if (!strcmp(group, groups[i])) { | |
339 | found = true; | |
340 | break; | |
341 | } | |
342 | } | |
343 | if (!found) | |
344 | return -EINVAL; | |
345 | } else { | |
346 | group = groups[0]; | |
2744e8af | 347 | } |
2744e8af | 348 | |
1e2082b5 SW |
349 | setting->data.mux.group = pinctrl_get_group_selector(pctldev, group); |
350 | if (setting->data.mux.group < 0) | |
351 | return setting->data.mux.group; | |
2744e8af | 352 | |
1e2082b5 SW |
353 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
354 | &num_pins); | |
2744e8af | 355 | if (ret) { |
7ecdb16f SW |
356 | dev_err(pctldev->dev, |
357 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 358 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
359 | return -ENODEV; |
360 | } | |
361 | ||
362 | /* Try to allocate all pins in this group, one by one */ | |
363 | for (i = 0; i < num_pins; i++) { | |
364 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
365 | if (ret) { | |
366 | dev_err(pctldev->dev, | |
367 | "could not get request pin %d on device %s\n", | |
368 | pins[i], pinctrl_dev_get_name(pctldev)); | |
369 | /* On error release all taken pins */ | |
370 | i--; /* this pin just failed */ | |
371 | for (; i >= 0; i--) | |
372 | pin_free(pctldev, pins[i], NULL); | |
373 | return -ENODEV; | |
374 | } | |
2744e8af | 375 | } |
2744e8af LW |
376 | |
377 | return 0; | |
378 | } | |
379 | ||
7ecdb16f | 380 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 381 | { |
7ecdb16f SW |
382 | struct pinctrl_dev *pctldev = setting->pctldev; |
383 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
384 | const unsigned *pins; | |
385 | unsigned num_pins; | |
befe5bdf | 386 | int ret; |
7ecdb16f | 387 | int i; |
2744e8af | 388 | |
1e2082b5 | 389 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 390 | &pins, &num_pins); |
befe5bdf | 391 | if (ret) { |
7ecdb16f SW |
392 | dev_err(pctldev->dev, |
393 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 394 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 395 | return; |
2744e8af LW |
396 | } |
397 | ||
7ecdb16f SW |
398 | for (i = 0; i < num_pins; i++) |
399 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 400 | } |
2744e8af | 401 | |
7ecdb16f | 402 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 403 | { |
7ecdb16f | 404 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 405 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 406 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
407 | int ret; |
408 | const unsigned *pins; | |
409 | unsigned num_pins; | |
410 | int i; | |
411 | struct pin_desc *desc; | |
412 | ||
413 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
414 | &pins, &num_pins); | |
415 | if (ret) { | |
416 | /* errors only affect debug data, so just warn */ | |
417 | dev_warn(pctldev->dev, | |
418 | "could not get pins for group selector %d\n", | |
419 | setting->data.mux.group); | |
420 | num_pins = 0; | |
421 | } | |
422 | ||
423 | for (i = 0; i < num_pins; i++) { | |
424 | desc = pin_desc_get(pctldev, pins[i]); | |
425 | if (desc == NULL) { | |
426 | dev_warn(pctldev->dev, | |
427 | "could not get pin desc for pin %d\n", | |
428 | pins[i]); | |
429 | continue; | |
430 | } | |
431 | desc->mux_setting = &(setting->data.mux); | |
432 | } | |
2744e8af | 433 | |
1e2082b5 SW |
434 | return ops->enable(pctldev, setting->data.mux.func, |
435 | setting->data.mux.group); | |
2744e8af | 436 | } |
2744e8af | 437 | |
7ecdb16f | 438 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 439 | { |
7ecdb16f | 440 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 441 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 442 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
443 | int ret; |
444 | const unsigned *pins; | |
445 | unsigned num_pins; | |
446 | int i; | |
447 | struct pin_desc *desc; | |
448 | ||
449 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
450 | &pins, &num_pins); | |
451 | if (ret) { | |
452 | /* errors only affect debug data, so just warn */ | |
453 | dev_warn(pctldev->dev, | |
454 | "could not get pins for group selector %d\n", | |
455 | setting->data.mux.group); | |
456 | num_pins = 0; | |
457 | } | |
458 | ||
459 | for (i = 0; i < num_pins; i++) { | |
460 | desc = pin_desc_get(pctldev, pins[i]); | |
461 | if (desc == NULL) { | |
462 | dev_warn(pctldev->dev, | |
463 | "could not get pin desc for pin %d\n", | |
464 | pins[i]); | |
465 | continue; | |
466 | } | |
467 | desc->mux_setting = NULL; | |
468 | } | |
2744e8af | 469 | |
1e2082b5 | 470 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); |
2744e8af | 471 | } |
2744e8af | 472 | |
2744e8af LW |
473 | #ifdef CONFIG_DEBUG_FS |
474 | ||
475 | /* Called from pincontrol core */ | |
476 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
477 | { | |
478 | struct pinctrl_dev *pctldev = s->private; | |
479 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
480 | unsigned func_selector = 0; | |
481 | ||
57b676f9 SW |
482 | mutex_lock(&pinctrl_mutex); |
483 | ||
2744e8af LW |
484 | while (pmxops->list_functions(pctldev, func_selector) >= 0) { |
485 | const char *func = pmxops->get_function_name(pctldev, | |
486 | func_selector); | |
487 | const char * const *groups; | |
488 | unsigned num_groups; | |
489 | int ret; | |
490 | int i; | |
491 | ||
492 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
493 | &groups, &num_groups); | |
494 | if (ret) | |
495 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
496 | func); | |
497 | ||
498 | seq_printf(s, "function: %s, groups = [ ", func); | |
499 | for (i = 0; i < num_groups; i++) | |
500 | seq_printf(s, "%s ", groups[i]); | |
501 | seq_puts(s, "]\n"); | |
502 | ||
503 | func_selector++; | |
2744e8af LW |
504 | } |
505 | ||
57b676f9 SW |
506 | mutex_unlock(&pinctrl_mutex); |
507 | ||
2744e8af LW |
508 | return 0; |
509 | } | |
510 | ||
511 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
512 | { | |
513 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
514 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
515 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 516 | unsigned i, pin; |
2744e8af LW |
517 | |
518 | seq_puts(s, "Pinmux settings per pin\n"); | |
652162d4 | 519 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 520 | |
57b676f9 SW |
521 | mutex_lock(&pinctrl_mutex); |
522 | ||
706e8520 CP |
523 | /* The pin number can be retrived from the pin controller descriptor */ |
524 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 525 | struct pin_desc *desc; |
1cf94c45 | 526 | bool is_hog = false; |
2744e8af | 527 | |
706e8520 | 528 | pin = pctldev->desc->pins[i].number; |
2744e8af | 529 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 530 | /* Skip if we cannot search the pin */ |
2744e8af LW |
531 | if (desc == NULL) |
532 | continue; | |
533 | ||
652162d4 SW |
534 | if (desc->mux_owner && |
535 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
536 | is_hog = true; |
537 | ||
652162d4 | 538 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 539 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
540 | desc->mux_owner ? desc->mux_owner |
541 | : "(MUX UNCLAIMED)", | |
542 | desc->gpio_owner ? desc->gpio_owner | |
543 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 544 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
545 | |
546 | if (desc->mux_setting) | |
547 | seq_printf(s, " function %s group %s\n", | |
548 | pmxops->get_function_name(pctldev, | |
549 | desc->mux_setting->func), | |
550 | pctlops->get_group_name(pctldev, | |
551 | desc->mux_setting->group)); | |
552 | else | |
553 | seq_printf(s, "\n"); | |
2744e8af LW |
554 | } |
555 | ||
57b676f9 SW |
556 | mutex_unlock(&pinctrl_mutex); |
557 | ||
2744e8af LW |
558 | return 0; |
559 | } | |
560 | ||
1e2082b5 SW |
561 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
562 | { | |
563 | seq_printf(s, "group %s\nfunction %s\n", | |
564 | map->data.mux.group ? map->data.mux.group : "(default)", | |
565 | map->data.mux.function); | |
566 | } | |
567 | ||
568 | void pinmux_show_setting(struct seq_file *s, | |
569 | struct pinctrl_setting const *setting) | |
2744e8af | 570 | { |
7ecdb16f SW |
571 | struct pinctrl_dev *pctldev = setting->pctldev; |
572 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
573 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
574 | ||
1e2082b5 SW |
575 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
576 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
577 | setting->data.mux.group, | |
578 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
579 | setting->data.mux.func); | |
2744e8af LW |
580 | } |
581 | ||
582 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
583 | { | |
584 | return single_open(file, pinmux_functions_show, inode->i_private); | |
585 | } | |
586 | ||
587 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
588 | { | |
589 | return single_open(file, pinmux_pins_show, inode->i_private); | |
590 | } | |
591 | ||
2744e8af LW |
592 | static const struct file_operations pinmux_functions_ops = { |
593 | .open = pinmux_functions_open, | |
594 | .read = seq_read, | |
595 | .llseek = seq_lseek, | |
596 | .release = single_release, | |
597 | }; | |
598 | ||
599 | static const struct file_operations pinmux_pins_ops = { | |
600 | .open = pinmux_pins_open, | |
601 | .read = seq_read, | |
602 | .llseek = seq_lseek, | |
603 | .release = single_release, | |
604 | }; | |
605 | ||
2744e8af LW |
606 | void pinmux_init_device_debugfs(struct dentry *devroot, |
607 | struct pinctrl_dev *pctldev) | |
608 | { | |
609 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
610 | devroot, pctldev, &pinmux_functions_ops); | |
611 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
612 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
613 | } |
614 | ||
615 | #endif /* CONFIG_DEBUG_FS */ |