Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/debugfs.h> |
26 | #include <linux/seq_file.h> | |
27 | #include <linux/pinctrl/machine.h> | |
28 | #include <linux/pinctrl/pinmux.h> | |
29 | #include "core.h" | |
befe5bdf | 30 | #include "pinmux.h" |
2744e8af | 31 | |
03665e0f SW |
32 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
33 | { | |
34 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 35 | unsigned nfuncs; |
03665e0f SW |
36 | unsigned selector = 0; |
37 | ||
38 | /* Check that we implement required operations */ | |
a1d31f71 DA |
39 | if (!ops || |
40 | !ops->get_functions_count || | |
03665e0f SW |
41 | !ops->get_function_name || |
42 | !ops->get_function_groups || | |
03e9f0ca | 43 | !ops->set_mux) { |
ad6e1107 | 44 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 45 | return -EINVAL; |
ad6e1107 | 46 | } |
03665e0f | 47 | /* Check that all functions registered have names */ |
a1d31f71 | 48 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 49 | while (selector < nfuncs) { |
03665e0f SW |
50 | const char *fname = ops->get_function_name(pctldev, |
51 | selector); | |
52 | if (!fname) { | |
a1d31f71 | 53 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
54 | selector); |
55 | return -EINVAL; | |
56 | } | |
57 | selector++; | |
58 | } | |
59 | ||
60 | return 0; | |
61 | } | |
62 | ||
3f713b7c | 63 | int pinmux_validate_map(const struct pinctrl_map *map, int i) |
1e2082b5 SW |
64 | { |
65 | if (!map->data.mux.function) { | |
66 | pr_err("failed to register map %s (%d): no function given\n", | |
67 | map->name, i); | |
68 | return -EINVAL; | |
69 | } | |
70 | ||
71 | return 0; | |
72 | } | |
73 | ||
2744e8af LW |
74 | /** |
75 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
76 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
77 | * @owner: a representation of the owner of this pin; typically the device |
78 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
79 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
80 | * single GPIO pin | |
81 | */ | |
82 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 83 | int pin, const char *owner, |
2744e8af LW |
84 | struct pinctrl_gpio_range *gpio_range) |
85 | { | |
86 | struct pin_desc *desc; | |
87 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
88 | int status = -EINVAL; | |
89 | ||
2744e8af LW |
90 | desc = pin_desc_get(pctldev, pin); |
91 | if (desc == NULL) { | |
51cd24ee | 92 | dev_err(pctldev->dev, |
d4705316 SW |
93 | "pin %d is not registered so it cannot be requested\n", |
94 | pin); | |
2744e8af LW |
95 | goto out; |
96 | } | |
97 | ||
d0bd8df5 DA |
98 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
99 | pin, desc->name, owner); | |
100 | ||
b1eb8fab VZ |
101 | if ((!gpio_range || ops->strict) && |
102 | desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
103 | dev_err(pctldev->dev, | |
104 | "pin %s already requested by %s; cannot claim for %s\n", | |
105 | desc->name, desc->mux_owner, owner); | |
106 | goto out; | |
107 | } | |
108 | ||
109 | if ((gpio_range || ops->strict) && desc->gpio_owner) { | |
110 | dev_err(pctldev->dev, | |
111 | "pin %s already requested by %s; cannot claim for %s\n", | |
112 | desc->name, desc->gpio_owner, owner); | |
113 | goto out; | |
114 | } | |
0e3db173 | 115 | |
b1eb8fab | 116 | if (gpio_range) { |
652162d4 SW |
117 | desc->gpio_owner = owner; |
118 | } else { | |
652162d4 SW |
119 | desc->mux_usecount++; |
120 | if (desc->mux_usecount > 1) | |
121 | return 0; | |
122 | ||
123 | desc->mux_owner = owner; | |
124 | } | |
2744e8af LW |
125 | |
126 | /* Let each pin increase references to this module */ | |
127 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 128 | dev_err(pctldev->dev, |
2744e8af LW |
129 | "could not increase module refcount for pin %d\n", |
130 | pin); | |
131 | status = -EINVAL; | |
132 | goto out_free_pin; | |
133 | } | |
134 | ||
135 | /* | |
136 | * If there is no kind of request function for the pin we just assume | |
137 | * we got it by default and proceed. | |
138 | */ | |
3712a3c4 | 139 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
140 | /* This requests and enables a single GPIO pin */ |
141 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
142 | else if (ops->request) | |
143 | status = ops->request(pctldev, pin); | |
144 | else | |
145 | status = 0; | |
146 | ||
0e3db173 | 147 | if (status) { |
d4705316 | 148 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
149 | module_put(pctldev->owner); |
150 | } | |
151 | ||
2744e8af | 152 | out_free_pin: |
0e3db173 | 153 | if (status) { |
652162d4 SW |
154 | if (gpio_range) { |
155 | desc->gpio_owner = NULL; | |
156 | } else { | |
157 | desc->mux_usecount--; | |
158 | if (!desc->mux_usecount) | |
159 | desc->mux_owner = NULL; | |
160 | } | |
0e3db173 | 161 | } |
2744e8af LW |
162 | out: |
163 | if (status) | |
51cd24ee | 164 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 165 | pin, owner, status); |
2744e8af LW |
166 | |
167 | return status; | |
168 | } | |
169 | ||
170 | /** | |
171 | * pin_free() - release a single muxed in pin so something else can be muxed | |
172 | * @pctldev: pin controller device handling this pin | |
173 | * @pin: the pin to free | |
3712a3c4 SW |
174 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
175 | * single GPIO pin | |
336cdba0 | 176 | * |
3cc70ed3 SW |
177 | * This function returns a pointer to the previous owner. This is used |
178 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 179 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 180 | */ |
3712a3c4 SW |
181 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
182 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
183 | { |
184 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
185 | struct pin_desc *desc; | |
3cc70ed3 | 186 | const char *owner; |
2744e8af LW |
187 | |
188 | desc = pin_desc_get(pctldev, pin); | |
189 | if (desc == NULL) { | |
51cd24ee | 190 | dev_err(pctldev->dev, |
2744e8af | 191 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 192 | return NULL; |
2744e8af LW |
193 | } |
194 | ||
652162d4 | 195 | if (!gpio_range) { |
740924a2 RG |
196 | /* |
197 | * A pin should not be freed more times than allocated. | |
198 | */ | |
199 | if (WARN_ON(!desc->mux_usecount)) | |
200 | return NULL; | |
652162d4 SW |
201 | desc->mux_usecount--; |
202 | if (desc->mux_usecount) | |
203 | return NULL; | |
204 | } | |
0e3db173 | 205 | |
3712a3c4 SW |
206 | /* |
207 | * If there is no kind of request function for the pin we just assume | |
208 | * we got it by default and proceed. | |
209 | */ | |
210 | if (gpio_range && ops->gpio_disable_free) | |
211 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
212 | else if (ops->free) | |
2744e8af LW |
213 | ops->free(pctldev, pin); |
214 | ||
652162d4 SW |
215 | if (gpio_range) { |
216 | owner = desc->gpio_owner; | |
217 | desc->gpio_owner = NULL; | |
218 | } else { | |
219 | owner = desc->mux_owner; | |
220 | desc->mux_owner = NULL; | |
221 | desc->mux_setting = NULL; | |
222 | } | |
223 | ||
2744e8af | 224 | module_put(pctldev->owner); |
3712a3c4 | 225 | |
3cc70ed3 | 226 | return owner; |
2744e8af LW |
227 | } |
228 | ||
229 | /** | |
befe5bdf LW |
230 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
231 | * @pctldev: pin controller device affected | |
232 | * @pin: the pin to mux in for GPIO | |
233 | * @range: the applicable GPIO range | |
2744e8af | 234 | */ |
befe5bdf LW |
235 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
236 | struct pinctrl_gpio_range *range, | |
237 | unsigned pin, unsigned gpio) | |
2744e8af | 238 | { |
3cc70ed3 | 239 | const char *owner; |
2744e8af | 240 | int ret; |
2744e8af LW |
241 | |
242 | /* Conjure some name stating what chip and pin this is taken by */ | |
23a895ae | 243 | owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); |
3cc70ed3 | 244 | if (!owner) |
1fb1f054 | 245 | return -ENOMEM; |
5d2eaf80 | 246 | |
3cc70ed3 | 247 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 248 | if (ret < 0) |
3cc70ed3 | 249 | kfree(owner); |
5d2eaf80 SW |
250 | |
251 | return ret; | |
2744e8af | 252 | } |
2744e8af LW |
253 | |
254 | /** | |
befe5bdf LW |
255 | * pinmux_free_gpio() - release a pin from GPIO muxing |
256 | * @pctldev: the pin controller device for the pin | |
257 | * @pin: the affected currently GPIO-muxed in pin | |
258 | * @range: applicable GPIO range | |
2744e8af | 259 | */ |
befe5bdf LW |
260 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
261 | struct pinctrl_gpio_range *range) | |
2744e8af | 262 | { |
3cc70ed3 | 263 | const char *owner; |
2744e8af | 264 | |
3cc70ed3 SW |
265 | owner = pin_free(pctldev, pin, range); |
266 | kfree(owner); | |
2744e8af | 267 | } |
2744e8af | 268 | |
befe5bdf LW |
269 | /** |
270 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
271 | * @pctldev: the pin controller handling this pin | |
272 | * @range: applicable GPIO range | |
273 | * @pin: the affected GPIO pin in this controller | |
274 | * @input: true if we set the pin as input, false for output | |
275 | */ | |
276 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
277 | struct pinctrl_gpio_range *range, | |
278 | unsigned pin, bool input) | |
542e704f | 279 | { |
542e704f LW |
280 | const struct pinmux_ops *ops; |
281 | int ret; | |
542e704f LW |
282 | |
283 | ops = pctldev->desc->pmxops; | |
284 | ||
542e704f LW |
285 | if (ops->gpio_set_direction) |
286 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
287 | else | |
288 | ret = 0; | |
289 | ||
290 | return ret; | |
291 | } | |
292 | ||
7ecdb16f SW |
293 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
294 | const char *function) | |
2744e8af LW |
295 | { |
296 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 297 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
298 | unsigned selector = 0; |
299 | ||
300 | /* See if this pctldev has this function */ | |
d1e90e9e | 301 | while (selector < nfuncs) { |
163dc9f3 | 302 | const char *fname = ops->get_function_name(pctldev, selector); |
2744e8af | 303 | |
7ecdb16f SW |
304 | if (!strcmp(function, fname)) |
305 | return selector; | |
2744e8af | 306 | |
2744e8af LW |
307 | selector++; |
308 | } | |
309 | ||
2744e8af LW |
310 | return -EINVAL; |
311 | } | |
312 | ||
3f713b7c | 313 | int pinmux_map_to_setting(const struct pinctrl_map *map, |
7ecdb16f | 314 | struct pinctrl_setting *setting) |
2744e8af | 315 | { |
7ecdb16f SW |
316 | struct pinctrl_dev *pctldev = setting->pctldev; |
317 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
7ecdb16f SW |
318 | char const * const *groups; |
319 | unsigned num_groups; | |
2744e8af | 320 | int ret; |
7ecdb16f | 321 | const char *group; |
2744e8af | 322 | |
ad8bb720 DA |
323 | if (!pmxops) { |
324 | dev_err(pctldev->dev, "does not support mux function\n"); | |
325 | return -EINVAL; | |
326 | } | |
327 | ||
15f70e1b | 328 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
329 | if (ret < 0) { |
330 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
331 | map->data.mux.function); | |
15f70e1b | 332 | return ret; |
ad6e1107 | 333 | } |
15f70e1b | 334 | setting->data.mux.func = ret; |
2744e8af | 335 | |
1e2082b5 | 336 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 337 | &groups, &num_groups); |
ad6e1107 JC |
338 | if (ret < 0) { |
339 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
340 | map->data.mux.function); | |
7ecdb16f | 341 | return ret; |
ad6e1107 JC |
342 | } |
343 | if (!num_groups) { | |
344 | dev_err(pctldev->dev, | |
345 | "function %s can't be selected on any group\n", | |
346 | map->data.mux.function); | |
2744e8af | 347 | return -EINVAL; |
ad6e1107 | 348 | } |
1e2082b5 | 349 | if (map->data.mux.group) { |
1e2082b5 | 350 | group = map->data.mux.group; |
dff43594 AS |
351 | ret = match_string(groups, num_groups, group); |
352 | if (ret < 0) { | |
ad6e1107 JC |
353 | dev_err(pctldev->dev, |
354 | "invalid group \"%s\" for function \"%s\"\n", | |
355 | group, map->data.mux.function); | |
dff43594 | 356 | return ret; |
ad6e1107 | 357 | } |
7ecdb16f SW |
358 | } else { |
359 | group = groups[0]; | |
2744e8af | 360 | } |
2744e8af | 361 | |
15f70e1b | 362 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
363 | if (ret < 0) { |
364 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
365 | map->data.mux.group); | |
15f70e1b | 366 | return ret; |
ad6e1107 | 367 | } |
15f70e1b | 368 | setting->data.mux.group = ret; |
2744e8af | 369 | |
2744e8af LW |
370 | return 0; |
371 | } | |
372 | ||
3f713b7c | 373 | void pinmux_free_setting(const struct pinctrl_setting *setting) |
2744e8af | 374 | { |
1a78958d | 375 | /* This function is currently unused */ |
2744e8af | 376 | } |
2744e8af | 377 | |
3f713b7c | 378 | int pinmux_enable_setting(const struct pinctrl_setting *setting) |
2744e8af | 379 | { |
7ecdb16f | 380 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 381 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 382 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
e5b3b2d9 AT |
383 | int ret = 0; |
384 | const unsigned *pins = NULL; | |
385 | unsigned num_pins = 0; | |
ba110d90 SW |
386 | int i; |
387 | struct pin_desc *desc; | |
388 | ||
e5b3b2d9 AT |
389 | if (pctlops->get_group_pins) |
390 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
391 | &pins, &num_pins); | |
392 | ||
ba110d90 | 393 | if (ret) { |
1c8e7944 LW |
394 | const char *gname; |
395 | ||
ba110d90 | 396 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
397 | gname = pctlops->get_group_name(pctldev, |
398 | setting->data.mux.group); | |
ba110d90 | 399 | dev_warn(pctldev->dev, |
1c8e7944 LW |
400 | "could not get pins for group %s\n", |
401 | gname); | |
ba110d90 SW |
402 | num_pins = 0; |
403 | } | |
404 | ||
1a78958d LW |
405 | /* Try to allocate all pins in this group, one by one */ |
406 | for (i = 0; i < num_pins; i++) { | |
407 | ret = pin_request(pctldev, pins[i], setting->dev_name, NULL); | |
408 | if (ret) { | |
1c8e7944 LW |
409 | const char *gname; |
410 | const char *pname; | |
411 | ||
412 | desc = pin_desc_get(pctldev, pins[i]); | |
413 | pname = desc ? desc->name : "non-existing"; | |
414 | gname = pctlops->get_group_name(pctldev, | |
415 | setting->data.mux.group); | |
1a78958d | 416 | dev_err(pctldev->dev, |
1c8e7944 LW |
417 | "could not request pin %d (%s) from group %s " |
418 | " on device %s\n", | |
419 | pins[i], pname, gname, | |
420 | pinctrl_dev_get_name(pctldev)); | |
e38d457d | 421 | goto err_pin_request; |
1a78958d LW |
422 | } |
423 | } | |
424 | ||
425 | /* Now that we have acquired the pins, encode the mux setting */ | |
ba110d90 SW |
426 | for (i = 0; i < num_pins; i++) { |
427 | desc = pin_desc_get(pctldev, pins[i]); | |
428 | if (desc == NULL) { | |
429 | dev_warn(pctldev->dev, | |
430 | "could not get pin desc for pin %d\n", | |
431 | pins[i]); | |
432 | continue; | |
433 | } | |
434 | desc->mux_setting = &(setting->data.mux); | |
435 | } | |
2744e8af | 436 | |
03e9f0ca LW |
437 | ret = ops->set_mux(pctldev, setting->data.mux.func, |
438 | setting->data.mux.group); | |
e38d457d AL |
439 | |
440 | if (ret) | |
03e9f0ca | 441 | goto err_set_mux; |
e38d457d AL |
442 | |
443 | return 0; | |
444 | ||
03e9f0ca | 445 | err_set_mux: |
e38d457d AL |
446 | for (i = 0; i < num_pins; i++) { |
447 | desc = pin_desc_get(pctldev, pins[i]); | |
448 | if (desc) | |
449 | desc->mux_setting = NULL; | |
450 | } | |
451 | err_pin_request: | |
452 | /* On error release all taken pins */ | |
453 | while (--i >= 0) | |
454 | pin_free(pctldev, pins[i], NULL); | |
455 | ||
456 | return ret; | |
2744e8af | 457 | } |
2744e8af | 458 | |
3f713b7c | 459 | void pinmux_disable_setting(const struct pinctrl_setting *setting) |
2744e8af | 460 | { |
7ecdb16f | 461 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 462 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
e5b3b2d9 AT |
463 | int ret = 0; |
464 | const unsigned *pins = NULL; | |
465 | unsigned num_pins = 0; | |
ba110d90 SW |
466 | int i; |
467 | struct pin_desc *desc; | |
468 | ||
e5b3b2d9 AT |
469 | if (pctlops->get_group_pins) |
470 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
471 | &pins, &num_pins); | |
ba110d90 | 472 | if (ret) { |
1c8e7944 LW |
473 | const char *gname; |
474 | ||
ba110d90 | 475 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
476 | gname = pctlops->get_group_name(pctldev, |
477 | setting->data.mux.group); | |
ba110d90 | 478 | dev_warn(pctldev->dev, |
1c8e7944 LW |
479 | "could not get pins for group %s\n", |
480 | gname); | |
ba110d90 SW |
481 | num_pins = 0; |
482 | } | |
483 | ||
1a78958d | 484 | /* Flag the descs that no setting is active */ |
ba110d90 SW |
485 | for (i = 0; i < num_pins; i++) { |
486 | desc = pin_desc_get(pctldev, pins[i]); | |
487 | if (desc == NULL) { | |
488 | dev_warn(pctldev->dev, | |
489 | "could not get pin desc for pin %d\n", | |
490 | pins[i]); | |
491 | continue; | |
492 | } | |
744f0a9a | 493 | if (desc->mux_setting == &(setting->data.mux)) { |
744f0a9a | 494 | pin_free(pctldev, pins[i], NULL); |
1c8e7944 LW |
495 | } else { |
496 | const char *gname; | |
1c8e7944 | 497 | |
1c8e7944 LW |
498 | gname = pctlops->get_group_name(pctldev, |
499 | setting->data.mux.group); | |
500 | dev_warn(pctldev->dev, | |
501 | "not freeing pin %d (%s) as part of " | |
502 | "deactivating group %s - it is already " | |
503 | "used for some other setting", | |
808e657c | 504 | pins[i], desc->name, gname); |
744f0a9a | 505 | } |
ba110d90 | 506 | } |
2744e8af | 507 | } |
2744e8af | 508 | |
2744e8af LW |
509 | #ifdef CONFIG_DEBUG_FS |
510 | ||
511 | /* Called from pincontrol core */ | |
512 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
513 | { | |
514 | struct pinctrl_dev *pctldev = s->private; | |
515 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 516 | unsigned nfuncs; |
2744e8af LW |
517 | unsigned func_selector = 0; |
518 | ||
ad8bb720 DA |
519 | if (!pmxops) |
520 | return 0; | |
57b676f9 | 521 | |
42fed7ba | 522 | mutex_lock(&pctldev->mutex); |
ad8bb720 | 523 | nfuncs = pmxops->get_functions_count(pctldev); |
d1e90e9e | 524 | while (func_selector < nfuncs) { |
2744e8af LW |
525 | const char *func = pmxops->get_function_name(pctldev, |
526 | func_selector); | |
527 | const char * const *groups; | |
528 | unsigned num_groups; | |
529 | int ret; | |
530 | int i; | |
531 | ||
532 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
533 | &groups, &num_groups); | |
9d7ebbbf | 534 | if (ret) { |
2744e8af LW |
535 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", |
536 | func); | |
9d7ebbbf LD |
537 | func_selector++; |
538 | continue; | |
539 | } | |
2744e8af LW |
540 | |
541 | seq_printf(s, "function: %s, groups = [ ", func); | |
542 | for (i = 0; i < num_groups; i++) | |
543 | seq_printf(s, "%s ", groups[i]); | |
544 | seq_puts(s, "]\n"); | |
545 | ||
546 | func_selector++; | |
2744e8af LW |
547 | } |
548 | ||
42fed7ba | 549 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 550 | |
2744e8af LW |
551 | return 0; |
552 | } | |
553 | ||
554 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
555 | { | |
556 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
557 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
558 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 559 | unsigned i, pin; |
2744e8af | 560 | |
ad8bb720 DA |
561 | if (!pmxops) |
562 | return 0; | |
563 | ||
2744e8af | 564 | seq_puts(s, "Pinmux settings per pin\n"); |
81508855 LW |
565 | if (pmxops->strict) |
566 | seq_puts(s, | |
567 | "Format: pin (name): mux_owner|gpio_owner (strict) hog?\n"); | |
568 | else | |
569 | seq_puts(s, | |
570 | "Format: pin (name): mux_owner gpio_owner hog?\n"); | |
2744e8af | 571 | |
42fed7ba | 572 | mutex_lock(&pctldev->mutex); |
57b676f9 | 573 | |
706e8520 CP |
574 | /* The pin number can be retrived from the pin controller descriptor */ |
575 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 576 | struct pin_desc *desc; |
1cf94c45 | 577 | bool is_hog = false; |
2744e8af | 578 | |
706e8520 | 579 | pin = pctldev->desc->pins[i].number; |
2744e8af | 580 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 581 | /* Skip if we cannot search the pin */ |
2744e8af LW |
582 | if (desc == NULL) |
583 | continue; | |
584 | ||
652162d4 SW |
585 | if (desc->mux_owner && |
586 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
587 | is_hog = true; |
588 | ||
81508855 LW |
589 | if (pmxops->strict) { |
590 | if (desc->mux_owner) | |
591 | seq_printf(s, "pin %d (%s): device %s%s", | |
cf9d994d | 592 | pin, desc->name, desc->mux_owner, |
81508855 LW |
593 | is_hog ? " (HOG)" : ""); |
594 | else if (desc->gpio_owner) | |
595 | seq_printf(s, "pin %d (%s): GPIO %s", | |
cf9d994d | 596 | pin, desc->name, desc->gpio_owner); |
81508855 LW |
597 | else |
598 | seq_printf(s, "pin %d (%s): UNCLAIMED", | |
cf9d994d | 599 | pin, desc->name); |
81508855 LW |
600 | } else { |
601 | /* For non-strict controllers */ | |
cf9d994d | 602 | seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, |
81508855 LW |
603 | desc->mux_owner ? desc->mux_owner |
604 | : "(MUX UNCLAIMED)", | |
605 | desc->gpio_owner ? desc->gpio_owner | |
606 | : "(GPIO UNCLAIMED)", | |
607 | is_hog ? " (HOG)" : ""); | |
608 | } | |
ba110d90 | 609 | |
81508855 | 610 | /* If mux: print function+group claiming the pin */ |
ba110d90 SW |
611 | if (desc->mux_setting) |
612 | seq_printf(s, " function %s group %s\n", | |
613 | pmxops->get_function_name(pctldev, | |
614 | desc->mux_setting->func), | |
615 | pctlops->get_group_name(pctldev, | |
616 | desc->mux_setting->group)); | |
617 | else | |
ffd10c2e | 618 | seq_putc(s, '\n'); |
2744e8af LW |
619 | } |
620 | ||
42fed7ba | 621 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 622 | |
2744e8af LW |
623 | return 0; |
624 | } | |
625 | ||
3f713b7c | 626 | void pinmux_show_map(struct seq_file *s, const struct pinctrl_map *map) |
1e2082b5 SW |
627 | { |
628 | seq_printf(s, "group %s\nfunction %s\n", | |
629 | map->data.mux.group ? map->data.mux.group : "(default)", | |
630 | map->data.mux.function); | |
631 | } | |
632 | ||
633 | void pinmux_show_setting(struct seq_file *s, | |
3f713b7c | 634 | const struct pinctrl_setting *setting) |
2744e8af | 635 | { |
7ecdb16f SW |
636 | struct pinctrl_dev *pctldev = setting->pctldev; |
637 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
638 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
639 | ||
1e2082b5 SW |
640 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
641 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
642 | setting->data.mux.group, | |
643 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
644 | setting->data.mux.func); | |
2744e8af LW |
645 | } |
646 | ||
0819dc72 YL |
647 | DEFINE_SHOW_ATTRIBUTE(pinmux_functions); |
648 | DEFINE_SHOW_ATTRIBUTE(pinmux_pins); | |
2744e8af | 649 | |
2744e8af LW |
650 | void pinmux_init_device_debugfs(struct dentry *devroot, |
651 | struct pinctrl_dev *pctldev) | |
652 | { | |
653 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
0819dc72 | 654 | devroot, pctldev, &pinmux_functions_fops); |
2744e8af | 655 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, |
0819dc72 | 656 | devroot, pctldev, &pinmux_pins_fops); |
2744e8af LW |
657 | } |
658 | ||
659 | #endif /* CONFIG_DEBUG_FS */ | |
a76edc89 TL |
660 | |
661 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
662 | ||
663 | /** | |
664 | * pinmux_generic_get_function_count() - returns number of functions | |
665 | * @pctldev: pin controller device | |
666 | */ | |
667 | int pinmux_generic_get_function_count(struct pinctrl_dev *pctldev) | |
668 | { | |
669 | return pctldev->num_functions; | |
670 | } | |
671 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_count); | |
672 | ||
673 | /** | |
674 | * pinmux_generic_get_function_name() - returns the function name | |
675 | * @pctldev: pin controller device | |
676 | * @selector: function number | |
677 | */ | |
678 | const char * | |
679 | pinmux_generic_get_function_name(struct pinctrl_dev *pctldev, | |
680 | unsigned int selector) | |
681 | { | |
682 | struct function_desc *function; | |
683 | ||
684 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
685 | selector); | |
686 | if (!function) | |
687 | return NULL; | |
688 | ||
689 | return function->name; | |
690 | } | |
691 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_name); | |
692 | ||
693 | /** | |
694 | * pinmux_generic_get_function_groups() - gets the function groups | |
695 | * @pctldev: pin controller device | |
696 | * @selector: function number | |
697 | * @groups: array of pin groups | |
698 | * @num_groups: number of pin groups | |
699 | */ | |
700 | int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, | |
701 | unsigned int selector, | |
702 | const char * const **groups, | |
703 | unsigned * const num_groups) | |
704 | { | |
705 | struct function_desc *function; | |
706 | ||
707 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
708 | selector); | |
709 | if (!function) { | |
710 | dev_err(pctldev->dev, "%s could not find function%i\n", | |
711 | __func__, selector); | |
712 | return -EINVAL; | |
713 | } | |
714 | *groups = function->group_names; | |
715 | *num_groups = function->num_group_names; | |
716 | ||
717 | return 0; | |
718 | } | |
719 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_groups); | |
720 | ||
721 | /** | |
722 | * pinmux_generic_get_function() - returns a function based on the number | |
723 | * @pctldev: pin controller device | |
724 | * @group_selector: function number | |
725 | */ | |
726 | struct function_desc *pinmux_generic_get_function(struct pinctrl_dev *pctldev, | |
727 | unsigned int selector) | |
728 | { | |
729 | struct function_desc *function; | |
730 | ||
731 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
732 | selector); | |
733 | if (!function) | |
734 | return NULL; | |
735 | ||
736 | return function; | |
737 | } | |
738 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function); | |
739 | ||
740 | /** | |
6bffa7e1 | 741 | * pinmux_generic_add_function() - adds a function group |
a76edc89 TL |
742 | * @pctldev: pin controller device |
743 | * @name: name of the function | |
744 | * @groups: array of pin groups | |
745 | * @num_groups: number of pin groups | |
746 | * @data: pin controller driver specific data | |
747 | */ | |
748 | int pinmux_generic_add_function(struct pinctrl_dev *pctldev, | |
749 | const char *name, | |
750 | const char **groups, | |
751 | const unsigned int num_groups, | |
752 | void *data) | |
753 | { | |
754 | struct function_desc *function; | |
f913cfce TL |
755 | int selector; |
756 | ||
757 | if (!name) | |
758 | return -EINVAL; | |
759 | ||
760 | selector = pinmux_func_name_to_selector(pctldev, name); | |
761 | if (selector >= 0) | |
762 | return selector; | |
763 | ||
764 | selector = pctldev->num_functions; | |
a76edc89 TL |
765 | |
766 | function = devm_kzalloc(pctldev->dev, sizeof(*function), GFP_KERNEL); | |
767 | if (!function) | |
768 | return -ENOMEM; | |
769 | ||
770 | function->name = name; | |
771 | function->group_names = groups; | |
772 | function->num_group_names = num_groups; | |
773 | function->data = data; | |
774 | ||
f913cfce | 775 | radix_tree_insert(&pctldev->pin_function_tree, selector, function); |
a76edc89 TL |
776 | |
777 | pctldev->num_functions++; | |
778 | ||
f913cfce | 779 | return selector; |
a76edc89 TL |
780 | } |
781 | EXPORT_SYMBOL_GPL(pinmux_generic_add_function); | |
782 | ||
783 | /** | |
784 | * pinmux_generic_remove_function() - removes a numbered function | |
785 | * @pctldev: pin controller device | |
786 | * @selector: function number | |
787 | * | |
788 | * Note that the caller must take care of locking. | |
789 | */ | |
790 | int pinmux_generic_remove_function(struct pinctrl_dev *pctldev, | |
791 | unsigned int selector) | |
792 | { | |
793 | struct function_desc *function; | |
794 | ||
795 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
796 | selector); | |
797 | if (!function) | |
798 | return -ENOENT; | |
799 | ||
800 | radix_tree_delete(&pctldev->pin_function_tree, selector); | |
801 | devm_kfree(pctldev->dev, function); | |
802 | ||
803 | pctldev->num_functions--; | |
804 | ||
805 | return 0; | |
806 | } | |
807 | EXPORT_SYMBOL_GPL(pinmux_generic_remove_function); | |
808 | ||
809 | /** | |
810 | * pinmux_generic_free_functions() - removes all functions | |
811 | * @pctldev: pin controller device | |
812 | * | |
664b7c47 TL |
813 | * Note that the caller must take care of locking. The pinctrl |
814 | * functions are allocated with devm_kzalloc() so no need to free | |
815 | * them here. | |
a76edc89 TL |
816 | */ |
817 | void pinmux_generic_free_functions(struct pinctrl_dev *pctldev) | |
818 | { | |
819 | struct radix_tree_iter iter; | |
906a2a39 | 820 | void __rcu **slot; |
a76edc89 TL |
821 | |
822 | radix_tree_for_each_slot(slot, &pctldev->pin_function_tree, &iter, 0) | |
664b7c47 | 823 | radix_tree_delete(&pctldev->pin_function_tree, iter.index); |
a76edc89 TL |
824 | |
825 | pctldev->num_functions = 0; | |
826 | } | |
827 | ||
828 | #endif /* CONFIG_GENERIC_PINMUX_FUNCTIONS */ |