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nbd: Fix debugfs_create_dir error checking
[linux-block.git] / drivers / pinctrl / pinctrl-zynqmp.c
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8b242ca7
SKP		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ZynqMP pin controller
4 *
fa99e701 5 * Copyright (C) 2020, 2021 Xilinx, Inc.
8b242ca7
SKP		 6 *
7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
8 * Rajan Vaja <rajan.vaja@xilinx.com>
9 */
10
11#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/of_address.h>
16#include <linux/platform_device.h>
e9d10adc 17
8b242ca7
SKP		 18#include <linux/firmware/xlnx-zynqmp.h>
19
8b242ca7 20#include <linux/pinctrl/pinconf-generic.h>
e9d10adc
AS		 21#include <linux/pinctrl/pinconf.h>
22#include <linux/pinctrl/pinctrl.h>
23#include <linux/pinctrl/pinmux.h>
8b242ca7
SKP		 24
25#include "core.h"
26#include "pinctrl-utils.h"
27
28#define ZYNQMP_PIN_PREFIX "MIO"
29#define PINCTRL_GET_FUNC_NAME_RESP_LEN 16
30#define MAX_FUNC_NAME_LEN 16
31#define MAX_GROUP_PIN 50
32#define MAX_PIN_GROUPS 50
33#define END_OF_FUNCTIONS "END_OF_FUNCTIONS"
34#define NUM_GROUPS_PER_RESP 6
35
36#define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12
37#define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12
38#define NA_GROUP 0xFFFF
39#define RESERVED_GROUP 0xFFFE
40
41#define DRIVE_STRENGTH_2MA 2
42#define DRIVE_STRENGTH_4MA 4
43#define DRIVE_STRENGTH_8MA 8
44#define DRIVE_STRENGTH_12MA 12
45
46/**
47 * struct zynqmp_pmux_function - a pinmux function
48 * @name: Name of the pin mux function
49 * @groups: List of pin groups for this function
50 * @ngroups: Number of entries in @groups
51 * @node: Firmware node matching with the function
52 *
53 * This structure holds information about pin control function
54 * and function group names supporting that function.
55 */
56struct zynqmp_pmux_function {
57 char name[MAX_FUNC_NAME_LEN];
58 const char * const *groups;
59 unsigned int ngroups;
60};
61
62/**
63 * struct zynqmp_pinctrl - driver data
64 * @pctrl: Pin control device
65 * @groups: Pin groups
66 * @ngroups: Number of @groups
67 * @funcs: Pin mux functions
68 * @nfuncs: Number of @funcs
69 *
70 * This struct is stored as driver data and used to retrieve
71 * information regarding pin control functions, groups and
72 * group pins.
73 */
74struct zynqmp_pinctrl {
75 struct pinctrl_dev *pctrl;
76 const struct zynqmp_pctrl_group *groups;
77 unsigned int ngroups;
78 const struct zynqmp_pmux_function *funcs;
79 unsigned int nfuncs;
80};
81
82/**
83 * struct zynqmp_pctrl_group - Pin control group info
84 * @name: Group name
85 * @pins: Group pin numbers
86 * @npins: Number of pins in the group
87 */
88struct zynqmp_pctrl_group {
89 const char *name;
90 unsigned int pins[MAX_GROUP_PIN];
91 unsigned int npins;
92};
93
94static struct pinctrl_desc zynqmp_desc;
95
96static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
97{
98 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
99
100 return pctrl->ngroups;
101}
102
103static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
104 unsigned int selector)
105{
106 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
107
108 return pctrl->groups[selector].name;
109}
110
111static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
112 unsigned int selector,
113 const unsigned int **pins,
114 unsigned int *npins)
115{
116 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
117
118 *pins = pctrl->groups[selector].pins;
119 *npins = pctrl->groups[selector].npins;
120
121 return 0;
122}
123
124static const struct pinctrl_ops zynqmp_pctrl_ops = {
125 .get_groups_count = zynqmp_pctrl_get_groups_count,
126 .get_group_name = zynqmp_pctrl_get_group_name,
127 .get_group_pins = zynqmp_pctrl_get_group_pins,
128 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
129 .dt_free_map = pinctrl_utils_free_map,
130};
131
132static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
133 unsigned int pin)
134{
135 int ret;
136
137 ret = zynqmp_pm_pinctrl_request(pin);
138 if (ret) {
139 dev_err(pctldev->dev, "request failed for pin %u\n", pin);
140 return ret;
141 }
142
143 return 0;
144}
145
146static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
147{
148 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
149
150 return pctrl->nfuncs;
151}
152
153static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
154 unsigned int selector)
155{
156 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
157
158 return pctrl->funcs[selector].name;
159}
160
161/**
162 * zynqmp_pmux_get_function_groups() - Get groups for the function
163 * @pctldev: Pincontrol device pointer.
164 * @selector: Function ID
165 * @groups: Group names.
166 * @num_groups: Number of function groups.
167 *
168 * Get function's group count and group names.
eb1c38c6
SKP		 169 *
170 * Return: 0
8b242ca7
SKP		 171 */
172static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
173 unsigned int selector,
174 const char * const **groups,
175 unsigned * const num_groups)
176{
177 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
178
179 *groups = pctrl->funcs[selector].groups;
180 *num_groups = pctrl->funcs[selector].ngroups;
181
182 return 0;
183}
184
185/**
186 * zynqmp_pinmux_set_mux() - Set requested function for the group
187 * @pctldev: Pincontrol device pointer.
188 * @function: Function ID.
189 * @group: Group ID.
190 *
191 * Loop through all pins of the group and call firmware API
192 * to set requested function for all pins in the group.
193 *
194 * Return: 0 on success else error code.
195 */
196static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
197 unsigned int function,
198 unsigned int group)
199{
200 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
201 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group];
202 int ret, i;
203
204 for (i = 0; i < pgrp->npins; i++) {
205 unsigned int pin = pgrp->pins[i];
206
207 ret = zynqmp_pm_pinctrl_set_function(pin, function);
208 if (ret) {
209 dev_err(pctldev->dev, "set mux failed for pin %u\n",
210 pin);
211 return ret;
212 }
213 }
214
215 return 0;
216}
217
218static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
219 unsigned int pin)
220{
221 int ret;
222
223 ret = zynqmp_pm_pinctrl_release(pin);
224 if (ret) {
225 dev_err(pctldev->dev, "free pin failed for pin %u\n",
226 pin);
227 return ret;
228 }
229
230 return 0;
231}
232
233static const struct pinmux_ops zynqmp_pinmux_ops = {
234 .request = zynqmp_pinmux_request_pin,
235 .get_functions_count = zynqmp_pmux_get_functions_count,
236 .get_function_name = zynqmp_pmux_get_function_name,
237 .get_function_groups = zynqmp_pmux_get_function_groups,
238 .set_mux = zynqmp_pinmux_set_mux,
239 .free = zynqmp_pinmux_release_pin,
240};
241
242/**
243 * zynqmp_pinconf_cfg_get() - get config value for the pin
244 * @pctldev: Pin control device pointer.
245 * @pin: Pin number.
246 * @config: Value of config param.
247 *
248 * Get value of the requested configuration parameter for the
249 * given pin.
250 *
251 * Return: 0 on success else error code.
252 */
253static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
254 unsigned int pin,
255 unsigned long *config)
256{
257 unsigned int arg, param = pinconf_to_config_param(*config);
258 int ret;
259
8b242ca7
SKP		 260 switch (param) {
261 case PIN_CONFIG_SLEW_RATE:
262 param = PM_PINCTRL_CONFIG_SLEW_RATE;
263 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
264 break;
265 case PIN_CONFIG_BIAS_PULL_UP:
266 param = PM_PINCTRL_CONFIG_PULL_CTRL;
267 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
268 if (arg != PM_PINCTRL_BIAS_PULL_UP)
269 return -EINVAL;
270
271 arg = 1;
272 break;
273 case PIN_CONFIG_BIAS_PULL_DOWN:
274 param = PM_PINCTRL_CONFIG_PULL_CTRL;
275 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
276 if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
277 return -EINVAL;
278
279 arg = 1;
280 break;
281 case PIN_CONFIG_BIAS_DISABLE:
282 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
283 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
284 if (arg != PM_PINCTRL_BIAS_DISABLE)
285 return -EINVAL;
286
287 arg = 1;
288 break;
289 case PIN_CONFIG_POWER_SOURCE:
290 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
291 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
292 break;
293 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
294 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
295 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
296 break;
297 case PIN_CONFIG_DRIVE_STRENGTH:
298 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
299 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
300 switch (arg) {
301 case PM_PINCTRL_DRIVE_STRENGTH_2MA:
302 arg = DRIVE_STRENGTH_2MA;
303 break;
304 case PM_PINCTRL_DRIVE_STRENGTH_4MA:
305 arg = DRIVE_STRENGTH_4MA;
306 break;
307 case PM_PINCTRL_DRIVE_STRENGTH_8MA:
308 arg = DRIVE_STRENGTH_8MA;
309 break;
310 case PM_PINCTRL_DRIVE_STRENGTH_12MA:
311 arg = DRIVE_STRENGTH_12MA;
312 break;
313 default:
314 /* Invalid drive strength */
315 dev_warn(pctldev->dev,
316 "Invalid drive strength for pin %d\n",
317 pin);
318 return -EINVAL;
319 }
320 break;
321 default:
fa99e701 322 ret = -ENOTSUPP;
8b242ca7
SKP		 323 break;
324 }
325
326 if (ret)
327 return ret;
328
329 param = pinconf_to_config_param(*config);
330 *config = pinconf_to_config_packed(param, arg);
331
332 return 0;
333}
334
335/**
336 * zynqmp_pinconf_cfg_set() - Set requested config for the pin
337 * @pctldev: Pincontrol device pointer.
338 * @pin: Pin number.
339 * @configs: Configuration to set.
340 * @num_configs: Number of configurations.
341 *
342 * Loop through all configurations and call firmware API
343 * to set requested configurations for the pin.
344 *
345 * Return: 0 on success else error code.
346 */
347static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
348 unsigned int pin, unsigned long *configs,
349 unsigned int num_configs)
350{
351 int i, ret;
352
8b242ca7
SKP		 353 for (i = 0; i < num_configs; i++) {
354 unsigned int param = pinconf_to_config_param(configs[i]);
355 unsigned int arg = pinconf_to_config_argument(configs[i]);
356 unsigned int value;
357
358 switch (param) {
359 case PIN_CONFIG_SLEW_RATE:
360 param = PM_PINCTRL_CONFIG_SLEW_RATE;
361 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
362 break;
363 case PIN_CONFIG_BIAS_PULL_UP:
364 param = PM_PINCTRL_CONFIG_PULL_CTRL;
365 arg = PM_PINCTRL_BIAS_PULL_UP;
366 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
367 break;
368 case PIN_CONFIG_BIAS_PULL_DOWN:
369 param = PM_PINCTRL_CONFIG_PULL_CTRL;
370 arg = PM_PINCTRL_BIAS_PULL_DOWN;
371 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
372 break;
373 case PIN_CONFIG_BIAS_DISABLE:
374 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
375 arg = PM_PINCTRL_BIAS_DISABLE;
376 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
377 break;
378 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
379 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
380 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
381 break;
382 case PIN_CONFIG_DRIVE_STRENGTH:
383 switch (arg) {
384 case DRIVE_STRENGTH_2MA:
385 value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
386 break;
387 case DRIVE_STRENGTH_4MA:
388 value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
389 break;
390 case DRIVE_STRENGTH_8MA:
391 value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
392 break;
393 case DRIVE_STRENGTH_12MA:
394 value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
395 break;
396 default:
397 /* Invalid drive strength */
398 dev_warn(pctldev->dev,
399 "Invalid drive strength for pin %d\n",
400 pin);
401 return -EINVAL;
402 }
403
404 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
405 ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
406 break;
407 case PIN_CONFIG_POWER_SOURCE:
408 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
409 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
410
411 if (arg != value)
412 dev_warn(pctldev->dev,
413 "Invalid IO Standard requested for pin %d\n",
414 pin);
415
416 break;
417 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
418 case PIN_CONFIG_MODE_LOW_POWER:
419 /*
420 * These cases are mentioned in dts but configurable
421 * registers are unknown. So falling through to ignore
422 * boot time warnings as of now.
423 */
424 ret = 0;
425 break;
426 default:
427 dev_warn(pctldev->dev,
428 "unsupported configuration parameter '%u'\n",
429 param);
fa99e701 430 ret = -ENOTSUPP;
8b242ca7
SKP		 431 break;
432 }
433
434 param = pinconf_to_config_param(configs[i]);
435 arg = pinconf_to_config_argument(configs[i]);
436 if (ret)
437 dev_warn(pctldev->dev,
438 "failed to set: pin %u param %u value %u\n",
439 pin, param, arg);
440 }
441
442 return 0;
443}
444
445/**
446 * zynqmp_pinconf_group_set() - Set requested config for the group
447 * @pctldev: Pincontrol device pointer.
448 * @selector: Group ID.
449 * @configs: Configuration to set.
450 * @num_configs: Number of configurations.
451 *
452 * Call function to set configs for each pin in the group.
453 *
454 * Return: 0 on success else error code.
455 */
456static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
457 unsigned int selector,
458 unsigned long *configs,
459 unsigned int num_configs)
460{
461 int i, ret;
462 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
463 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector];
464
465 for (i = 0; i < pgrp->npins; i++) {
466 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
467 num_configs);
468 if (ret)
469 return ret;
470 }
471
472 return 0;
473}
474
475static const struct pinconf_ops zynqmp_pinconf_ops = {
476 .is_generic = true,
477 .pin_config_get = zynqmp_pinconf_cfg_get,
478 .pin_config_set = zynqmp_pinconf_cfg_set,
479 .pin_config_group_set = zynqmp_pinconf_group_set,
480};
481
482static struct pinctrl_desc zynqmp_desc = {
483 .name = "zynqmp_pinctrl",
484 .owner = THIS_MODULE,
485 .pctlops = &zynqmp_pctrl_ops,
486 .pmxops = &zynqmp_pinmux_ops,
487 .confops = &zynqmp_pinconf_ops,
488};
489
490static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
491{
492 struct zynqmp_pm_query_data qdata = {0};
493 u32 payload[PAYLOAD_ARG_CNT];
494 int ret;
495
496 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
497 qdata.arg1 = fid;
498 qdata.arg2 = index;
499
500 ret = zynqmp_pm_query_data(qdata, payload);
501 if (ret)
502 return ret;
503
504 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
505
fa99e701 506 return 0;
8b242ca7
SKP		 507}
508
509static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
510{
511 struct zynqmp_pm_query_data qdata = {0};
512 u32 payload[PAYLOAD_ARG_CNT];
513 int ret;
514
515 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
516 qdata.arg1 = fid;
517
518 ret = zynqmp_pm_query_data(qdata, payload);
519 if (ret)
520 return ret;
521
522 *ngroups = payload[1];
523
fa99e701 524 return 0;
8b242ca7
SKP		 525}
526
527/**
528 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
529 * @dev: Device pointer.
530 * @fid: Function ID.
531 * @func: Function data.
532 * @groups: Groups data.
533 *
534 * Query firmware to get group IDs for each function. Firmware returns
fa99e701 535 * group IDs. Based on the group index for the function, group names in
8b242ca7 536 * the function are stored. For example, the first group in "eth0" function
fa99e701 537 * is named as "eth0_0" and the second group as "eth0_1" and so on.
8b242ca7
SKP		 538 *
539 * Based on the group ID received from the firmware, function stores name of
540 * the group for that group ID. For example, if "eth0" first group ID
541 * is x, groups[x] name will be stored as "eth0_0".
542 *
543 * Once done for each function, each function would have its group names
fa99e701 544 * and each group would also have their names.
8b242ca7
SKP		 545 *
546 * Return: 0 on success else error code.
547 */
548static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
549 struct zynqmp_pmux_function *func,
550 struct zynqmp_pctrl_group *groups)
551{
552 u16 resp[NUM_GROUPS_PER_RESP] = {0};
553 const char **fgroups;
fa99e701 554 int ret, index, i;
8b242ca7
SKP		 555
556 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL);
557 if (!fgroups)
558 return -ENOMEM;
559
560 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
561 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
562 if (ret)
563 return ret;
564
565 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
566 if (resp[i] == NA_GROUP)
567 goto done;
568
569 if (resp[i] == RESERVED_GROUP)
570 continue;
571
572 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL,
573 "%s_%d_grp",
574 func->name,
575 index + i);
576 if (!fgroups[index + i])
577 return -ENOMEM;
578
579 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
580 "%s_%d_grp",
581 func->name,
582 index + i);
583 if (!groups[resp[i]].name)
584 return -ENOMEM;
585 }
586 }
587done:
588 func->groups = fgroups;
589
fa99e701 590 return 0;
8b242ca7
SKP		 591}
592
593static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
594{
595 struct zynqmp_pm_query_data qdata = {0};
596 u32 payload[PAYLOAD_ARG_CNT];
597
598 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
599 qdata.arg1 = fid;
600
601 /*
602 * Name of the function is maximum 16 bytes and cannot
603 * accommodate the return value in SMC buffers, hence ignoring
604 * the return value for this specific qid.
605 */
606 zynqmp_pm_query_data(qdata, payload);
607 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
608}
609
610static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
611{
612 struct zynqmp_pm_query_data qdata = {0};
613 u32 payload[PAYLOAD_ARG_CNT];
614 int ret;
615
616 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
617
618 ret = zynqmp_pm_query_data(qdata, payload);
619 if (ret)
620 return ret;
621
622 *nfuncs = payload[1];
623
fa99e701 624 return 0;
8b242ca7
SKP		 625}
626
627static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
628{
629 struct zynqmp_pm_query_data qdata = {0};
630 u32 payload[PAYLOAD_ARG_CNT];
631 int ret;
632
633 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
634 qdata.arg1 = pin;
635 qdata.arg2 = index;
636
637 ret = zynqmp_pm_query_data(qdata, payload);
638 if (ret)
639 return ret;
640
641 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
642
fa99e701 643 return 0;
8b242ca7
SKP		 644}
645
646static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
647 unsigned int pin)
648{
649 group->pins[group->npins++] = pin;
650}
651
652/**
653 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
654 * @dev: Device pointer.
655 * @groups: Groups data.
656 * @pin: Pin number.
657 *
658 * Query firmware to get groups available for the given pin.
659 * Based on the firmware response(group IDs for the pin), add
660 * pin number to the respective group's pin array.
661 *
fa99e701 662 * Once all pins are queries, each group would have its number
8b242ca7
SKP		 663 * of pins and pin numbers data.
664 *
665 * Return: 0 on success else error code.
666 */
667static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
668 struct zynqmp_pctrl_group *groups,
669 unsigned int pin)
670{
671 u16 resp[NUM_GROUPS_PER_RESP] = {0};
672 int ret, i, index = 0;
673
674 do {
675 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
676 if (ret)
677 return ret;
678
679 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
680 if (resp[i] == NA_GROUP)
681 return ret;
682
683 if (resp[i] == RESERVED_GROUP)
684 continue;
685
686 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
687 }
688 index += NUM_GROUPS_PER_RESP;
689 } while (index <= MAX_PIN_GROUPS);
690
fa99e701 691 return 0;
8b242ca7
SKP		 692}
693
694/**
695 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
696 * @dev: Device pointer.
697 * @groups: Groups data.
698 * @ngroups: Number of groups.
699 *
700 * Prepare pin number and number of pins data for each pins.
701 *
702 * Return: 0 on success else error code.
703 */
704static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
705 struct zynqmp_pctrl_group *groups,
706 unsigned int ngroups)
707{
708 unsigned int pin;
709 int ret;
710
711 for (pin = 0; pin < zynqmp_desc.npins; pin++) {
712 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin);
713 if (ret)
714 return ret;
715 }
716
717 return 0;
718}
719
720/**
721 * zynqmp_pinctrl_prepare_function_info() - prepare function info
722 * @dev: Device pointer.
723 * @pctrl: Pin control driver data.
724 *
725 * Query firmware for functions, groups and pin information and
726 * prepare pin control driver data.
727 *
728 * Query number of functions and number of function groups (number
fa99e701 729 * of groups in the given function) to allocate required memory buffers
8b242ca7
SKP		 730 * for functions and groups. Once buffers are allocated to store
731 * functions and groups data, query and store required information
732 * (number of groups and group names for each function, number of
733 * pins and pin numbers for each group).
734 *
735 * Return: 0 on success else error code.
736 */
737static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
738 struct zynqmp_pinctrl *pctrl)
739{
740 struct zynqmp_pmux_function *funcs;
741 struct zynqmp_pctrl_group *groups;
742 int ret, i;
743
744 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
745 if (ret)
746 return ret;
747
748 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL);
749 if (!funcs)
750 return -ENOMEM;
751
752 for (i = 0; i < pctrl->nfuncs; i++) {
753 zynqmp_pinctrl_get_function_name(i, funcs[i].name);
754
755 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
756 if (ret)
757 return ret;
758
759 pctrl->ngroups += funcs[i].ngroups;
760 }
761
762 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL);
763 if (!groups)
764 return -ENOMEM;
765
766 for (i = 0; i < pctrl->nfuncs; i++) {
767 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
768 groups);
769 if (ret)
770 return ret;
771 }
772
773 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
774 if (ret)
775 return ret;
776
777 pctrl->funcs = funcs;
778 pctrl->groups = groups;
779
fa99e701 780 return 0;
8b242ca7
SKP		 781}
782
783static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
784{
785 struct zynqmp_pm_query_data qdata = {0};
786 u32 payload[PAYLOAD_ARG_CNT];
787 int ret;
788
789 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
790
791 ret = zynqmp_pm_query_data(qdata, payload);
792 if (ret)
793 return ret;
794
795 *npins = payload[1];
796
fa99e701 797 return 0;
8b242ca7
SKP		 798}
799
800/**
801 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
802 * @dev: Device pointer.
803 * @zynqmp_pins: Pin information.
804 * @npins: Number of pins.
805 *
806 * Query number of pins information from firmware and prepare pin
807 * description containing pin number and pin name.
808 *
809 * Return: 0 on success else error code.
810 */
811static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
812 const struct pinctrl_pin_desc
813 **zynqmp_pins,
814 unsigned int *npins)
815{
816 struct pinctrl_pin_desc *pins, *pin;
817 int ret;
818 int i;
819
820 ret = zynqmp_pinctrl_get_num_pins(npins);
821 if (ret)
822 return ret;
823
824 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
825 if (!pins)
826 return -ENOMEM;
827
828 for (i = 0; i < *npins; i++) {
829 pin = &pins[i];
830 pin->number = i;
500c77ee
GE		 831 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
832 ZYNQMP_PIN_PREFIX, i);
833 if (!pin->name)
834 return -ENOMEM;
8b242ca7
SKP		 835 }
836
837 *zynqmp_pins = pins;
838
839 return 0;
840}
841
842static int zynqmp_pinctrl_probe(struct platform_device *pdev)
843{
844 struct zynqmp_pinctrl *pctrl;
845 int ret;
846
847 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
848 if (!pctrl)
849 return -ENOMEM;
850
851 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
852 &zynqmp_desc.pins,
853 &zynqmp_desc.npins);
854 if (ret) {
fa99e701 855 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
8b242ca7
SKP		 856 return ret;
857 }
858
859 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
860 if (ret) {
fa99e701 861 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret);
8b242ca7
SKP		 862 return ret;
863 }
864
fa99e701 865 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl);
8b242ca7
SKP		 866 if (IS_ERR(pctrl->pctrl))
867 return PTR_ERR(pctrl->pctrl);
868
869 platform_set_drvdata(pdev, pctrl);
870
871 return ret;
872}
873
8b242ca7
SKP		 874static const struct of_device_id zynqmp_pinctrl_of_match[] = {
875 { .compatible = "xlnx,zynqmp-pinctrl" },
876 { }
877};
8b242ca7
SKP		 878MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
879
880static struct platform_driver zynqmp_pinctrl_driver = {
881 .driver = {
882 .name = "zynqmp-pinctrl",
883 .of_match_table = zynqmp_pinctrl_of_match,
884 },
885 .probe = zynqmp_pinctrl_probe,
8b242ca7 886};
8b242ca7
SKP		 887module_platform_driver(zynqmp_pinctrl_driver);
888
889MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>");
890MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
891MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)