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8b8b091b TL |
1 | /* |
2 | * Generic device tree based pinctrl driver for one register per pin | |
3 | * type pinmux controllers | |
4 | * | |
5 | * Copyright (C) 2012 Texas Instruments, Inc. | |
6 | * | |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/list.h> | |
18 | ||
19 | #include <linux/of.h> | |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_address.h> | |
22 | ||
23 | #include <linux/pinctrl/pinctrl.h> | |
24 | #include <linux/pinctrl/pinmux.h> | |
25 | ||
26 | #include "core.h" | |
27 | ||
28 | #define DRIVER_NAME "pinctrl-single" | |
9e605cb6 PU |
29 | #define PCS_MUX_PINS_NAME "pinctrl-single,pins" |
30 | #define PCS_MUX_BITS_NAME "pinctrl-single,bits" | |
8b8b091b TL |
31 | #define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1) |
32 | #define PCS_OFF_DISABLED ~0U | |
33 | ||
34 | /** | |
35 | * struct pcs_pingroup - pingroups for a function | |
36 | * @np: pingroup device node pointer | |
37 | * @name: pingroup name | |
38 | * @gpins: array of the pins in the group | |
39 | * @ngpins: number of pins in the group | |
40 | * @node: list node | |
41 | */ | |
42 | struct pcs_pingroup { | |
43 | struct device_node *np; | |
44 | const char *name; | |
45 | int *gpins; | |
46 | int ngpins; | |
47 | struct list_head node; | |
48 | }; | |
49 | ||
50 | /** | |
51 | * struct pcs_func_vals - mux function register offset and value pair | |
52 | * @reg: register virtual address | |
53 | * @val: register value | |
54 | */ | |
55 | struct pcs_func_vals { | |
56 | void __iomem *reg; | |
57 | unsigned val; | |
9e605cb6 | 58 | unsigned mask; |
8b8b091b TL |
59 | }; |
60 | ||
61 | /** | |
62 | * struct pcs_function - pinctrl function | |
63 | * @name: pinctrl function name | |
64 | * @vals: register and vals array | |
65 | * @nvals: number of entries in vals array | |
66 | * @pgnames: array of pingroup names the function uses | |
67 | * @npgnames: number of pingroup names the function uses | |
68 | * @node: list node | |
69 | */ | |
70 | struct pcs_function { | |
71 | const char *name; | |
72 | struct pcs_func_vals *vals; | |
73 | unsigned nvals; | |
74 | const char **pgnames; | |
75 | int npgnames; | |
76 | struct list_head node; | |
77 | }; | |
78 | ||
79 | /** | |
80 | * struct pcs_data - wrapper for data needed by pinctrl framework | |
81 | * @pa: pindesc array | |
82 | * @cur: index to current element | |
83 | * | |
84 | * REVISIT: We should be able to drop this eventually by adding | |
85 | * support for registering pins individually in the pinctrl | |
86 | * framework for those drivers that don't need a static array. | |
87 | */ | |
88 | struct pcs_data { | |
89 | struct pinctrl_pin_desc *pa; | |
90 | int cur; | |
91 | }; | |
92 | ||
93 | /** | |
94 | * struct pcs_name - register name for a pin | |
95 | * @name: name of the pinctrl register | |
96 | * | |
97 | * REVISIT: We may want to make names optional in the pinctrl | |
98 | * framework as some drivers may not care about pin names to | |
99 | * avoid kernel bloat. The pin names can be deciphered by user | |
100 | * space tools using debugfs based on the register address and | |
101 | * SoC packaging information. | |
102 | */ | |
103 | struct pcs_name { | |
104 | char name[PCS_REG_NAME_LEN]; | |
105 | }; | |
106 | ||
107 | /** | |
108 | * struct pcs_device - pinctrl device instance | |
109 | * @res: resources | |
110 | * @base: virtual address of the controller | |
111 | * @size: size of the ioremapped area | |
112 | * @dev: device entry | |
113 | * @pctl: pin controller device | |
114 | * @mutex: mutex protecting the lists | |
115 | * @width: bits per mux register | |
116 | * @fmask: function register mask | |
117 | * @fshift: function register shift | |
118 | * @foff: value to turn mux off | |
119 | * @fmax: max number of functions in fmask | |
120 | * @names: array of register names for pins | |
121 | * @pins: physical pins on the SoC | |
122 | * @pgtree: pingroup index radix tree | |
123 | * @ftree: function index radix tree | |
124 | * @pingroups: list of pingroups | |
125 | * @functions: list of functions | |
126 | * @ngroups: number of pingroups | |
127 | * @nfuncs: number of functions | |
128 | * @desc: pin controller descriptor | |
129 | * @read: register read function to use | |
130 | * @write: register write function to use | |
131 | */ | |
132 | struct pcs_device { | |
133 | struct resource *res; | |
134 | void __iomem *base; | |
135 | unsigned size; | |
136 | struct device *dev; | |
137 | struct pinctrl_dev *pctl; | |
138 | struct mutex mutex; | |
139 | unsigned width; | |
140 | unsigned fmask; | |
141 | unsigned fshift; | |
142 | unsigned foff; | |
143 | unsigned fmax; | |
9e605cb6 | 144 | bool bits_per_mux; |
8b8b091b TL |
145 | struct pcs_name *names; |
146 | struct pcs_data pins; | |
147 | struct radix_tree_root pgtree; | |
148 | struct radix_tree_root ftree; | |
149 | struct list_head pingroups; | |
150 | struct list_head functions; | |
151 | unsigned ngroups; | |
152 | unsigned nfuncs; | |
153 | struct pinctrl_desc desc; | |
154 | unsigned (*read)(void __iomem *reg); | |
155 | void (*write)(unsigned val, void __iomem *reg); | |
156 | }; | |
157 | ||
158 | /* | |
159 | * REVISIT: Reads and writes could eventually use regmap or something | |
160 | * generic. But at least on omaps, some mux registers are performance | |
161 | * critical as they may need to be remuxed every time before and after | |
162 | * idle. Adding tests for register access width for every read and | |
163 | * write like regmap is doing is not desired, and caching the registers | |
164 | * does not help in this case. | |
165 | */ | |
166 | ||
167 | static unsigned __maybe_unused pcs_readb(void __iomem *reg) | |
168 | { | |
169 | return readb(reg); | |
170 | } | |
171 | ||
172 | static unsigned __maybe_unused pcs_readw(void __iomem *reg) | |
173 | { | |
174 | return readw(reg); | |
175 | } | |
176 | ||
177 | static unsigned __maybe_unused pcs_readl(void __iomem *reg) | |
178 | { | |
179 | return readl(reg); | |
180 | } | |
181 | ||
182 | static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg) | |
183 | { | |
184 | writeb(val, reg); | |
185 | } | |
186 | ||
187 | static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg) | |
188 | { | |
189 | writew(val, reg); | |
190 | } | |
191 | ||
192 | static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg) | |
193 | { | |
194 | writel(val, reg); | |
195 | } | |
196 | ||
197 | static int pcs_get_groups_count(struct pinctrl_dev *pctldev) | |
198 | { | |
199 | struct pcs_device *pcs; | |
200 | ||
201 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
202 | ||
203 | return pcs->ngroups; | |
204 | } | |
205 | ||
206 | static const char *pcs_get_group_name(struct pinctrl_dev *pctldev, | |
207 | unsigned gselector) | |
208 | { | |
209 | struct pcs_device *pcs; | |
210 | struct pcs_pingroup *group; | |
211 | ||
212 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
213 | group = radix_tree_lookup(&pcs->pgtree, gselector); | |
214 | if (!group) { | |
215 | dev_err(pcs->dev, "%s could not find pingroup%i\n", | |
216 | __func__, gselector); | |
217 | return NULL; | |
218 | } | |
219 | ||
220 | return group->name; | |
221 | } | |
222 | ||
223 | static int pcs_get_group_pins(struct pinctrl_dev *pctldev, | |
224 | unsigned gselector, | |
225 | const unsigned **pins, | |
226 | unsigned *npins) | |
227 | { | |
228 | struct pcs_device *pcs; | |
229 | struct pcs_pingroup *group; | |
230 | ||
231 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
232 | group = radix_tree_lookup(&pcs->pgtree, gselector); | |
233 | if (!group) { | |
234 | dev_err(pcs->dev, "%s could not find pingroup%i\n", | |
235 | __func__, gselector); | |
236 | return -EINVAL; | |
237 | } | |
238 | ||
239 | *pins = group->gpins; | |
240 | *npins = group->ngpins; | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
245 | static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, | |
246 | struct seq_file *s, | |
e7ed6718 | 247 | unsigned pin) |
8b8b091b | 248 | { |
7d66ce7f | 249 | struct pcs_device *pcs; |
e7ed6718 | 250 | unsigned val, mux_bytes; |
7d66ce7f MP |
251 | |
252 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
253 | ||
e7ed6718 HZ |
254 | mux_bytes = pcs->width / BITS_PER_BYTE; |
255 | val = pcs->read(pcs->base + pin * mux_bytes); | |
7d66ce7f MP |
256 | |
257 | seq_printf(s, "%08x %s " , val, DRIVER_NAME); | |
8b8b091b TL |
258 | } |
259 | ||
260 | static void pcs_dt_free_map(struct pinctrl_dev *pctldev, | |
261 | struct pinctrl_map *map, unsigned num_maps) | |
262 | { | |
263 | struct pcs_device *pcs; | |
264 | ||
265 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
266 | devm_kfree(pcs->dev, map); | |
267 | } | |
268 | ||
269 | static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, | |
270 | struct device_node *np_config, | |
271 | struct pinctrl_map **map, unsigned *num_maps); | |
272 | ||
273 | static struct pinctrl_ops pcs_pinctrl_ops = { | |
274 | .get_groups_count = pcs_get_groups_count, | |
275 | .get_group_name = pcs_get_group_name, | |
276 | .get_group_pins = pcs_get_group_pins, | |
277 | .pin_dbg_show = pcs_pin_dbg_show, | |
278 | .dt_node_to_map = pcs_dt_node_to_map, | |
279 | .dt_free_map = pcs_dt_free_map, | |
280 | }; | |
281 | ||
282 | static int pcs_get_functions_count(struct pinctrl_dev *pctldev) | |
283 | { | |
284 | struct pcs_device *pcs; | |
285 | ||
286 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
287 | ||
288 | return pcs->nfuncs; | |
289 | } | |
290 | ||
291 | static const char *pcs_get_function_name(struct pinctrl_dev *pctldev, | |
292 | unsigned fselector) | |
293 | { | |
294 | struct pcs_device *pcs; | |
295 | struct pcs_function *func; | |
296 | ||
297 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
298 | func = radix_tree_lookup(&pcs->ftree, fselector); | |
299 | if (!func) { | |
300 | dev_err(pcs->dev, "%s could not find function%i\n", | |
301 | __func__, fselector); | |
302 | return NULL; | |
303 | } | |
304 | ||
305 | return func->name; | |
306 | } | |
307 | ||
308 | static int pcs_get_function_groups(struct pinctrl_dev *pctldev, | |
309 | unsigned fselector, | |
310 | const char * const **groups, | |
311 | unsigned * const ngroups) | |
312 | { | |
313 | struct pcs_device *pcs; | |
314 | struct pcs_function *func; | |
315 | ||
316 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
317 | func = radix_tree_lookup(&pcs->ftree, fselector); | |
318 | if (!func) { | |
319 | dev_err(pcs->dev, "%s could not find function%i\n", | |
320 | __func__, fselector); | |
321 | return -EINVAL; | |
322 | } | |
323 | *groups = func->pgnames; | |
324 | *ngroups = func->npgnames; | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
329 | static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, | |
330 | unsigned group) | |
331 | { | |
332 | struct pcs_device *pcs; | |
333 | struct pcs_function *func; | |
334 | int i; | |
335 | ||
336 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
337 | func = radix_tree_lookup(&pcs->ftree, fselector); | |
338 | if (!func) | |
339 | return -EINVAL; | |
340 | ||
341 | dev_dbg(pcs->dev, "enabling %s function%i\n", | |
342 | func->name, fselector); | |
343 | ||
344 | for (i = 0; i < func->nvals; i++) { | |
345 | struct pcs_func_vals *vals; | |
9e605cb6 | 346 | unsigned val, mask; |
8b8b091b TL |
347 | |
348 | vals = &func->vals[i]; | |
349 | val = pcs->read(vals->reg); | |
9e605cb6 PU |
350 | if (!vals->mask) |
351 | mask = pcs->fmask; | |
352 | else | |
353 | mask = pcs->fmask & vals->mask; | |
354 | ||
355 | val &= ~mask; | |
356 | val |= (vals->val & mask); | |
8b8b091b TL |
357 | pcs->write(val, vals->reg); |
358 | } | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, | |
364 | unsigned group) | |
365 | { | |
366 | struct pcs_device *pcs; | |
367 | struct pcs_function *func; | |
368 | int i; | |
369 | ||
370 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
371 | func = radix_tree_lookup(&pcs->ftree, fselector); | |
372 | if (!func) { | |
373 | dev_err(pcs->dev, "%s could not find function%i\n", | |
374 | __func__, fselector); | |
375 | return; | |
376 | } | |
377 | ||
378 | /* | |
379 | * Ignore disable if function-off is not specified. Some hardware | |
380 | * does not have clearly defined disable function. For pin specific | |
381 | * off modes, you can use alternate named states as described in | |
382 | * pinctrl-bindings.txt. | |
383 | */ | |
384 | if (pcs->foff == PCS_OFF_DISABLED) { | |
385 | dev_dbg(pcs->dev, "ignoring disable for %s function%i\n", | |
386 | func->name, fselector); | |
387 | return; | |
388 | } | |
389 | ||
390 | dev_dbg(pcs->dev, "disabling function%i %s\n", | |
391 | fselector, func->name); | |
392 | ||
393 | for (i = 0; i < func->nvals; i++) { | |
394 | struct pcs_func_vals *vals; | |
395 | unsigned val; | |
396 | ||
397 | vals = &func->vals[i]; | |
398 | val = pcs->read(vals->reg); | |
399 | val &= ~pcs->fmask; | |
400 | val |= pcs->foff << pcs->fshift; | |
401 | pcs->write(val, vals->reg); | |
402 | } | |
403 | } | |
404 | ||
405 | static int pcs_request_gpio(struct pinctrl_dev *pctldev, | |
8b77b376 | 406 | struct pinctrl_gpio_range *range, unsigned offset) |
8b8b091b | 407 | { |
8b77b376 | 408 | return -ENOTSUPP; |
8b8b091b TL |
409 | } |
410 | ||
411 | static struct pinmux_ops pcs_pinmux_ops = { | |
412 | .get_functions_count = pcs_get_functions_count, | |
413 | .get_function_name = pcs_get_function_name, | |
414 | .get_function_groups = pcs_get_function_groups, | |
415 | .enable = pcs_enable, | |
416 | .disable = pcs_disable, | |
417 | .gpio_request_enable = pcs_request_gpio, | |
418 | }; | |
419 | ||
420 | static int pcs_pinconf_get(struct pinctrl_dev *pctldev, | |
421 | unsigned pin, unsigned long *config) | |
422 | { | |
423 | return -ENOTSUPP; | |
424 | } | |
425 | ||
426 | static int pcs_pinconf_set(struct pinctrl_dev *pctldev, | |
427 | unsigned pin, unsigned long config) | |
428 | { | |
429 | return -ENOTSUPP; | |
430 | } | |
431 | ||
432 | static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev, | |
433 | unsigned group, unsigned long *config) | |
434 | { | |
435 | return -ENOTSUPP; | |
436 | } | |
437 | ||
438 | static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev, | |
439 | unsigned group, unsigned long config) | |
440 | { | |
441 | return -ENOTSUPP; | |
442 | } | |
443 | ||
444 | static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev, | |
445 | struct seq_file *s, unsigned offset) | |
446 | { | |
447 | } | |
448 | ||
449 | static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, | |
450 | struct seq_file *s, unsigned selector) | |
451 | { | |
452 | } | |
453 | ||
454 | static struct pinconf_ops pcs_pinconf_ops = { | |
455 | .pin_config_get = pcs_pinconf_get, | |
456 | .pin_config_set = pcs_pinconf_set, | |
457 | .pin_config_group_get = pcs_pinconf_group_get, | |
458 | .pin_config_group_set = pcs_pinconf_group_set, | |
459 | .pin_config_dbg_show = pcs_pinconf_dbg_show, | |
460 | .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show, | |
461 | }; | |
462 | ||
463 | /** | |
464 | * pcs_add_pin() - add a pin to the static per controller pin array | |
465 | * @pcs: pcs driver instance | |
466 | * @offset: register offset from base | |
467 | */ | |
150632b0 | 468 | static int pcs_add_pin(struct pcs_device *pcs, unsigned offset) |
8b8b091b TL |
469 | { |
470 | struct pinctrl_pin_desc *pin; | |
471 | struct pcs_name *pn; | |
472 | int i; | |
473 | ||
474 | i = pcs->pins.cur; | |
475 | if (i >= pcs->desc.npins) { | |
476 | dev_err(pcs->dev, "too many pins, max %i\n", | |
477 | pcs->desc.npins); | |
478 | return -ENOMEM; | |
479 | } | |
480 | ||
481 | pin = &pcs->pins.pa[i]; | |
482 | pn = &pcs->names[i]; | |
483 | sprintf(pn->name, "%lx", | |
484 | (unsigned long)pcs->res->start + offset); | |
485 | pin->name = pn->name; | |
486 | pin->number = i; | |
487 | pcs->pins.cur++; | |
488 | ||
489 | return i; | |
490 | } | |
491 | ||
492 | /** | |
493 | * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver | |
494 | * @pcs: pcs driver instance | |
495 | * | |
496 | * In case of errors, resources are freed in pcs_free_resources. | |
497 | * | |
498 | * If your hardware needs holes in the address space, then just set | |
499 | * up multiple driver instances. | |
500 | */ | |
150632b0 | 501 | static int pcs_allocate_pin_table(struct pcs_device *pcs) |
8b8b091b TL |
502 | { |
503 | int mux_bytes, nr_pins, i; | |
504 | ||
505 | mux_bytes = pcs->width / BITS_PER_BYTE; | |
506 | nr_pins = pcs->size / mux_bytes; | |
507 | ||
508 | dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins); | |
509 | pcs->pins.pa = devm_kzalloc(pcs->dev, | |
510 | sizeof(*pcs->pins.pa) * nr_pins, | |
511 | GFP_KERNEL); | |
512 | if (!pcs->pins.pa) | |
513 | return -ENOMEM; | |
514 | ||
515 | pcs->names = devm_kzalloc(pcs->dev, | |
516 | sizeof(struct pcs_name) * nr_pins, | |
517 | GFP_KERNEL); | |
518 | if (!pcs->names) | |
519 | return -ENOMEM; | |
520 | ||
521 | pcs->desc.pins = pcs->pins.pa; | |
522 | pcs->desc.npins = nr_pins; | |
523 | ||
524 | for (i = 0; i < pcs->desc.npins; i++) { | |
525 | unsigned offset; | |
526 | int res; | |
527 | ||
528 | offset = i * mux_bytes; | |
529 | res = pcs_add_pin(pcs, offset); | |
530 | if (res < 0) { | |
531 | dev_err(pcs->dev, "error adding pins: %i\n", res); | |
532 | return res; | |
533 | } | |
534 | } | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
539 | /** | |
540 | * pcs_add_function() - adds a new function to the function list | |
541 | * @pcs: pcs driver instance | |
542 | * @np: device node of the mux entry | |
543 | * @name: name of the function | |
544 | * @vals: array of mux register value pairs used by the function | |
545 | * @nvals: number of mux register value pairs | |
546 | * @pgnames: array of pingroup names for the function | |
547 | * @npgnames: number of pingroup names | |
548 | */ | |
549 | static struct pcs_function *pcs_add_function(struct pcs_device *pcs, | |
550 | struct device_node *np, | |
551 | const char *name, | |
552 | struct pcs_func_vals *vals, | |
553 | unsigned nvals, | |
554 | const char **pgnames, | |
555 | unsigned npgnames) | |
556 | { | |
557 | struct pcs_function *function; | |
558 | ||
559 | function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL); | |
560 | if (!function) | |
561 | return NULL; | |
562 | ||
563 | function->name = name; | |
564 | function->vals = vals; | |
565 | function->nvals = nvals; | |
566 | function->pgnames = pgnames; | |
567 | function->npgnames = npgnames; | |
568 | ||
569 | mutex_lock(&pcs->mutex); | |
570 | list_add_tail(&function->node, &pcs->functions); | |
571 | radix_tree_insert(&pcs->ftree, pcs->nfuncs, function); | |
572 | pcs->nfuncs++; | |
573 | mutex_unlock(&pcs->mutex); | |
574 | ||
575 | return function; | |
576 | } | |
577 | ||
578 | static void pcs_remove_function(struct pcs_device *pcs, | |
579 | struct pcs_function *function) | |
580 | { | |
581 | int i; | |
582 | ||
583 | mutex_lock(&pcs->mutex); | |
584 | for (i = 0; i < pcs->nfuncs; i++) { | |
585 | struct pcs_function *found; | |
586 | ||
587 | found = radix_tree_lookup(&pcs->ftree, i); | |
588 | if (found == function) | |
589 | radix_tree_delete(&pcs->ftree, i); | |
590 | } | |
591 | list_del(&function->node); | |
592 | mutex_unlock(&pcs->mutex); | |
593 | } | |
594 | ||
595 | /** | |
596 | * pcs_add_pingroup() - add a pingroup to the pingroup list | |
597 | * @pcs: pcs driver instance | |
598 | * @np: device node of the mux entry | |
599 | * @name: name of the pingroup | |
600 | * @gpins: array of the pins that belong to the group | |
601 | * @ngpins: number of pins in the group | |
602 | */ | |
603 | static int pcs_add_pingroup(struct pcs_device *pcs, | |
604 | struct device_node *np, | |
605 | const char *name, | |
606 | int *gpins, | |
607 | int ngpins) | |
608 | { | |
609 | struct pcs_pingroup *pingroup; | |
610 | ||
611 | pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL); | |
612 | if (!pingroup) | |
613 | return -ENOMEM; | |
614 | ||
615 | pingroup->name = name; | |
616 | pingroup->np = np; | |
617 | pingroup->gpins = gpins; | |
618 | pingroup->ngpins = ngpins; | |
619 | ||
620 | mutex_lock(&pcs->mutex); | |
621 | list_add_tail(&pingroup->node, &pcs->pingroups); | |
622 | radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup); | |
623 | pcs->ngroups++; | |
624 | mutex_unlock(&pcs->mutex); | |
625 | ||
626 | return 0; | |
627 | } | |
628 | ||
629 | /** | |
630 | * pcs_get_pin_by_offset() - get a pin index based on the register offset | |
631 | * @pcs: pcs driver instance | |
632 | * @offset: register offset from the base | |
633 | * | |
634 | * Note that this is OK as long as the pins are in a static array. | |
635 | */ | |
636 | static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset) | |
637 | { | |
638 | unsigned index; | |
639 | ||
640 | if (offset >= pcs->size) { | |
641 | dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n", | |
642 | offset, pcs->size); | |
643 | return -EINVAL; | |
644 | } | |
645 | ||
646 | index = offset / (pcs->width / BITS_PER_BYTE); | |
647 | ||
648 | return index; | |
649 | } | |
650 | ||
651 | /** | |
652 | * smux_parse_one_pinctrl_entry() - parses a device tree mux entry | |
653 | * @pcs: pinctrl driver instance | |
654 | * @np: device node of the mux entry | |
655 | * @map: map entry | |
656 | * @pgnames: pingroup names | |
657 | * | |
658 | * Note that this binding currently supports only sets of one register + value. | |
659 | * | |
660 | * Also note that this driver tries to avoid understanding pin and function | |
661 | * names because of the extra bloat they would cause especially in the case of | |
662 | * a large number of pins. This driver just sets what is specified for the board | |
663 | * in the .dts file. Further user space debugging tools can be developed to | |
664 | * decipher the pin and function names using debugfs. | |
665 | * | |
666 | * If you are concerned about the boot time, set up the static pins in | |
667 | * the bootloader, and only set up selected pins as device tree entries. | |
668 | */ | |
669 | static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, | |
670 | struct device_node *np, | |
671 | struct pinctrl_map **map, | |
672 | const char **pgnames) | |
673 | { | |
674 | struct pcs_func_vals *vals; | |
675 | const __be32 *mux; | |
9e605cb6 | 676 | int size, params, rows, *pins, index = 0, found = 0, res = -ENOMEM; |
8b8b091b TL |
677 | struct pcs_function *function; |
678 | ||
9e605cb6 PU |
679 | if (pcs->bits_per_mux) { |
680 | params = 3; | |
681 | mux = of_get_property(np, PCS_MUX_BITS_NAME, &size); | |
682 | } else { | |
683 | params = 2; | |
684 | mux = of_get_property(np, PCS_MUX_PINS_NAME, &size); | |
685 | } | |
686 | ||
687 | if (!mux) { | |
688 | dev_err(pcs->dev, "no valid property for %s\n", np->name); | |
689 | return -EINVAL; | |
690 | } | |
691 | ||
692 | if (size < (sizeof(*mux) * params)) { | |
693 | dev_err(pcs->dev, "bad data for %s\n", np->name); | |
8b8b091b TL |
694 | return -EINVAL; |
695 | } | |
696 | ||
697 | size /= sizeof(*mux); /* Number of elements in array */ | |
9e605cb6 | 698 | rows = size / params; |
8b8b091b TL |
699 | |
700 | vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL); | |
701 | if (!vals) | |
702 | return -ENOMEM; | |
703 | ||
704 | pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL); | |
705 | if (!pins) | |
706 | goto free_vals; | |
707 | ||
708 | while (index < size) { | |
709 | unsigned offset, val; | |
710 | int pin; | |
711 | ||
712 | offset = be32_to_cpup(mux + index++); | |
713 | val = be32_to_cpup(mux + index++); | |
714 | vals[found].reg = pcs->base + offset; | |
715 | vals[found].val = val; | |
9e605cb6 PU |
716 | if (params == 3) { |
717 | val = be32_to_cpup(mux + index++); | |
718 | vals[found].mask = val; | |
719 | } | |
8b8b091b TL |
720 | |
721 | pin = pcs_get_pin_by_offset(pcs, offset); | |
722 | if (pin < 0) { | |
723 | dev_err(pcs->dev, | |
724 | "could not add functions for %s %ux\n", | |
725 | np->name, offset); | |
726 | break; | |
727 | } | |
728 | pins[found++] = pin; | |
729 | } | |
730 | ||
731 | pgnames[0] = np->name; | |
732 | function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1); | |
733 | if (!function) | |
734 | goto free_pins; | |
735 | ||
736 | res = pcs_add_pingroup(pcs, np, np->name, pins, found); | |
737 | if (res < 0) | |
738 | goto free_function; | |
739 | ||
740 | (*map)->type = PIN_MAP_TYPE_MUX_GROUP; | |
741 | (*map)->data.mux.group = np->name; | |
742 | (*map)->data.mux.function = np->name; | |
743 | ||
744 | return 0; | |
745 | ||
746 | free_function: | |
747 | pcs_remove_function(pcs, function); | |
748 | ||
749 | free_pins: | |
750 | devm_kfree(pcs->dev, pins); | |
751 | ||
752 | free_vals: | |
753 | devm_kfree(pcs->dev, vals); | |
754 | ||
755 | return res; | |
756 | } | |
757 | /** | |
758 | * pcs_dt_node_to_map() - allocates and parses pinctrl maps | |
759 | * @pctldev: pinctrl instance | |
760 | * @np_config: device tree pinmux entry | |
761 | * @map: array of map entries | |
762 | * @num_maps: number of maps | |
763 | */ | |
764 | static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, | |
765 | struct device_node *np_config, | |
766 | struct pinctrl_map **map, unsigned *num_maps) | |
767 | { | |
768 | struct pcs_device *pcs; | |
769 | const char **pgnames; | |
770 | int ret; | |
771 | ||
772 | pcs = pinctrl_dev_get_drvdata(pctldev); | |
773 | ||
774 | *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL); | |
00e79d12 | 775 | if (!*map) |
8b8b091b TL |
776 | return -ENOMEM; |
777 | ||
778 | *num_maps = 0; | |
779 | ||
780 | pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL); | |
781 | if (!pgnames) { | |
782 | ret = -ENOMEM; | |
783 | goto free_map; | |
784 | } | |
785 | ||
786 | ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames); | |
787 | if (ret < 0) { | |
788 | dev_err(pcs->dev, "no pins entries for %s\n", | |
789 | np_config->name); | |
790 | goto free_pgnames; | |
791 | } | |
792 | *num_maps = 1; | |
793 | ||
794 | return 0; | |
795 | ||
796 | free_pgnames: | |
797 | devm_kfree(pcs->dev, pgnames); | |
798 | free_map: | |
799 | devm_kfree(pcs->dev, *map); | |
800 | ||
801 | return ret; | |
802 | } | |
803 | ||
804 | /** | |
805 | * pcs_free_funcs() - free memory used by functions | |
806 | * @pcs: pcs driver instance | |
807 | */ | |
808 | static void pcs_free_funcs(struct pcs_device *pcs) | |
809 | { | |
810 | struct list_head *pos, *tmp; | |
811 | int i; | |
812 | ||
813 | mutex_lock(&pcs->mutex); | |
814 | for (i = 0; i < pcs->nfuncs; i++) { | |
815 | struct pcs_function *func; | |
816 | ||
817 | func = radix_tree_lookup(&pcs->ftree, i); | |
818 | if (!func) | |
819 | continue; | |
820 | radix_tree_delete(&pcs->ftree, i); | |
821 | } | |
822 | list_for_each_safe(pos, tmp, &pcs->functions) { | |
823 | struct pcs_function *function; | |
824 | ||
825 | function = list_entry(pos, struct pcs_function, node); | |
826 | list_del(&function->node); | |
827 | } | |
828 | mutex_unlock(&pcs->mutex); | |
829 | } | |
830 | ||
831 | /** | |
832 | * pcs_free_pingroups() - free memory used by pingroups | |
833 | * @pcs: pcs driver instance | |
834 | */ | |
835 | static void pcs_free_pingroups(struct pcs_device *pcs) | |
836 | { | |
837 | struct list_head *pos, *tmp; | |
838 | int i; | |
839 | ||
840 | mutex_lock(&pcs->mutex); | |
841 | for (i = 0; i < pcs->ngroups; i++) { | |
842 | struct pcs_pingroup *pingroup; | |
843 | ||
844 | pingroup = radix_tree_lookup(&pcs->pgtree, i); | |
845 | if (!pingroup) | |
846 | continue; | |
847 | radix_tree_delete(&pcs->pgtree, i); | |
848 | } | |
849 | list_for_each_safe(pos, tmp, &pcs->pingroups) { | |
850 | struct pcs_pingroup *pingroup; | |
851 | ||
852 | pingroup = list_entry(pos, struct pcs_pingroup, node); | |
853 | list_del(&pingroup->node); | |
854 | } | |
855 | mutex_unlock(&pcs->mutex); | |
856 | } | |
857 | ||
858 | /** | |
859 | * pcs_free_resources() - free memory used by this driver | |
860 | * @pcs: pcs driver instance | |
861 | */ | |
862 | static void pcs_free_resources(struct pcs_device *pcs) | |
863 | { | |
864 | if (pcs->pctl) | |
865 | pinctrl_unregister(pcs->pctl); | |
866 | ||
867 | pcs_free_funcs(pcs); | |
868 | pcs_free_pingroups(pcs); | |
869 | } | |
870 | ||
871 | #define PCS_GET_PROP_U32(name, reg, err) \ | |
872 | do { \ | |
873 | ret = of_property_read_u32(np, name, reg); \ | |
874 | if (ret) { \ | |
875 | dev_err(pcs->dev, err); \ | |
876 | return ret; \ | |
877 | } \ | |
878 | } while (0); | |
879 | ||
880 | static struct of_device_id pcs_of_match[]; | |
881 | ||
150632b0 | 882 | static int pcs_probe(struct platform_device *pdev) |
8b8b091b TL |
883 | { |
884 | struct device_node *np = pdev->dev.of_node; | |
885 | const struct of_device_id *match; | |
886 | struct resource *res; | |
887 | struct pcs_device *pcs; | |
888 | int ret; | |
889 | ||
890 | match = of_match_device(pcs_of_match, &pdev->dev); | |
891 | if (!match) | |
892 | return -EINVAL; | |
893 | ||
894 | pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL); | |
895 | if (!pcs) { | |
896 | dev_err(&pdev->dev, "could not allocate\n"); | |
897 | return -ENOMEM; | |
898 | } | |
899 | pcs->dev = &pdev->dev; | |
900 | mutex_init(&pcs->mutex); | |
901 | INIT_LIST_HEAD(&pcs->pingroups); | |
902 | INIT_LIST_HEAD(&pcs->functions); | |
903 | ||
904 | PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, | |
905 | "register width not specified\n"); | |
906 | ||
907 | PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask, | |
908 | "function register mask not specified\n"); | |
909 | pcs->fshift = ffs(pcs->fmask) - 1; | |
910 | pcs->fmax = pcs->fmask >> pcs->fshift; | |
911 | ||
912 | ret = of_property_read_u32(np, "pinctrl-single,function-off", | |
913 | &pcs->foff); | |
914 | if (ret) | |
915 | pcs->foff = PCS_OFF_DISABLED; | |
916 | ||
9e605cb6 PU |
917 | pcs->bits_per_mux = of_property_read_bool(np, |
918 | "pinctrl-single,bit-per-mux"); | |
919 | ||
8b8b091b TL |
920 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
921 | if (!res) { | |
922 | dev_err(pcs->dev, "could not get resource\n"); | |
923 | return -ENODEV; | |
924 | } | |
925 | ||
926 | pcs->res = devm_request_mem_region(pcs->dev, res->start, | |
927 | resource_size(res), DRIVER_NAME); | |
928 | if (!pcs->res) { | |
929 | dev_err(pcs->dev, "could not get mem_region\n"); | |
930 | return -EBUSY; | |
931 | } | |
932 | ||
933 | pcs->size = resource_size(pcs->res); | |
934 | pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size); | |
935 | if (!pcs->base) { | |
936 | dev_err(pcs->dev, "could not ioremap\n"); | |
937 | return -ENODEV; | |
938 | } | |
939 | ||
940 | INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL); | |
941 | INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL); | |
942 | platform_set_drvdata(pdev, pcs); | |
943 | ||
944 | switch (pcs->width) { | |
945 | case 8: | |
946 | pcs->read = pcs_readb; | |
947 | pcs->write = pcs_writeb; | |
948 | break; | |
949 | case 16: | |
950 | pcs->read = pcs_readw; | |
951 | pcs->write = pcs_writew; | |
952 | break; | |
953 | case 32: | |
954 | pcs->read = pcs_readl; | |
955 | pcs->write = pcs_writel; | |
956 | break; | |
957 | default: | |
958 | break; | |
959 | } | |
960 | ||
961 | pcs->desc.name = DRIVER_NAME; | |
962 | pcs->desc.pctlops = &pcs_pinctrl_ops; | |
963 | pcs->desc.pmxops = &pcs_pinmux_ops; | |
964 | pcs->desc.confops = &pcs_pinconf_ops; | |
965 | pcs->desc.owner = THIS_MODULE; | |
966 | ||
967 | ret = pcs_allocate_pin_table(pcs); | |
968 | if (ret < 0) | |
969 | goto free; | |
970 | ||
971 | pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs); | |
972 | if (!pcs->pctl) { | |
973 | dev_err(pcs->dev, "could not register single pinctrl driver\n"); | |
974 | ret = -EINVAL; | |
975 | goto free; | |
976 | } | |
977 | ||
978 | dev_info(pcs->dev, "%i pins at pa %p size %u\n", | |
979 | pcs->desc.npins, pcs->base, pcs->size); | |
980 | ||
981 | return 0; | |
982 | ||
983 | free: | |
984 | pcs_free_resources(pcs); | |
985 | ||
986 | return ret; | |
987 | } | |
988 | ||
f90f54b3 | 989 | static int pcs_remove(struct platform_device *pdev) |
8b8b091b TL |
990 | { |
991 | struct pcs_device *pcs = platform_get_drvdata(pdev); | |
992 | ||
993 | if (!pcs) | |
994 | return 0; | |
995 | ||
996 | pcs_free_resources(pcs); | |
997 | ||
998 | return 0; | |
999 | } | |
1000 | ||
99688ed7 | 1001 | static struct of_device_id pcs_of_match[] = { |
8b8b091b TL |
1002 | { .compatible = DRIVER_NAME, }, |
1003 | { }, | |
1004 | }; | |
1005 | MODULE_DEVICE_TABLE(of, pcs_of_match); | |
1006 | ||
1007 | static struct platform_driver pcs_driver = { | |
1008 | .probe = pcs_probe, | |
2a36f086 | 1009 | .remove = pcs_remove, |
8b8b091b TL |
1010 | .driver = { |
1011 | .owner = THIS_MODULE, | |
1012 | .name = DRIVER_NAME, | |
1013 | .of_match_table = pcs_of_match, | |
1014 | }, | |
1015 | }; | |
1016 | ||
1017 | module_platform_driver(pcs_driver); | |
1018 | ||
1019 | MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>"); | |
1020 | MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver"); | |
1021 | MODULE_LICENSE("GPL v2"); |