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30574f0d TA |
1 | /* |
2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | */ | |
16 | ||
17 | #ifndef __PINCTRL_SAMSUNG_H | |
18 | #define __PINCTRL_SAMSUNG_H | |
19 | ||
20 | #include <linux/pinctrl/pinctrl.h> | |
21 | #include <linux/pinctrl/pinmux.h> | |
22 | #include <linux/pinctrl/pinconf.h> | |
23 | #include <linux/pinctrl/consumer.h> | |
24 | #include <linux/pinctrl/machine.h> | |
25 | ||
26 | /* register offsets within a pin bank */ | |
27 | #define DAT_REG 0x4 | |
28 | #define PUD_REG 0x8 | |
29 | #define DRV_REG 0xC | |
30 | #define CONPDN_REG 0x10 | |
31 | #define PUDPDN_REG 0x14 | |
32 | ||
33 | /* pinmux function number for pin as gpio output line */ | |
34 | #define FUNC_OUTPUT 0x1 | |
35 | ||
36 | /** | |
37 | * enum pincfg_type - possible pin configuration types supported. | |
38 | * @PINCFG_TYPE_PUD: Pull up/down configuration. | |
39 | * @PINCFG_TYPE_DRV: Drive strength configuration. | |
40 | * @PINCFG_TYPE_CON_PDN: Pin function in power down mode. | |
41 | * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode. | |
42 | */ | |
43 | enum pincfg_type { | |
44 | PINCFG_TYPE_PUD, | |
45 | PINCFG_TYPE_DRV, | |
46 | PINCFG_TYPE_CON_PDN, | |
47 | PINCFG_TYPE_PUD_PDN, | |
48 | }; | |
49 | ||
50 | /* | |
51 | * pin configuration (pull up/down and drive strength) type and its value are | |
52 | * packed together into a 16-bits. The upper 8-bits represent the configuration | |
53 | * type and the lower 8-bits hold the value of the configuration type. | |
54 | */ | |
55 | #define PINCFG_TYPE_MASK 0xFF | |
56 | #define PINCFG_VALUE_SHIFT 8 | |
57 | #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT) | |
58 | #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type) | |
59 | #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK) | |
60 | #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \ | |
61 | PINCFG_VALUE_SHIFT) | |
62 | /** | |
63 | * enum eint_type - possible external interrupt types. | |
64 | * @EINT_TYPE_NONE: bank does not support external interrupts | |
65 | * @EINT_TYPE_GPIO: bank supportes external gpio interrupts | |
66 | * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts | |
67 | * | |
68 | * Samsung GPIO controller groups all the available pins into banks. The pins | |
69 | * in a pin bank can support external gpio interrupts or external wakeup | |
70 | * interrupts or no interrupts at all. From a software perspective, the only | |
71 | * difference between external gpio and external wakeup interrupts is that | |
72 | * the wakeup interrupts can additionally wakeup the system if it is in | |
73 | * suspended state. | |
74 | */ | |
75 | enum eint_type { | |
76 | EINT_TYPE_NONE, | |
77 | EINT_TYPE_GPIO, | |
78 | EINT_TYPE_WKUP, | |
79 | }; | |
80 | ||
81 | /* maximum length of a pin in pin descriptor (example: "gpa0-0") */ | |
82 | #define PIN_NAME_LENGTH 10 | |
83 | ||
84 | #define PIN_GROUP(n, p, f) \ | |
85 | { \ | |
86 | .name = n, \ | |
87 | .pins = p, \ | |
88 | .num_pins = ARRAY_SIZE(p), \ | |
89 | .func = f \ | |
90 | } | |
91 | ||
92 | #define PMX_FUNC(n, g) \ | |
93 | { \ | |
94 | .name = n, \ | |
95 | .groups = g, \ | |
96 | .num_groups = ARRAY_SIZE(g), \ | |
97 | } | |
98 | ||
99 | struct samsung_pinctrl_drv_data; | |
100 | ||
101 | /** | |
102 | * struct samsung_pin_bank: represent a controller pin-bank. | |
103 | * @reg_offset: starting offset of the pin-bank registers. | |
104 | * @pin_base: starting pin number of the bank. | |
105 | * @nr_pins: number of pins included in this bank. | |
106 | * @func_width: width of the function selector bit field. | |
107 | * @pud_width: width of the pin pull up/down selector bit field. | |
108 | * @drv_width: width of the pin driver strength selector bit field. | |
109 | * @conpdn_width: width of the sleep mode function selector bin field. | |
110 | * @pudpdn_width: width of the sleep mode pull up/down selector bit field. | |
111 | * @eint_type: type of the external interrupt supported by the bank. | |
112 | * @irq_base: starting controller local irq number of the bank. | |
113 | * @name: name to be prefixed for each pin in this pin bank. | |
ab663789 | 114 | * @of_node: OF node of the bank. |
30574f0d TA |
115 | */ |
116 | struct samsung_pin_bank { | |
117 | u32 pctl_offset; | |
118 | u32 pin_base; | |
119 | u8 nr_pins; | |
120 | u8 func_width; | |
121 | u8 pud_width; | |
122 | u8 drv_width; | |
123 | u8 conpdn_width; | |
124 | u8 pudpdn_width; | |
125 | enum eint_type eint_type; | |
126 | u32 irq_base; | |
127 | char *name; | |
ab663789 | 128 | struct device_node *of_node; |
30574f0d TA |
129 | }; |
130 | ||
131 | /** | |
132 | * struct samsung_pin_ctrl: represent a pin controller. | |
133 | * @pin_banks: list of pin banks included in this controller. | |
134 | * @nr_banks: number of pin banks. | |
135 | * @base: starting system wide pin number. | |
136 | * @nr_pins: number of pins supported by the controller. | |
137 | * @nr_gint: number of external gpio interrupts supported. | |
138 | * @nr_wint: number of external wakeup interrupts supported. | |
139 | * @geint_con: offset of the ext-gpio controller registers. | |
140 | * @geint_mask: offset of the ext-gpio interrupt mask registers. | |
141 | * @geint_pend: offset of the ext-gpio interrupt pending registers. | |
142 | * @weint_con: offset of the ext-wakeup controller registers. | |
143 | * @weint_mask: offset of the ext-wakeup interrupt mask registers. | |
144 | * @weint_pend: offset of the ext-wakeup interrupt pending registers. | |
145 | * @svc: offset of the interrupt service register. | |
146 | * @eint_gpio_init: platform specific callback to setup the external gpio | |
147 | * interrupts for the controller. | |
148 | * @eint_wkup_init: platform specific callback to setup the external wakeup | |
149 | * interrupts for the controller. | |
150 | * @label: for debug information. | |
151 | */ | |
152 | struct samsung_pin_ctrl { | |
153 | struct samsung_pin_bank *pin_banks; | |
154 | u32 nr_banks; | |
155 | ||
156 | u32 base; | |
157 | u32 nr_pins; | |
158 | u32 nr_gint; | |
159 | u32 nr_wint; | |
160 | ||
161 | u32 geint_con; | |
162 | u32 geint_mask; | |
163 | u32 geint_pend; | |
164 | ||
165 | u32 weint_con; | |
166 | u32 weint_mask; | |
167 | u32 weint_pend; | |
168 | ||
169 | u32 svc; | |
170 | ||
171 | int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *); | |
172 | int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *); | |
173 | char *label; | |
174 | }; | |
175 | ||
176 | /** | |
177 | * struct samsung_pinctrl_drv_data: wrapper for holding driver data together. | |
178 | * @virt_base: register base address of the controller. | |
179 | * @dev: device instance representing the controller. | |
180 | * @irq: interrpt number used by the controller to notify gpio interrupts. | |
181 | * @ctrl: pin controller instance managed by the driver. | |
182 | * @pctl: pin controller descriptor registered with the pinctrl subsystem. | |
183 | * @pctl_dev: cookie representing pinctrl device instance. | |
184 | * @pin_groups: list of pin groups available to the driver. | |
185 | * @nr_groups: number of such pin groups. | |
186 | * @pmx_functions: list of pin functions available to the driver. | |
187 | * @nr_function: number of such pin functions. | |
188 | * @gc: gpio_chip instance registered with gpiolib. | |
189 | * @grange: linux gpio pin range supported by this controller. | |
190 | */ | |
191 | struct samsung_pinctrl_drv_data { | |
192 | void __iomem *virt_base; | |
193 | struct device *dev; | |
194 | int irq; | |
195 | ||
196 | struct samsung_pin_ctrl *ctrl; | |
197 | struct pinctrl_desc pctl; | |
198 | struct pinctrl_dev *pctl_dev; | |
199 | ||
200 | const struct samsung_pin_group *pin_groups; | |
201 | unsigned int nr_groups; | |
202 | const struct samsung_pmx_func *pmx_functions; | |
203 | unsigned int nr_functions; | |
204 | ||
205 | struct irq_domain *gpio_irqd; | |
206 | struct irq_domain *wkup_irqd; | |
207 | ||
208 | struct gpio_chip *gc; | |
209 | struct pinctrl_gpio_range grange; | |
210 | }; | |
211 | ||
212 | /** | |
213 | * struct samsung_pin_group: represent group of pins of a pinmux function. | |
214 | * @name: name of the pin group, used to lookup the group. | |
215 | * @pins: the pins included in this group. | |
216 | * @num_pins: number of pins included in this group. | |
217 | * @func: the function number to be programmed when selected. | |
218 | */ | |
219 | struct samsung_pin_group { | |
220 | const char *name; | |
221 | const unsigned int *pins; | |
222 | u8 num_pins; | |
223 | u8 func; | |
224 | }; | |
225 | ||
226 | /** | |
227 | * struct samsung_pmx_func: represent a pin function. | |
228 | * @name: name of the pin function, used to lookup the function. | |
229 | * @groups: one or more names of pin groups that provide this function. | |
230 | * @num_groups: number of groups included in @groups. | |
231 | */ | |
232 | struct samsung_pmx_func { | |
233 | const char *name; | |
234 | const char **groups; | |
235 | u8 num_groups; | |
236 | }; | |
237 | ||
238 | /* list of all exported SoC specific data */ | |
239 | extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; | |
240 | ||
241 | #endif /* __PINCTRL_SAMSUNG_H */ |