[linux-2.6-block.git] / drivers / pinctrl / pinctrl-imx.h

/*
 * IMX pinmux core definitions
 *
 * Copyright (C) 2012 Freescale Semiconductor, Inc.
 * Copyright (C) 2012 Linaro Ltd.
 *
 * Author: Dong Aisheng <dong.aisheng@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef __DRIVERS_PINCTRL_IMX_H
#define __DRIVERS_PINCTRL_IMX_H

struct platform_device;

/**
 * struct imx_pin_group - describes an IMX pin group
 * @name: the name of this specific pin group
 * @pins: an array of discrete physical pins used in this group, taken
 *	from the driver-local pin enumeration space
 * @npins: the number of pins in this group array, i.e. the number of
 *	elements in .pins so we can iterate over that array
 * @mux_mode: the mux mode for each pin in this group. The size of this
 *	array is the same as pins.
 * @input_reg: select input register offset for this mux if any
 *	0 if no select input setting needed.
 * @input_val: the select input value for each pin in this group. The size of
 *	this array is the same as pins.
 * @configs: the config for each pin in this group. The size of this
 *	array is the same as pins.
 */
struct imx_pin_group {
	const char *name;
	unsigned int *pins;
	unsigned npins;
	unsigned int *mux_mode;
	u16 *input_reg;
	unsigned int *input_val;
	unsigned long *configs;
};

/**
 * struct imx_pmx_func - describes IMX pinmux functions
 * @name: the name of this specific function
 * @groups: corresponding pin groups
 * @num_groups: the number of groups
 */
struct imx_pmx_func {
	const char *name;
	const char **groups;
	unsigned num_groups;
};

/**
 * struct imx_pin_reg - describe a pin reg map
 * @mux_reg: mux register offset
 * @conf_reg: config register offset
 */
struct imx_pin_reg {
	u16 mux_reg;
	u16 conf_reg;
};

struct imx_pinctrl_soc_info {
	struct device *dev;
	const struct pinctrl_pin_desc *pins;
	unsigned int npins;
	struct imx_pin_reg *pin_regs;
	struct imx_pin_group *groups;
	unsigned int ngroups;
	struct imx_pmx_func *functions;
	unsigned int nfunctions;
};

#define NO_MUX		0x0
#define NO_PAD		0x0

#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)

#define PAD_CTL_MASK(len)	((1 << len) - 1)
#define IMX_MUX_MASK	0x7
#define IOMUXC_CONFIG_SION	(0x1 << 4)

int imx_pinctrl_probe(struct platform_device *pdev,
			struct imx_pinctrl_soc_info *info);
int imx_pinctrl_remove(struct platform_device *pdev);
#endif /* __DRIVERS_PINCTRL_IMX_H */
Commit	Line	Data
ae75ff81 DA	1	/*
	2	* IMX pinmux core definitions
	3	*
	4	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	5	* Copyright (C) 2012 Linaro Ltd.
	6	*
	7	* Author: Dong Aisheng <dong.aisheng@linaro.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*/
	14
	15	#ifndef __DRIVERS_PINCTRL_IMX_H
	16	#define __DRIVERS_PINCTRL_IMX_H
	17
	18	struct platform_device;
	19
	20	/**
	21	* struct imx_pin_group - describes an IMX pin group
	22	* @name: the name of this specific pin group
	23	* @pins: an array of discrete physical pins used in this group, taken
	24	* from the driver-local pin enumeration space
	25	* @npins: the number of pins in this group array, i.e. the number of
	26	* elements in .pins so we can iterate over that array
	27	* @mux_mode: the mux mode for each pin in this group. The size of this
	28	* array is the same as pins.
e1641531 SG	29	* @input_reg: select input register offset for this mux if any
	30	* 0 if no select input setting needed.
	31	* @input_val: the select input value for each pin in this group. The size of
	32	* this array is the same as pins.
ae75ff81 DA	33	* @configs: the config for each pin in this group. The size of this
	34	* array is the same as pins.
	35	*/
	36	struct imx_pin_group {
	37	const char *name;
	38	unsigned int *pins;
	39	unsigned npins;
	40	unsigned int *mux_mode;
e1641531 SG	41	u16 *input_reg;
e1641531 SG	42	unsigned int *input_val;
ae75ff81 DA	43	unsigned long *configs;
	44	};
	45
	46	/**
	47	* struct imx_pmx_func - describes IMX pinmux functions
	48	* @name: the name of this specific function
	49	* @groups: corresponding pin groups
	50	* @num_groups: the number of groups
	51	*/
	52	struct imx_pmx_func {
	53	const char *name;
	54	const char **groups;
	55	unsigned num_groups;
	56	};
	57
	58	/**
	59	* struct imx_pin_reg - describe a pin reg map
ae75ff81 DA	60	* @mux_reg: mux register offset
ae75ff81 DA	61	* @conf_reg: config register offset
ae75ff81 DA	62	*/
ae75ff81 DA	63	struct imx_pin_reg {
ae75ff81 DA	64	u16 mux_reg;
ae75ff81 DA	65	u16 conf_reg;
ae75ff81 DA	66	};
	67
	68	struct imx_pinctrl_soc_info {
	69	struct device *dev;
	70	const struct pinctrl_pin_desc *pins;
	71	unsigned int npins;
e1641531	72	struct imx_pin_reg *pin_regs;
ae75ff81 DA	73	struct imx_pin_group *groups;
	74	unsigned int ngroups;
	75	struct imx_pmx_func *functions;
	76	unsigned int nfunctions;
	77	};
	78
	79	#define NO_MUX 0x0
	80	#define NO_PAD 0x0
	81
ae75ff81 DA	82	#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
	83
	84	#define PAD_CTL_MASK(len) ((1 << len) - 1)
	85	#define IMX_MUX_MASK 0x7
	86	#define IOMUXC_CONFIG_SION (0x1 << 4)
	87
	88	int imx_pinctrl_probe(struct platform_device *pdev,
	89	struct imx_pinctrl_soc_info *info);
	90	int imx_pinctrl_remove(struct platform_device *pdev);
	91	#endif /* __DRIVERS_PINCTRL_IMX_H */