Commit | Line | Data |
---|---|---|
7e8d9415 SH |
1 | /* |
2 | * Marvell MVEBU pinctrl core driver | |
3 | * | |
4 | * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | |
5 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/platform_device.h> | |
7e8d9415 SH |
14 | #include <linux/slab.h> |
15 | #include <linux/io.h> | |
16 | #include <linux/of.h> | |
17 | #include <linux/of_address.h> | |
18 | #include <linux/of_platform.h> | |
19 | #include <linux/err.h> | |
1c5fb66a | 20 | #include <linux/gpio/driver.h> |
7e8d9415 SH |
21 | #include <linux/pinctrl/machine.h> |
22 | #include <linux/pinctrl/pinconf.h> | |
23 | #include <linux/pinctrl/pinctrl.h> | |
24 | #include <linux/pinctrl/pinmux.h> | |
d068b098 RK |
25 | #include <linux/mfd/syscon.h> |
26 | #include <linux/regmap.h> | |
7e8d9415 | 27 | |
7e8d9415 SH |
28 | #include "pinctrl-mvebu.h" |
29 | ||
30 | #define MPPS_PER_REG 8 | |
31 | #define MPP_BITS 4 | |
32 | #define MPP_MASK 0xf | |
33 | ||
34 | struct mvebu_pinctrl_function { | |
35 | const char *name; | |
36 | const char **groups; | |
37 | unsigned num_groups; | |
38 | }; | |
39 | ||
40 | struct mvebu_pinctrl_group { | |
41 | const char *name; | |
30be3fb9 | 42 | const struct mvebu_mpp_ctrl *ctrl; |
20955c5f | 43 | struct mvebu_mpp_ctrl_data *data; |
7e8d9415 SH |
44 | struct mvebu_mpp_ctrl_setting *settings; |
45 | unsigned num_settings; | |
46 | unsigned gid; | |
47 | unsigned *pins; | |
48 | unsigned npins; | |
49 | }; | |
50 | ||
51 | struct mvebu_pinctrl { | |
52 | struct device *dev; | |
53 | struct pinctrl_dev *pctldev; | |
54 | struct pinctrl_desc desc; | |
7e8d9415 SH |
55 | struct mvebu_pinctrl_group *groups; |
56 | unsigned num_groups; | |
57 | struct mvebu_pinctrl_function *functions; | |
58 | unsigned num_functions; | |
59 | u8 variant; | |
60 | }; | |
61 | ||
44aa9d06 RK |
62 | int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, |
63 | unsigned int pid, unsigned long *config) | |
64 | { | |
65 | unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
66 | unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
67 | ||
68 | *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
73 | int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, | |
74 | unsigned int pid, unsigned long config) | |
75 | { | |
76 | unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
77 | unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
78 | unsigned long reg; | |
79 | ||
80 | reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); | |
81 | writel(reg | (config << shift), data->base + off); | |
82 | ||
83 | return 0; | |
84 | } | |
85 | ||
7e8d9415 SH |
86 | static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid( |
87 | struct mvebu_pinctrl *pctl, unsigned pid) | |
88 | { | |
89 | unsigned n; | |
90 | for (n = 0; n < pctl->num_groups; n++) { | |
91 | if (pid >= pctl->groups[n].pins[0] && | |
92 | pid < pctl->groups[n].pins[0] + | |
93 | pctl->groups[n].npins) | |
94 | return &pctl->groups[n]; | |
95 | } | |
96 | return NULL; | |
97 | } | |
98 | ||
99 | static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name( | |
100 | struct mvebu_pinctrl *pctl, const char *name) | |
101 | { | |
102 | unsigned n; | |
103 | for (n = 0; n < pctl->num_groups; n++) { | |
104 | if (strcmp(name, pctl->groups[n].name) == 0) | |
105 | return &pctl->groups[n]; | |
106 | } | |
107 | return NULL; | |
108 | } | |
109 | ||
110 | static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val( | |
111 | struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, | |
112 | unsigned long config) | |
113 | { | |
114 | unsigned n; | |
115 | for (n = 0; n < grp->num_settings; n++) { | |
116 | if (config == grp->settings[n].val) { | |
117 | if (!pctl->variant || (pctl->variant & | |
118 | grp->settings[n].variant)) | |
119 | return &grp->settings[n]; | |
120 | } | |
121 | } | |
122 | return NULL; | |
123 | } | |
124 | ||
125 | static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name( | |
126 | struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, | |
127 | const char *name) | |
128 | { | |
129 | unsigned n; | |
130 | for (n = 0; n < grp->num_settings; n++) { | |
131 | if (strcmp(name, grp->settings[n].name) == 0) { | |
132 | if (!pctl->variant || (pctl->variant & | |
133 | grp->settings[n].variant)) | |
134 | return &grp->settings[n]; | |
135 | } | |
136 | } | |
137 | return NULL; | |
138 | } | |
139 | ||
140 | static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting( | |
141 | struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp) | |
142 | { | |
143 | unsigned n; | |
144 | for (n = 0; n < grp->num_settings; n++) { | |
145 | if (grp->settings[n].flags & | |
146 | (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { | |
147 | if (!pctl->variant || (pctl->variant & | |
148 | grp->settings[n].variant)) | |
149 | return &grp->settings[n]; | |
150 | } | |
151 | } | |
152 | return NULL; | |
153 | } | |
154 | ||
155 | static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name( | |
156 | struct mvebu_pinctrl *pctl, const char *name) | |
157 | { | |
158 | unsigned n; | |
159 | for (n = 0; n < pctl->num_functions; n++) { | |
160 | if (strcmp(name, pctl->functions[n].name) == 0) | |
161 | return &pctl->functions[n]; | |
162 | } | |
163 | return NULL; | |
164 | } | |
165 | ||
7e8d9415 SH |
166 | static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, |
167 | unsigned gid, unsigned long *config) | |
168 | { | |
169 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
170 | struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; | |
171 | ||
172 | if (!grp->ctrl) | |
173 | return -EINVAL; | |
174 | ||
20955c5f | 175 | return grp->ctrl->mpp_get(grp->data, grp->pins[0], config); |
7e8d9415 SH |
176 | } |
177 | ||
178 | static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, | |
03b054e9 SY |
179 | unsigned gid, unsigned long *configs, |
180 | unsigned num_configs) | |
7e8d9415 SH |
181 | { |
182 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
183 | struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; | |
03b054e9 | 184 | int i, ret; |
7e8d9415 SH |
185 | |
186 | if (!grp->ctrl) | |
187 | return -EINVAL; | |
188 | ||
03b054e9 | 189 | for (i = 0; i < num_configs; i++) { |
20955c5f | 190 | ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]); |
03b054e9 SY |
191 | if (ret) |
192 | return ret; | |
193 | } /* for each config */ | |
194 | ||
195 | return 0; | |
7e8d9415 SH |
196 | } |
197 | ||
198 | static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, | |
199 | struct seq_file *s, unsigned gid) | |
200 | { | |
201 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
202 | struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; | |
203 | struct mvebu_mpp_ctrl_setting *curr; | |
204 | unsigned long config; | |
205 | unsigned n; | |
206 | ||
207 | if (mvebu_pinconf_group_get(pctldev, gid, &config)) | |
208 | return; | |
209 | ||
210 | curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config); | |
211 | ||
212 | if (curr) { | |
213 | seq_printf(s, "current: %s", curr->name); | |
214 | if (curr->subname) | |
215 | seq_printf(s, "(%s)", curr->subname); | |
216 | if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { | |
a61266eb | 217 | seq_putc(s, '('); |
7e8d9415 | 218 | if (curr->flags & MVEBU_SETTING_GPI) |
a61266eb | 219 | seq_putc(s, 'i'); |
7e8d9415 | 220 | if (curr->flags & MVEBU_SETTING_GPO) |
a61266eb ME |
221 | seq_putc(s, 'o'); |
222 | seq_putc(s, ')'); | |
7e8d9415 | 223 | } |
420dc616 ME |
224 | } else { |
225 | seq_puts(s, "current: UNKNOWN"); | |
226 | } | |
7e8d9415 SH |
227 | |
228 | if (grp->num_settings > 1) { | |
420dc616 | 229 | seq_puts(s, ", available = ["); |
7e8d9415 SH |
230 | for (n = 0; n < grp->num_settings; n++) { |
231 | if (curr == &grp->settings[n]) | |
232 | continue; | |
233 | ||
234 | /* skip unsupported settings for this variant */ | |
235 | if (pctl->variant && | |
236 | !(pctl->variant & grp->settings[n].variant)) | |
237 | continue; | |
238 | ||
239 | seq_printf(s, " %s", grp->settings[n].name); | |
240 | if (grp->settings[n].subname) | |
241 | seq_printf(s, "(%s)", grp->settings[n].subname); | |
242 | if (grp->settings[n].flags & | |
243 | (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { | |
a61266eb | 244 | seq_putc(s, '('); |
7e8d9415 | 245 | if (grp->settings[n].flags & MVEBU_SETTING_GPI) |
a61266eb | 246 | seq_putc(s, 'i'); |
7e8d9415 | 247 | if (grp->settings[n].flags & MVEBU_SETTING_GPO) |
a61266eb ME |
248 | seq_putc(s, 'o'); |
249 | seq_putc(s, ')'); | |
7e8d9415 SH |
250 | } |
251 | } | |
420dc616 | 252 | seq_puts(s, " ]"); |
7e8d9415 | 253 | } |
7e8d9415 SH |
254 | } |
255 | ||
022ab148 | 256 | static const struct pinconf_ops mvebu_pinconf_ops = { |
7e8d9415 SH |
257 | .pin_config_group_get = mvebu_pinconf_group_get, |
258 | .pin_config_group_set = mvebu_pinconf_group_set, | |
259 | .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show, | |
260 | }; | |
261 | ||
262 | static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev) | |
263 | { | |
264 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
265 | ||
266 | return pctl->num_functions; | |
267 | } | |
268 | ||
269 | static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev, | |
270 | unsigned fid) | |
271 | { | |
272 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
273 | ||
274 | return pctl->functions[fid].name; | |
275 | } | |
276 | ||
277 | static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid, | |
278 | const char * const **groups, | |
279 | unsigned * const num_groups) | |
280 | { | |
281 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
282 | ||
283 | *groups = pctl->functions[fid].groups; | |
284 | *num_groups = pctl->functions[fid].num_groups; | |
285 | return 0; | |
286 | } | |
287 | ||
03e9f0ca LW |
288 | static int mvebu_pinmux_set(struct pinctrl_dev *pctldev, unsigned fid, |
289 | unsigned gid) | |
7e8d9415 SH |
290 | { |
291 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
292 | struct mvebu_pinctrl_function *func = &pctl->functions[fid]; | |
293 | struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; | |
294 | struct mvebu_mpp_ctrl_setting *setting; | |
295 | int ret; | |
03b054e9 | 296 | unsigned long config; |
7e8d9415 SH |
297 | |
298 | setting = mvebu_pinctrl_find_setting_by_name(pctl, grp, | |
299 | func->name); | |
300 | if (!setting) { | |
301 | dev_err(pctl->dev, | |
302 | "unable to find setting %s in group %s\n", | |
303 | func->name, func->groups[gid]); | |
304 | return -EINVAL; | |
305 | } | |
306 | ||
03b054e9 SY |
307 | config = setting->val; |
308 | ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); | |
7e8d9415 SH |
309 | if (ret) { |
310 | dev_err(pctl->dev, "cannot set group %s to %s\n", | |
311 | func->groups[gid], func->name); | |
312 | return ret; | |
313 | } | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
318 | static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, | |
319 | struct pinctrl_gpio_range *range, unsigned offset) | |
320 | { | |
321 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
322 | struct mvebu_pinctrl_group *grp; | |
323 | struct mvebu_mpp_ctrl_setting *setting; | |
03b054e9 | 324 | unsigned long config; |
7e8d9415 SH |
325 | |
326 | grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); | |
327 | if (!grp) | |
328 | return -EINVAL; | |
329 | ||
330 | if (grp->ctrl->mpp_gpio_req) | |
20955c5f | 331 | return grp->ctrl->mpp_gpio_req(grp->data, offset); |
7e8d9415 SH |
332 | |
333 | setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); | |
334 | if (!setting) | |
335 | return -ENOTSUPP; | |
336 | ||
03b054e9 SY |
337 | config = setting->val; |
338 | ||
339 | return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); | |
7e8d9415 SH |
340 | } |
341 | ||
342 | static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, | |
343 | struct pinctrl_gpio_range *range, unsigned offset, bool input) | |
344 | { | |
345 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
346 | struct mvebu_pinctrl_group *grp; | |
347 | struct mvebu_mpp_ctrl_setting *setting; | |
348 | ||
349 | grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); | |
350 | if (!grp) | |
351 | return -EINVAL; | |
352 | ||
353 | if (grp->ctrl->mpp_gpio_dir) | |
20955c5f | 354 | return grp->ctrl->mpp_gpio_dir(grp->data, offset, input); |
7e8d9415 SH |
355 | |
356 | setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); | |
357 | if (!setting) | |
358 | return -ENOTSUPP; | |
359 | ||
360 | if ((input && (setting->flags & MVEBU_SETTING_GPI)) || | |
361 | (!input && (setting->flags & MVEBU_SETTING_GPO))) | |
362 | return 0; | |
363 | ||
364 | return -ENOTSUPP; | |
365 | } | |
366 | ||
022ab148 | 367 | static const struct pinmux_ops mvebu_pinmux_ops = { |
7e8d9415 SH |
368 | .get_functions_count = mvebu_pinmux_get_funcs_count, |
369 | .get_function_name = mvebu_pinmux_get_func_name, | |
370 | .get_function_groups = mvebu_pinmux_get_groups, | |
371 | .gpio_request_enable = mvebu_pinmux_gpio_request_enable, | |
372 | .gpio_set_direction = mvebu_pinmux_gpio_set_direction, | |
03e9f0ca | 373 | .set_mux = mvebu_pinmux_set, |
7e8d9415 SH |
374 | }; |
375 | ||
376 | static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) | |
377 | { | |
378 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
379 | return pctl->num_groups; | |
380 | } | |
381 | ||
382 | static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev, | |
383 | unsigned gid) | |
384 | { | |
385 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
386 | return pctl->groups[gid].name; | |
387 | } | |
388 | ||
389 | static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, | |
390 | unsigned gid, const unsigned **pins, | |
391 | unsigned *num_pins) | |
392 | { | |
393 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
394 | *pins = pctl->groups[gid].pins; | |
395 | *num_pins = pctl->groups[gid].npins; | |
396 | return 0; | |
397 | } | |
398 | ||
399 | static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, | |
400 | struct device_node *np, | |
401 | struct pinctrl_map **map, | |
402 | unsigned *num_maps) | |
403 | { | |
404 | struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); | |
405 | struct property *prop; | |
406 | const char *function; | |
407 | const char *group; | |
408 | int ret, nmaps, n; | |
409 | ||
410 | *map = NULL; | |
411 | *num_maps = 0; | |
412 | ||
413 | ret = of_property_read_string(np, "marvell,function", &function); | |
414 | if (ret) { | |
415 | dev_err(pctl->dev, | |
94f4e54c | 416 | "missing marvell,function in node %pOFn\n", np); |
7e8d9415 SH |
417 | return 0; |
418 | } | |
419 | ||
420 | nmaps = of_property_count_strings(np, "marvell,pins"); | |
421 | if (nmaps < 0) { | |
422 | dev_err(pctl->dev, | |
94f4e54c | 423 | "missing marvell,pins in node %pOFn\n", np); |
7e8d9415 SH |
424 | return 0; |
425 | } | |
426 | ||
e6e965ce | 427 | *map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL); |
77d3d2e2 | 428 | if (!*map) |
7e8d9415 | 429 | return -ENOMEM; |
7e8d9415 SH |
430 | |
431 | n = 0; | |
432 | of_property_for_each_string(np, "marvell,pins", prop, group) { | |
433 | struct mvebu_pinctrl_group *grp = | |
434 | mvebu_pinctrl_find_group_by_name(pctl, group); | |
435 | ||
436 | if (!grp) { | |
437 | dev_err(pctl->dev, "unknown pin %s", group); | |
438 | continue; | |
439 | } | |
440 | ||
441 | if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) { | |
442 | dev_err(pctl->dev, "unsupported function %s on pin %s", | |
443 | function, group); | |
444 | continue; | |
445 | } | |
446 | ||
447 | (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP; | |
448 | (*map)[n].data.mux.group = group; | |
449 | (*map)[n].data.mux.function = function; | |
450 | n++; | |
451 | } | |
452 | ||
453 | *num_maps = nmaps; | |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
458 | static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, | |
459 | struct pinctrl_map *map, unsigned num_maps) | |
460 | { | |
461 | kfree(map); | |
462 | } | |
463 | ||
022ab148 | 464 | static const struct pinctrl_ops mvebu_pinctrl_ops = { |
7e8d9415 SH |
465 | .get_groups_count = mvebu_pinctrl_get_groups_count, |
466 | .get_group_name = mvebu_pinctrl_get_group_name, | |
467 | .get_group_pins = mvebu_pinctrl_get_group_pins, | |
468 | .dt_node_to_map = mvebu_pinctrl_dt_node_to_map, | |
469 | .dt_free_map = mvebu_pinctrl_dt_free_map, | |
470 | }; | |
471 | ||
aaed651f DW |
472 | static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize, |
473 | const char *name) | |
7e8d9415 | 474 | { |
aaed651f DW |
475 | if (*funcsize <= 0) |
476 | return -EOVERFLOW; | |
477 | ||
7e8d9415 SH |
478 | while (funcs->num_groups) { |
479 | /* function already there */ | |
480 | if (strcmp(funcs->name, name) == 0) { | |
481 | funcs->num_groups++; | |
482 | return -EEXIST; | |
483 | } | |
484 | funcs++; | |
485 | } | |
aaed651f DW |
486 | |
487 | /* append new unique function */ | |
7e8d9415 SH |
488 | funcs->name = name; |
489 | funcs->num_groups = 1; | |
aaed651f DW |
490 | (*funcsize)--; |
491 | ||
7e8d9415 SH |
492 | return 0; |
493 | } | |
494 | ||
150632b0 GKH |
495 | static int mvebu_pinctrl_build_functions(struct platform_device *pdev, |
496 | struct mvebu_pinctrl *pctl) | |
7e8d9415 SH |
497 | { |
498 | struct mvebu_pinctrl_function *funcs; | |
aaed651f | 499 | int num = 0, funcsize = pctl->desc.npins; |
7e8d9415 SH |
500 | int n, s; |
501 | ||
502 | /* we allocate functions for number of pins and hope | |
aaed651f | 503 | * there are fewer unique functions than pins available */ |
a86854d0 KC |
504 | funcs = devm_kcalloc(&pdev->dev, |
505 | funcsize, sizeof(struct mvebu_pinctrl_function), | |
506 | GFP_KERNEL); | |
7e8d9415 SH |
507 | if (!funcs) |
508 | return -ENOMEM; | |
509 | ||
510 | for (n = 0; n < pctl->num_groups; n++) { | |
511 | struct mvebu_pinctrl_group *grp = &pctl->groups[n]; | |
512 | for (s = 0; s < grp->num_settings; s++) { | |
aaed651f DW |
513 | int ret; |
514 | ||
7e8d9415 SH |
515 | /* skip unsupported settings on this variant */ |
516 | if (pctl->variant && | |
517 | !(pctl->variant & grp->settings[s].variant)) | |
518 | continue; | |
519 | ||
520 | /* check for unique functions and count groups */ | |
aaed651f DW |
521 | ret = _add_function(funcs, &funcsize, |
522 | grp->settings[s].name); | |
523 | if (ret == -EOVERFLOW) | |
524 | dev_err(&pdev->dev, | |
525 | "More functions than pins(%d)\n", | |
526 | pctl->desc.npins); | |
527 | if (ret < 0) | |
7e8d9415 SH |
528 | continue; |
529 | ||
530 | num++; | |
531 | } | |
532 | } | |
533 | ||
7e8d9415 SH |
534 | pctl->num_functions = num; |
535 | pctl->functions = funcs; | |
536 | ||
537 | for (n = 0; n < pctl->num_groups; n++) { | |
538 | struct mvebu_pinctrl_group *grp = &pctl->groups[n]; | |
539 | for (s = 0; s < grp->num_settings; s++) { | |
540 | struct mvebu_pinctrl_function *f; | |
541 | const char **groups; | |
542 | ||
543 | /* skip unsupported settings on this variant */ | |
544 | if (pctl->variant && | |
545 | !(pctl->variant & grp->settings[s].variant)) | |
546 | continue; | |
547 | ||
548 | f = mvebu_pinctrl_find_function_by_name(pctl, | |
549 | grp->settings[s].name); | |
550 | ||
551 | /* allocate group name array if not done already */ | |
552 | if (!f->groups) { | |
a86854d0 KC |
553 | f->groups = devm_kcalloc(&pdev->dev, |
554 | f->num_groups, | |
555 | sizeof(char *), | |
7e8d9415 SH |
556 | GFP_KERNEL); |
557 | if (!f->groups) | |
558 | return -ENOMEM; | |
559 | } | |
560 | ||
561 | /* find next free group name and assign current name */ | |
562 | groups = f->groups; | |
563 | while (*groups) | |
564 | groups++; | |
565 | *groups = grp->name; | |
566 | } | |
567 | } | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
150632b0 | 572 | int mvebu_pinctrl_probe(struct platform_device *pdev) |
7e8d9415 SH |
573 | { |
574 | struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); | |
7e8d9415 | 575 | struct mvebu_pinctrl *pctl; |
7e8d9415 SH |
576 | struct pinctrl_pin_desc *pdesc; |
577 | unsigned gid, n, k; | |
8d898fd5 SH |
578 | unsigned size, noname = 0; |
579 | char *noname_buf; | |
580 | void *p; | |
7e8d9415 SH |
581 | int ret; |
582 | ||
583 | if (!soc || !soc->controls || !soc->modes) { | |
584 | dev_err(&pdev->dev, "wrong pinctrl soc info\n"); | |
585 | return -EINVAL; | |
586 | } | |
587 | ||
7e8d9415 SH |
588 | pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl), |
589 | GFP_KERNEL); | |
77d3d2e2 | 590 | if (!pctl) |
7e8d9415 | 591 | return -ENOMEM; |
7e8d9415 SH |
592 | |
593 | pctl->desc.name = dev_name(&pdev->dev); | |
594 | pctl->desc.owner = THIS_MODULE; | |
595 | pctl->desc.pctlops = &mvebu_pinctrl_ops; | |
596 | pctl->desc.pmxops = &mvebu_pinmux_ops; | |
597 | pctl->desc.confops = &mvebu_pinconf_ops; | |
598 | pctl->variant = soc->variant; | |
7e8d9415 SH |
599 | pctl->dev = &pdev->dev; |
600 | platform_set_drvdata(pdev, pctl); | |
601 | ||
602 | /* count controls and create names for mvebu generic | |
603 | register controls; also does sanity checks */ | |
604 | pctl->num_groups = 0; | |
605 | pctl->desc.npins = 0; | |
606 | for (n = 0; n < soc->ncontrols; n++) { | |
30be3fb9 | 607 | const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; |
7e8d9415 SH |
608 | |
609 | pctl->desc.npins += ctrl->npins; | |
e310b745 | 610 | /* initialize control's pins[] array */ |
7e8d9415 SH |
611 | for (k = 0; k < ctrl->npins; k++) |
612 | ctrl->pins[k] = ctrl->pid + k; | |
613 | ||
e310b745 SH |
614 | /* |
615 | * We allow to pass controls with NULL name that we treat | |
616 | * as a range of one-pin groups with generic mvebu register | |
617 | * controls. | |
618 | */ | |
619 | if (!ctrl->name) { | |
620 | pctl->num_groups += ctrl->npins; | |
621 | noname += ctrl->npins; | |
622 | } else { | |
7e8d9415 | 623 | pctl->num_groups += 1; |
7e8d9415 | 624 | } |
7e8d9415 SH |
625 | } |
626 | ||
a86854d0 KC |
627 | pdesc = devm_kcalloc(&pdev->dev, |
628 | pctl->desc.npins, | |
629 | sizeof(struct pinctrl_pin_desc), | |
630 | GFP_KERNEL); | |
77d3d2e2 | 631 | if (!pdesc) |
7e8d9415 | 632 | return -ENOMEM; |
7e8d9415 SH |
633 | |
634 | for (n = 0; n < pctl->desc.npins; n++) | |
635 | pdesc[n].number = n; | |
636 | pctl->desc.pins = pdesc; | |
637 | ||
8d898fd5 SH |
638 | /* |
639 | * allocate groups and name buffers for unnamed groups. | |
640 | */ | |
641 | size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8; | |
642 | p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); | |
bca50ce0 | 643 | if (!p) |
7e8d9415 | 644 | return -ENOMEM; |
bca50ce0 | 645 | |
8d898fd5 SH |
646 | pctl->groups = p; |
647 | noname_buf = p + pctl->num_groups * sizeof(*pctl->groups); | |
7e8d9415 SH |
648 | |
649 | /* assign mpp controls to groups */ | |
650 | gid = 0; | |
651 | for (n = 0; n < soc->ncontrols; n++) { | |
30be3fb9 | 652 | const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; |
20955c5f RK |
653 | struct mvebu_mpp_ctrl_data *data = soc->control_data ? |
654 | &soc->control_data[n] : NULL; | |
655 | ||
7e8d9415 SH |
656 | pctl->groups[gid].gid = gid; |
657 | pctl->groups[gid].ctrl = ctrl; | |
20955c5f | 658 | pctl->groups[gid].data = data; |
7e8d9415 SH |
659 | pctl->groups[gid].name = ctrl->name; |
660 | pctl->groups[gid].pins = ctrl->pins; | |
661 | pctl->groups[gid].npins = ctrl->npins; | |
662 | ||
e310b745 SH |
663 | /* |
664 | * We treat unnamed controls as a range of one-pin groups | |
665 | * with generic mvebu register controls. Use one group for | |
666 | * each in this range and assign a default group name. | |
667 | */ | |
668 | if (!ctrl->name) { | |
8d898fd5 | 669 | pctl->groups[gid].name = noname_buf; |
7e8d9415 | 670 | pctl->groups[gid].npins = 1; |
8d898fd5 SH |
671 | sprintf(noname_buf, "mpp%d", ctrl->pid+0); |
672 | noname_buf += 8; | |
7e8d9415 SH |
673 | |
674 | for (k = 1; k < ctrl->npins; k++) { | |
675 | gid++; | |
676 | pctl->groups[gid].gid = gid; | |
677 | pctl->groups[gid].ctrl = ctrl; | |
20955c5f | 678 | pctl->groups[gid].data = data; |
8d898fd5 | 679 | pctl->groups[gid].name = noname_buf; |
7e8d9415 SH |
680 | pctl->groups[gid].pins = &ctrl->pins[k]; |
681 | pctl->groups[gid].npins = 1; | |
8d898fd5 SH |
682 | sprintf(noname_buf, "mpp%d", ctrl->pid+k); |
683 | noname_buf += 8; | |
7e8d9415 SH |
684 | } |
685 | } | |
686 | gid++; | |
687 | } | |
688 | ||
689 | /* assign mpp modes to groups */ | |
690 | for (n = 0; n < soc->nmodes; n++) { | |
691 | struct mvebu_mpp_mode *mode = &soc->modes[n]; | |
0581b16b SH |
692 | struct mvebu_mpp_ctrl_setting *set = &mode->settings[0]; |
693 | struct mvebu_pinctrl_group *grp; | |
7e8d9415 | 694 | unsigned num_settings; |
7864d926 | 695 | unsigned supp_settings; |
7e8d9415 | 696 | |
7864d926 | 697 | for (num_settings = 0, supp_settings = 0; ; set++) { |
7e8d9415 SH |
698 | if (!set->name) |
699 | break; | |
7e8d9415 | 700 | |
7864d926 SH |
701 | num_settings++; |
702 | ||
7e8d9415 SH |
703 | /* skip unsupported settings for this variant */ |
704 | if (pctl->variant && !(pctl->variant & set->variant)) | |
705 | continue; | |
706 | ||
7864d926 | 707 | supp_settings++; |
0581b16b | 708 | |
7e8d9415 SH |
709 | /* find gpio/gpo/gpi settings */ |
710 | if (strcmp(set->name, "gpio") == 0) | |
711 | set->flags = MVEBU_SETTING_GPI | | |
712 | MVEBU_SETTING_GPO; | |
713 | else if (strcmp(set->name, "gpo") == 0) | |
714 | set->flags = MVEBU_SETTING_GPO; | |
715 | else if (strcmp(set->name, "gpi") == 0) | |
716 | set->flags = MVEBU_SETTING_GPI; | |
717 | } | |
718 | ||
0581b16b | 719 | /* skip modes with no settings for this variant */ |
7864d926 | 720 | if (!supp_settings) |
0581b16b SH |
721 | continue; |
722 | ||
723 | grp = mvebu_pinctrl_find_group_by_pid(pctl, mode->pid); | |
724 | if (!grp) { | |
725 | dev_warn(&pdev->dev, "unknown pinctrl group %d\n", | |
726 | mode->pid); | |
727 | continue; | |
728 | } | |
729 | ||
7e8d9415 SH |
730 | grp->settings = mode->settings; |
731 | grp->num_settings = num_settings; | |
732 | } | |
733 | ||
734 | ret = mvebu_pinctrl_build_functions(pdev, pctl); | |
735 | if (ret) { | |
736 | dev_err(&pdev->dev, "unable to build functions\n"); | |
737 | return ret; | |
738 | } | |
739 | ||
699097a9 | 740 | pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl); |
323de9ef | 741 | if (IS_ERR(pctl->pctldev)) { |
7e8d9415 | 742 | dev_err(&pdev->dev, "unable to register pinctrl driver\n"); |
323de9ef | 743 | return PTR_ERR(pctl->pctldev); |
7e8d9415 SH |
744 | } |
745 | ||
746 | dev_info(&pdev->dev, "registered pinctrl driver\n"); | |
747 | ||
748 | /* register gpio ranges */ | |
749 | for (n = 0; n < soc->ngpioranges; n++) | |
750 | pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]); | |
751 | ||
752 | return 0; | |
753 | } | |
44aa9d06 RK |
754 | |
755 | /* | |
756 | * mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl | |
757 | * @pdev: platform device (with platform data already attached) | |
758 | * | |
759 | * Initialise a simple (single base address) mmio pinctrl driver, | |
760 | * assigning the MMIO base address to all mvebu mpp ctrl instances. | |
761 | */ | |
762 | int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev) | |
763 | { | |
764 | struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); | |
765 | struct mvebu_mpp_ctrl_data *mpp_data; | |
766 | struct resource *res; | |
767 | void __iomem *base; | |
768 | int i; | |
769 | ||
770 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
771 | base = devm_ioremap_resource(&pdev->dev, res); | |
772 | if (IS_ERR(base)) | |
773 | return PTR_ERR(base); | |
774 | ||
775 | mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), | |
776 | GFP_KERNEL); | |
777 | if (!mpp_data) | |
778 | return -ENOMEM; | |
779 | ||
780 | for (i = 0; i < soc->ncontrols; i++) | |
781 | mpp_data[i].base = base; | |
782 | ||
783 | soc->control_data = mpp_data; | |
784 | ||
785 | return mvebu_pinctrl_probe(pdev); | |
786 | } | |
d068b098 RK |
787 | |
788 | int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, | |
789 | unsigned int pid, unsigned long *config) | |
790 | { | |
791 | unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
792 | unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
793 | unsigned int val; | |
794 | int err; | |
795 | ||
796 | err = regmap_read(data->regmap.map, data->regmap.offset + off, &val); | |
797 | if (err) | |
798 | return err; | |
799 | ||
800 | *config = (val >> shift) & MVEBU_MPP_MASK; | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, | |
806 | unsigned int pid, unsigned long config) | |
807 | { | |
808 | unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
809 | unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; | |
810 | ||
811 | return regmap_update_bits(data->regmap.map, data->regmap.offset + off, | |
812 | MVEBU_MPP_MASK << shift, config << shift); | |
813 | } | |
814 | ||
815 | int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev, | |
ef088187 | 816 | struct device *syscon_dev, u32 offset) |
d068b098 RK |
817 | { |
818 | struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); | |
819 | struct mvebu_mpp_ctrl_data *mpp_data; | |
820 | struct regmap *regmap; | |
d068b098 RK |
821 | int i; |
822 | ||
823 | regmap = syscon_node_to_regmap(syscon_dev->of_node); | |
824 | if (IS_ERR(regmap)) | |
825 | return PTR_ERR(regmap); | |
826 | ||
d068b098 RK |
827 | mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), |
828 | GFP_KERNEL); | |
829 | if (!mpp_data) | |
830 | return -ENOMEM; | |
831 | ||
832 | for (i = 0; i < soc->ncontrols; i++) { | |
833 | mpp_data[i].regmap.map = regmap; | |
834 | mpp_data[i].regmap.offset = offset; | |
835 | } | |
836 | ||
837 | soc->control_data = mpp_data; | |
838 | ||
839 | return mvebu_pinctrl_probe(pdev); | |
840 | } |