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Merge branch 'floppy'
[linux-block.git] / drivers / pinctrl / meson / pinctrl-meson8b.c
CommitLineData
3c910ecb 1// SPDX-License-Identifier: GPL-2.0-only
0fefcb68
CC		 2/*
3 * Pin controller and GPIO driver for Amlogic Meson8b.
4 *
5 * Copyright (C) 2015 Endless Mobile, Inc.
6 * Author: Carlo Caione <carlo@endlessm.com>
0fefcb68
CC		 7 */
8
9#include <dt-bindings/gpio/meson8b-gpio.h>
10#include "pinctrl-meson.h"
ce385aa2 11#include "pinctrl-meson8-pmx.h"
0fefcb68 12
9dab1868 13static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
634e40b0
JB		 14 MESON_PIN(GPIOX_0),
15 MESON_PIN(GPIOX_1),
16 MESON_PIN(GPIOX_2),
17 MESON_PIN(GPIOX_3),
18 MESON_PIN(GPIOX_4),
19 MESON_PIN(GPIOX_5),
20 MESON_PIN(GPIOX_6),
21 MESON_PIN(GPIOX_7),
22 MESON_PIN(GPIOX_8),
23 MESON_PIN(GPIOX_9),
24 MESON_PIN(GPIOX_10),
25 MESON_PIN(GPIOX_11),
26 MESON_PIN(GPIOX_16),
27 MESON_PIN(GPIOX_17),
28 MESON_PIN(GPIOX_18),
29 MESON_PIN(GPIOX_19),
30 MESON_PIN(GPIOX_20),
31 MESON_PIN(GPIOX_21),
32
33 MESON_PIN(GPIOY_0),
34 MESON_PIN(GPIOY_1),
35 MESON_PIN(GPIOY_3),
36 MESON_PIN(GPIOY_6),
37 MESON_PIN(GPIOY_7),
38 MESON_PIN(GPIOY_8),
39 MESON_PIN(GPIOY_9),
40 MESON_PIN(GPIOY_10),
41 MESON_PIN(GPIOY_11),
42 MESON_PIN(GPIOY_12),
43 MESON_PIN(GPIOY_13),
44 MESON_PIN(GPIOY_14),
45
46 MESON_PIN(GPIODV_9),
47 MESON_PIN(GPIODV_24),
48 MESON_PIN(GPIODV_25),
49 MESON_PIN(GPIODV_26),
50 MESON_PIN(GPIODV_27),
51 MESON_PIN(GPIODV_28),
52 MESON_PIN(GPIODV_29),
53
54 MESON_PIN(GPIOH_0),
55 MESON_PIN(GPIOH_1),
56 MESON_PIN(GPIOH_2),
57 MESON_PIN(GPIOH_3),
58 MESON_PIN(GPIOH_4),
59 MESON_PIN(GPIOH_5),
60 MESON_PIN(GPIOH_6),
61 MESON_PIN(GPIOH_7),
62 MESON_PIN(GPIOH_8),
63 MESON_PIN(GPIOH_9),
64
65 MESON_PIN(CARD_0),
66 MESON_PIN(CARD_1),
67 MESON_PIN(CARD_2),
68 MESON_PIN(CARD_3),
69 MESON_PIN(CARD_4),
70 MESON_PIN(CARD_5),
71 MESON_PIN(CARD_6),
72
73 MESON_PIN(BOOT_0),
74 MESON_PIN(BOOT_1),
75 MESON_PIN(BOOT_2),
76 MESON_PIN(BOOT_3),
77 MESON_PIN(BOOT_4),
78 MESON_PIN(BOOT_5),
79 MESON_PIN(BOOT_6),
80 MESON_PIN(BOOT_7),
81 MESON_PIN(BOOT_8),
82 MESON_PIN(BOOT_9),
83 MESON_PIN(BOOT_10),
84 MESON_PIN(BOOT_11),
85 MESON_PIN(BOOT_12),
86 MESON_PIN(BOOT_13),
87 MESON_PIN(BOOT_14),
88 MESON_PIN(BOOT_15),
89 MESON_PIN(BOOT_16),
90 MESON_PIN(BOOT_17),
91 MESON_PIN(BOOT_18),
92
93 MESON_PIN(DIF_0_P),
94 MESON_PIN(DIF_0_N),
95 MESON_PIN(DIF_1_P),
96 MESON_PIN(DIF_1_N),
97 MESON_PIN(DIF_2_P),
98 MESON_PIN(DIF_2_N),
99 MESON_PIN(DIF_3_P),
100 MESON_PIN(DIF_3_N),
101 MESON_PIN(DIF_4_P),
102 MESON_PIN(DIF_4_N),
9dab1868 103};
0fefcb68 104
9dab1868 105static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
634e40b0
JB		 106 MESON_PIN(GPIOAO_0),
107 MESON_PIN(GPIOAO_1),
108 MESON_PIN(GPIOAO_2),
109 MESON_PIN(GPIOAO_3),
110 MESON_PIN(GPIOAO_4),
111 MESON_PIN(GPIOAO_5),
112 MESON_PIN(GPIOAO_6),
113 MESON_PIN(GPIOAO_7),
114 MESON_PIN(GPIOAO_8),
115 MESON_PIN(GPIOAO_9),
116 MESON_PIN(GPIOAO_10),
117 MESON_PIN(GPIOAO_11),
118 MESON_PIN(GPIOAO_12),
119 MESON_PIN(GPIOAO_13),
6c9dc843
JB		 120
121 /*
122 * The following 2 pins are not mentionned in the public datasheet
123 * According to this datasheet, they can't be used with the gpio
124 * interrupt controller
125 */
634e40b0
JB		 126 MESON_PIN(GPIO_BSD_EN),
127 MESON_PIN(GPIO_TEST_N),
0fefcb68
CC		 128};
129
130/* bank X */
634e40b0
JB		 131static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
132static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
133static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
134static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
135static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
136static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
137 GPIOX_6, GPIOX_7 };
138static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
139 GPIOX_7 };
140static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
141static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
142static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 };
143static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 };
144static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 };
145static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 };
146static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 };
147static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 };
148
149static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 };
150static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1, GPIOX_2,
151 GPIOX_3 };
152static const unsigned int pcm_out_a_pins[] = { GPIOX_4 };
153static const unsigned int pcm_in_a_pins[] = { GPIOX_5 };
154static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 };
155static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 };
156static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 };
157static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 };
158static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 };
159static const unsigned int pwm_e_pins[] = { GPIOX_10 };
160static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 };
161
162static const unsigned int uart_tx_a_pins[] = { GPIOX_4 };
163static const unsigned int uart_rx_a_pins[] = { GPIOX_5 };
164static const unsigned int uart_cts_a_pins[] = { GPIOX_6 };
165static const unsigned int uart_rts_a_pins[] = { GPIOX_7 };
166static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 };
167static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 };
168static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 };
169static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 };
170
171static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 };
172static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
173static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 };
174static const unsigned int spi_miso_0_pins[] = { GPIOX_9 };
175static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 };
176static const unsigned int iso7816_det_pins[] = { GPIOX_16 };
177static const unsigned int iso7816_reset_pins[] = { GPIOX_17 };
178static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 };
179static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
180static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 };
181
182static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 };
183static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 };
184static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 };
185static const unsigned int pwm_b_pins[] = { GPIOX_11 };
186static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 };
187static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 };
188static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
0fefcb68
CC		 189
190/* bank Y */
634e40b0
JB		 191static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
192static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 };
193static const unsigned int tsin_d17_a_pins[] = {
194 GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14,
195};
196static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 };
197static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 };
0fefcb68 198
634e40b0 199static const unsigned int spdif_out_0_pins[] = { GPIOY_3 };
0fefcb68 200
634e40b0
JB		 201static const unsigned int xtal_24m_pins[] = { GPIOY_3 };
202static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 };
203static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
0fefcb68
CC		 204
205/* bank DV */
634e40b0
JB		 206static const unsigned int pwm_d_pins[] = { GPIODV_28 };
207static const unsigned int pwm_c0_pins[] = { GPIODV_29 };
0fefcb68 208
634e40b0
JB		 209static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 };
210static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 };
211static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 };
0fefcb68 212
634e40b0 213static const unsigned int xtal24_out_pins[] = { GPIODV_29 };
0fefcb68 214
634e40b0
JB		 215static const unsigned int uart_tx_c_pins[] = { GPIODV_24 };
216static const unsigned int uart_rx_c_pins[] = { GPIODV_25 };
217static const unsigned int uart_cts_c_pins[] = { GPIODV_26 };
218static const unsigned int uart_rts_c_pins[] = { GPIODV_27 };
0fefcb68 219
634e40b0 220static const unsigned int pwm_c1_pins[] = { GPIODV_9 };
0fefcb68 221
634e40b0
JB		 222static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
223static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
224static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 };
225static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 };
226static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 };
227static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 };
0fefcb68
CC		 228
229/* bank H */
634e40b0
JB		 230static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
231static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
232static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
233static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 };
234static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 };
235static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 };
236static const unsigned int clk_24m_out_pins[] = { GPIOH_9 };
237
238static const unsigned int spi_ss1_pins[] = { GPIOH_0 };
239static const unsigned int spi_ss2_pins[] = { GPIOH_1 };
240static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 };
241static const unsigned int spi_miso_1_pins[] = { GPIOH_4 };
242static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 };
243static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 };
244
245static const unsigned int eth_txd3_pins[] = { GPIOH_7 };
246static const unsigned int eth_txd2_pins[] = { GPIOH_8 };
247static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 };
248
249static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 };
250static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 };
251static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 };
252static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 };
253static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 };
254static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 };
0fefcb68
CC		 255
256/* bank BOOT */
634e40b0
JB		 257static const unsigned int nand_io_pins[] = {
258 BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
259};
260static const unsigned int nand_io_ce0_pins[] = { BOOT_8 };
261static const unsigned int nand_io_ce1_pins[] = { BOOT_9 };
262static const unsigned int nand_io_rb0_pins[] = { BOOT_10 };
263static const unsigned int nand_ale_pins[] = { BOOT_11 };
264static const unsigned int nand_cle_pins[] = { BOOT_12 };
265static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
266static const unsigned int nand_ren_clk_pins[] = { BOOT_14 };
267static const unsigned int nand_dqs_15_pins[] = { BOOT_15 };
268static const unsigned int nand_dqs_18_pins[] = { BOOT_18 };
269
270static const unsigned int sdxc_d0_c_pins[] = { BOOT_0};
271static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2,
272 BOOT_3 };
273static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5,
274 BOOT_6, BOOT_7 };
275static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 };
276static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 };
277static const unsigned int nor_d_pins[] = { BOOT_11 };
278static const unsigned int nor_q_pins[] = { BOOT_12 };
279static const unsigned int nor_c_pins[] = { BOOT_13 };
280static const unsigned int nor_cs_pins[] = { BOOT_18 };
281
282static const unsigned int sd_d0_c_pins[] = { BOOT_0 };
283static const unsigned int sd_d1_c_pins[] = { BOOT_1 };
284static const unsigned int sd_d2_c_pins[] = { BOOT_2 };
285static const unsigned int sd_d3_c_pins[] = { BOOT_3 };
286static const unsigned int sd_cmd_c_pins[] = { BOOT_8 };
287static const unsigned int sd_clk_c_pins[] = { BOOT_10 };
0fefcb68
CC		 288
289/* bank CARD */
634e40b0
JB		 290static const unsigned int sd_d1_b_pins[] = { CARD_0 };
291static const unsigned int sd_d0_b_pins[] = { CARD_1 };
292static const unsigned int sd_clk_b_pins[] = { CARD_2 };
293static const unsigned int sd_cmd_b_pins[] = { CARD_3 };
294static const unsigned int sd_d3_b_pins[] = { CARD_4 };
295static const unsigned int sd_d2_b_pins[] = { CARD_5 };
296
297static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4,
298 CARD_5 };
299static const unsigned int sdxc_d0_b_pins[] = { CARD_1 };
300static const unsigned int sdxc_clk_b_pins[] = { CARD_2 };
301static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 };
0fefcb68
CC		 302
303/* bank AO */
634e40b0
JB		 304static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
305static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
306static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
307static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
308static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
309static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
310static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
311static const unsigned int remote_input_pins[] = { GPIOAO_7 };
312static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 };
313static const unsigned int ir_blaster_pins[] = { GPIOAO_13 };
314
315static const unsigned int pwm_c2_pins[] = { GPIOAO_3 };
316static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
317static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
318static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 };
319static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
320static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
321static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
322static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 };
323
324static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 };
325static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 };
326static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
327static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
328static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 };
329static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 };
330static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 };
331
332static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 };
333static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 };
334static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 };
0fefcb68
CC		 335
336/* bank DIF */
634e40b0
JB		 337static const unsigned int eth_rxd1_pins[] = { DIF_0_P };
338static const unsigned int eth_rxd0_pins[] = { DIF_0_N };
339static const unsigned int eth_rx_dv_pins[] = { DIF_1_P };
340static const unsigned int eth_rx_clk_pins[] = { DIF_1_N };
341static const unsigned int eth_txd0_1_pins[] = { DIF_2_P };
342static const unsigned int eth_txd1_1_pins[] = { DIF_2_N };
6daae002
MB		 343static const unsigned int eth_rxd3_pins[] = { DIF_2_P };
344static const unsigned int eth_rxd2_pins[] = { DIF_2_N };
634e40b0
JB		 345static const unsigned int eth_tx_en_pins[] = { DIF_3_P };
346static const unsigned int eth_ref_clk_pins[] = { DIF_3_N };
347static const unsigned int eth_mdc_pins[] = { DIF_4_P };
348static const unsigned int eth_mdio_en_pins[] = { DIF_4_N };
0fefcb68 349
9dab1868 350static struct meson_pmx_group meson8b_cbus_groups[] = {
634e40b0
JB		 351 GPIO_GROUP(GPIOX_0),
352 GPIO_GROUP(GPIOX_1),
353 GPIO_GROUP(GPIOX_2),
354 GPIO_GROUP(GPIOX_3),
355 GPIO_GROUP(GPIOX_4),
356 GPIO_GROUP(GPIOX_5),
357 GPIO_GROUP(GPIOX_6),
358 GPIO_GROUP(GPIOX_7),
359 GPIO_GROUP(GPIOX_8),
360 GPIO_GROUP(GPIOX_9),
361 GPIO_GROUP(GPIOX_10),
362 GPIO_GROUP(GPIOX_11),
363 GPIO_GROUP(GPIOX_16),
364 GPIO_GROUP(GPIOX_17),
365 GPIO_GROUP(GPIOX_18),
366 GPIO_GROUP(GPIOX_19),
367 GPIO_GROUP(GPIOX_20),
368 GPIO_GROUP(GPIOX_21),
369
370 GPIO_GROUP(GPIOY_0),
371 GPIO_GROUP(GPIOY_1),
372 GPIO_GROUP(GPIOY_3),
373 GPIO_GROUP(GPIOY_6),
374 GPIO_GROUP(GPIOY_7),
375 GPIO_GROUP(GPIOY_8),
376 GPIO_GROUP(GPIOY_9),
377 GPIO_GROUP(GPIOY_10),
378 GPIO_GROUP(GPIOY_11),
379 GPIO_GROUP(GPIOY_12),
380 GPIO_GROUP(GPIOY_13),
381 GPIO_GROUP(GPIOY_14),
382
383 GPIO_GROUP(GPIODV_9),
384 GPIO_GROUP(GPIODV_24),
385 GPIO_GROUP(GPIODV_25),
386 GPIO_GROUP(GPIODV_26),
387 GPIO_GROUP(GPIODV_27),
388 GPIO_GROUP(GPIODV_28),
389 GPIO_GROUP(GPIODV_29),
390
391 GPIO_GROUP(GPIOH_0),
392 GPIO_GROUP(GPIOH_1),
393 GPIO_GROUP(GPIOH_2),
394 GPIO_GROUP(GPIOH_3),
395 GPIO_GROUP(GPIOH_4),
396 GPIO_GROUP(GPIOH_5),
397 GPIO_GROUP(GPIOH_6),
398 GPIO_GROUP(GPIOH_7),
399 GPIO_GROUP(GPIOH_8),
400 GPIO_GROUP(GPIOH_9),
401
4dd3d60a
MB		 402 GPIO_GROUP(CARD_0),
403 GPIO_GROUP(CARD_1),
404 GPIO_GROUP(CARD_2),
405 GPIO_GROUP(CARD_3),
406 GPIO_GROUP(CARD_4),
407 GPIO_GROUP(CARD_5),
408 GPIO_GROUP(CARD_6),
409
410 GPIO_GROUP(BOOT_0),
411 GPIO_GROUP(BOOT_1),
412 GPIO_GROUP(BOOT_2),
413 GPIO_GROUP(BOOT_3),
414 GPIO_GROUP(BOOT_4),
415 GPIO_GROUP(BOOT_5),
416 GPIO_GROUP(BOOT_6),
417 GPIO_GROUP(BOOT_7),
418 GPIO_GROUP(BOOT_8),
419 GPIO_GROUP(BOOT_9),
420 GPIO_GROUP(BOOT_10),
421 GPIO_GROUP(BOOT_11),
422 GPIO_GROUP(BOOT_12),
423 GPIO_GROUP(BOOT_13),
424 GPIO_GROUP(BOOT_14),
425 GPIO_GROUP(BOOT_15),
426 GPIO_GROUP(BOOT_16),
427 GPIO_GROUP(BOOT_17),
428 GPIO_GROUP(BOOT_18),
429
634e40b0
JB		 430 GPIO_GROUP(DIF_0_P),
431 GPIO_GROUP(DIF_0_N),
432 GPIO_GROUP(DIF_1_P),
433 GPIO_GROUP(DIF_1_N),
434 GPIO_GROUP(DIF_2_P),
435 GPIO_GROUP(DIF_2_N),
436 GPIO_GROUP(DIF_3_P),
437 GPIO_GROUP(DIF_3_N),
438 GPIO_GROUP(DIF_4_P),
439 GPIO_GROUP(DIF_4_N),
0fefcb68 440
0fefcb68
CC		 441 /* bank X */
442 GROUP(sd_d0_a, 8, 5),
443 GROUP(sd_d1_a, 8, 4),
444 GROUP(sd_d2_a, 8, 3),
445 GROUP(sd_d3_a, 8, 2),
446 GROUP(sdxc_d0_0_a, 5, 29),
447 GROUP(sdxc_d47_a, 5, 12),
448 GROUP(sdxc_d13_0_a, 5, 28),
449 GROUP(sd_clk_a, 8, 1),
450 GROUP(sd_cmd_a, 8, 0),
451 GROUP(xtal_32k_out, 3, 22),
452 GROUP(xtal_24m_out, 3, 20),
453 GROUP(uart_tx_b0, 4, 9),
454 GROUP(uart_rx_b0, 4, 8),
455 GROUP(uart_cts_b0, 4, 7),
456 GROUP(uart_rts_b0, 4, 6),
457 GROUP(sdxc_d0_1_a, 5, 14),
458 GROUP(sdxc_d13_1_a, 5, 13),
459 GROUP(pcm_out_a, 3, 30),
460 GROUP(pcm_in_a, 3, 29),
461 GROUP(pcm_fs_a, 3, 28),
462 GROUP(pcm_clk_a, 3, 27),
463 GROUP(sdxc_clk_a, 5, 11),
464 GROUP(sdxc_cmd_a, 5, 10),
465 GROUP(pwm_vs_0, 7, 31),
466 GROUP(pwm_e, 9, 19),
467 GROUP(pwm_vs_1, 7, 30),
468 GROUP(uart_tx_a, 4, 17),
469 GROUP(uart_rx_a, 4, 16),
470 GROUP(uart_cts_a, 4, 15),
471 GROUP(uart_rts_a, 4, 14),
472 GROUP(uart_tx_b1, 6, 19),
473 GROUP(uart_rx_b1, 6, 18),
474 GROUP(uart_cts_b1, 6, 17),
475 GROUP(uart_rts_b1, 6, 16),
476 GROUP(iso7816_0_clk, 5, 9),
477 GROUP(iso7816_0_data, 5, 8),
478 GROUP(spi_sclk_0, 4, 22),
479 GROUP(spi_miso_0, 4, 24),
480 GROUP(spi_mosi_0, 4, 23),
481 GROUP(iso7816_det, 4, 21),
482 GROUP(iso7816_reset, 4, 20),
483 GROUP(iso7816_1_clk, 4, 19),
484 GROUP(iso7816_1_data, 4, 18),
485 GROUP(spi_ss0_0, 4, 25),
486 GROUP(tsin_clk_b, 3, 6),
487 GROUP(tsin_sop_b, 3, 7),
488 GROUP(tsin_d0_b, 3, 8),
489 GROUP(pwm_b, 2, 3),
490 GROUP(i2c_sda_d0, 4, 5),
491 GROUP(i2c_sck_d0, 4, 4),
492 GROUP(tsin_d_valid_b, 3, 9),
493
494 /* bank Y */
495 GROUP(tsin_d_valid_a, 3, 2),
496 GROUP(tsin_sop_a, 3, 1),
497 GROUP(tsin_d17_a, 3, 5),
498 GROUP(tsin_clk_a, 3, 0),
499 GROUP(tsin_d0_a, 3, 4),
500 GROUP(spdif_out_0, 1, 7),
501 GROUP(xtal_24m, 3, 18),
502 GROUP(iso7816_2_clk, 5, 7),
503 GROUP(iso7816_2_data, 5, 6),
504
505 /* bank DV */
506 GROUP(pwm_d, 3, 26),
507 GROUP(pwm_c0, 3, 25),
508 GROUP(pwm_vs_2, 7, 28),
509 GROUP(pwm_vs_3, 7, 27),
510 GROUP(pwm_vs_4, 7, 26),
511 GROUP(xtal24_out, 7, 25),
512 GROUP(uart_tx_c, 6, 23),
513 GROUP(uart_rx_c, 6, 22),
514 GROUP(uart_cts_c, 6, 21),
515 GROUP(uart_rts_c, 6, 20),
516 GROUP(pwm_c1, 3, 24),
517 GROUP(i2c_sda_a, 9, 31),
518 GROUP(i2c_sck_a, 9, 30),
519 GROUP(i2c_sda_b0, 9, 29),
520 GROUP(i2c_sck_b0, 9, 28),
521 GROUP(i2c_sda_c0, 9, 27),
522 GROUP(i2c_sck_c0, 9, 26),
523
524 /* bank H */
525 GROUP(hdmi_hpd, 1, 26),
526 GROUP(hdmi_sda, 1, 25),
527 GROUP(hdmi_scl, 1, 24),
528 GROUP(hdmi_cec_0, 1, 23),
529 GROUP(eth_txd1_0, 7, 21),
530 GROUP(eth_txd0_0, 7, 20),
531 GROUP(clk_24m_out, 4, 1),
532 GROUP(spi_ss1, 8, 11),
533 GROUP(spi_ss2, 8, 12),
534 GROUP(spi_ss0_1, 9, 13),
535 GROUP(spi_miso_1, 9, 12),
536 GROUP(spi_mosi_1, 9, 11),
537 GROUP(spi_sclk_1, 9, 10),
538 GROUP(eth_txd3, 6, 13),
539 GROUP(eth_txd2, 6, 12),
540 GROUP(eth_tx_clk, 6, 11),
541 GROUP(i2c_sda_b1, 5, 27),
542 GROUP(i2c_sck_b1, 5, 26),
543 GROUP(i2c_sda_c1, 5, 25),
544 GROUP(i2c_sck_c1, 5, 24),
545 GROUP(i2c_sda_d1, 4, 3),
546 GROUP(i2c_sck_d1, 4, 2),
547
548 /* bank BOOT */
549 GROUP(nand_io, 2, 26),
550 GROUP(nand_io_ce0, 2, 25),
551 GROUP(nand_io_ce1, 2, 24),
552 GROUP(nand_io_rb0, 2, 17),
553 GROUP(nand_ale, 2, 21),
554 GROUP(nand_cle, 2, 20),
555 GROUP(nand_wen_clk, 2, 19),
556 GROUP(nand_ren_clk, 2, 18),
4781c22c
MB		 557 GROUP(nand_dqs_15, 2, 27),
558 GROUP(nand_dqs_18, 2, 28),
0fefcb68
CC		 559 GROUP(sdxc_d0_c, 4, 30),
560 GROUP(sdxc_d13_c, 4, 29),
561 GROUP(sdxc_d47_c, 4, 28),
562 GROUP(sdxc_clk_c, 7, 19),
563 GROUP(sdxc_cmd_c, 7, 18),
564 GROUP(nor_d, 5, 1),
565 GROUP(nor_q, 5, 3),
566 GROUP(nor_c, 5, 2),
567 GROUP(nor_cs, 5, 0),
568 GROUP(sd_d0_c, 6, 29),
569 GROUP(sd_d1_c, 6, 28),
570 GROUP(sd_d2_c, 6, 27),
571 GROUP(sd_d3_c, 6, 26),
572 GROUP(sd_cmd_c, 6, 30),
573 GROUP(sd_clk_c, 6, 31),
574
575 /* bank CARD */
576 GROUP(sd_d1_b, 2, 14),
577 GROUP(sd_d0_b, 2, 15),
578 GROUP(sd_clk_b, 2, 11),
579 GROUP(sd_cmd_b, 2, 10),
580 GROUP(sd_d3_b, 2, 12),
581 GROUP(sd_d2_b, 2, 13),
582 GROUP(sdxc_d13_b, 2, 6),
583 GROUP(sdxc_d0_b, 2, 7),
584 GROUP(sdxc_clk_b, 2, 5),
585 GROUP(sdxc_cmd_b, 2, 4),
586
9dab1868
CC		 587 /* bank DIF */
588 GROUP(eth_rxd1, 6, 0),
589 GROUP(eth_rxd0, 6, 1),
590 GROUP(eth_rx_dv, 6, 2),
591 GROUP(eth_rx_clk, 6, 3),
592 GROUP(eth_txd0_1, 6, 4),
593 GROUP(eth_txd1_1, 6, 5),
d6d5c125 594 GROUP(eth_tx_en, 6, 6),
9dab1868
CC		 595 GROUP(eth_ref_clk, 6, 8),
596 GROUP(eth_mdc, 6, 9),
597 GROUP(eth_mdio_en, 6, 10),
6daae002
MB		 598 GROUP(eth_rxd3, 7, 22),
599 GROUP(eth_rxd2, 7, 23),
9dab1868
CC		 600};
601
602static struct meson_pmx_group meson8b_aobus_groups[] = {
634e40b0
JB		 603 GPIO_GROUP(GPIOAO_0),
604 GPIO_GROUP(GPIOAO_1),
605 GPIO_GROUP(GPIOAO_2),
606 GPIO_GROUP(GPIOAO_3),
607 GPIO_GROUP(GPIOAO_4),
608 GPIO_GROUP(GPIOAO_5),
609 GPIO_GROUP(GPIOAO_6),
610 GPIO_GROUP(GPIOAO_7),
611 GPIO_GROUP(GPIOAO_8),
612 GPIO_GROUP(GPIOAO_9),
613 GPIO_GROUP(GPIOAO_10),
614 GPIO_GROUP(GPIOAO_11),
615 GPIO_GROUP(GPIOAO_12),
616 GPIO_GROUP(GPIOAO_13),
617 GPIO_GROUP(GPIO_BSD_EN),
618 GPIO_GROUP(GPIO_TEST_N),
9dab1868 619
0fefcb68
CC		 620 /* bank AO */
621 GROUP(uart_tx_ao_a, 0, 12),
622 GROUP(uart_rx_ao_a, 0, 11),
623 GROUP(uart_cts_ao_a, 0, 10),
624 GROUP(uart_rts_ao_a, 0, 9),
625 GROUP(i2c_mst_sck_ao, 0, 6),
626 GROUP(i2c_mst_sda_ao, 0, 5),
627 GROUP(clk_32k_in_out, 0, 18),
628 GROUP(remote_input, 0, 0),
629 GROUP(hdmi_cec_1, 0, 17),
630 GROUP(ir_blaster, 0, 31),
631 GROUP(pwm_c2, 0, 22),
632 GROUP(i2c_sck_ao, 0, 2),
633 GROUP(i2c_sda_ao, 0, 1),
634 GROUP(ir_remote_out, 0, 21),
635 GROUP(i2s_am_clk_out, 0, 30),
636 GROUP(i2s_ao_clk_out, 0, 29),
637 GROUP(i2s_lr_clk_out, 0, 28),
638 GROUP(i2s_out_01, 0, 27),
639 GROUP(uart_tx_ao_b0, 0, 26),
640 GROUP(uart_rx_ao_b0, 0, 25),
641 GROUP(uart_cts_ao_b, 0, 8),
642 GROUP(uart_rts_ao_b, 0, 7),
643 GROUP(uart_tx_ao_b1, 0, 24),
644 GROUP(uart_rx_ao_b1, 0, 23),
645 GROUP(spdif_out_1, 0, 16),
646 GROUP(i2s_in_ch01, 0, 13),
647 GROUP(i2s_ao_clk_in, 0, 15),
648 GROUP(i2s_lr_clk_in, 0, 14),
0fefcb68
CC		 649};
650
54a9cbbf 651static const char * const gpio_periphs_groups[] = {
0fefcb68
CC		 652 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
653 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
654 "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
655 "GPIOX_19", "GPIOX_20", "GPIOX_21",
656
657 "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
658 "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
659 "GPIOY_13", "GPIOY_14",
660
661 "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
662 "GPIODV_27", "GPIODV_28", "GPIODV_29",
663
664 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
665 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
666
667 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
668 "CARD_5", "CARD_6",
669
670 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
671 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
672 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
673 "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
674
0fefcb68
CC		 675 "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
676 "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
677 "DIF_4_P", "DIF_4_N"
678};
679
2b745ac3
MB		 680static const char * const gpio_aobus_groups[] = {
681 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
682 "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
683 "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
684 "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
685};
686
0fefcb68
CC		 687static const char * const sd_a_groups[] = {
688 "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
689 "sd_cmd_a"
690};
691
692static const char * const sdxc_a_groups[] = {
693 "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
c17abcfa 694 "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a"
0fefcb68
CC		 695};
696
697static const char * const pcm_a_groups[] = {
698 "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
699};
700
701static const char * const uart_a_groups[] = {
702 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
703};
704
705static const char * const uart_b_groups[] = {
706 "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
707 "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
708};
709
710static const char * const iso7816_groups[] = {
711 "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
712 "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
713};
714
715static const char * const i2c_d_groups[] = {
716 "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
717};
718
719static const char * const xtal_groups[] = {
720 "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
721};
722
723static const char * const uart_c_groups[] = {
724 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
725};
726
727static const char * const i2c_c_groups[] = {
728 "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
729};
730
731static const char * const hdmi_groups[] = {
ac1afc46
CC		 732 "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
733};
734
735static const char * const hdmi_cec_groups[] = {
0fefcb68
CC		 736 "hdmi_cec_1"
737};
738
739static const char * const spi_groups[] = {
740 "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
741 "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
742 "spi_miso_1", "spi_ss2"
743};
744
745static const char * const ethernet_groups[] = {
746 "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
747 "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
748 "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
6daae002 749 "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2"
0fefcb68
CC		 750};
751
752static const char * const i2c_a_groups[] = {
753 "i2c_sda_a", "i2c_sck_a",
754};
755
756static const char * const i2c_b_groups[] = {
757 "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
758};
759
760static const char * const sd_c_groups[] = {
761 "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
762 "sd_cmd_c", "sd_clk_c"
763};
764
765static const char * const sdxc_c_groups[] = {
766 "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
767 "sdxc_clk_c"
768};
769
770static const char * const nand_groups[] = {
771 "nand_io", "nand_io_ce0", "nand_io_ce1",
772 "nand_io_rb0", "nand_ale", "nand_cle",
4781c22c
MB		 773 "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
774 "nand_dqs_18"
0fefcb68
CC		 775};
776
777static const char * const nor_groups[] = {
778 "nor_d", "nor_q", "nor_c", "nor_cs"
779};
780
781static const char * const sd_b_groups[] = {
782 "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
783 "sd_d3_b", "sd_d2_b"
784};
785
786static const char * const sdxc_b_groups[] = {
787 "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
788};
789
790static const char * const uart_ao_groups[] = {
791 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
792};
793
794static const char * const remote_groups[] = {
795 "remote_input", "ir_blaster", "ir_remote_out"
796};
797
798static const char * const i2c_slave_ao_groups[] = {
799 "i2c_sck_ao", "i2c_sda_ao"
800};
801
802static const char * const uart_ao_b_groups[] = {
803 "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
804 "uart_cts_ao_b", "uart_rts_ao_b"
805};
806
807static const char * const i2c_mst_ao_groups[] = {
808 "i2c_mst_sck_ao", "i2c_mst_sda_ao"
809};
810
ac1afc46 811static const char * const clk_24m_groups[] = {
9dab1868 812 "clk_24m_out"
ac1afc46
CC		 813};
814
815static const char * const clk_32k_groups[] = {
9dab1868 816 "clk_32k_in_out"
0fefcb68
CC		 817};
818
ac1afc46
CC		 819static const char * const spdif_0_groups[] = {
820 "spdif_out_0"
821};
822
823static const char * const spdif_1_groups[] = {
824 "spdif_out_1"
0fefcb68
CC		 825};
826
827static const char * const i2s_groups[] = {
828 "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
829 "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
830 "i2s_lr_clk_in"
831};
832
833static const char * const pwm_b_groups[] = {
834 "pwm_b"
835};
836
837static const char * const pwm_c_groups[] = {
ac1afc46
CC		 838 "pwm_c0", "pwm_c1"
839};
840
841static const char * const pwm_c_ao_groups[] = {
842 "pwm_c2"
0fefcb68
CC		 843};
844
845static const char * const pwm_d_groups[] = {
846 "pwm_d"
847};
848
849static const char * const pwm_e_groups[] = {
850 "pwm_e"
851};
852
853static const char * const pwm_vs_groups[] = {
854 "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
855 "pwm_vs_3", "pwm_vs_4"
856};
857
858static const char * const tsin_a_groups[] = {
859 "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
860 "tsin_d_valid_a"
861};
862
863static const char * const tsin_b_groups[] = {
864 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
865};
866
9dab1868 867static struct meson_pmx_func meson8b_cbus_functions[] = {
54a9cbbf 868 FUNCTION(gpio_periphs),
0fefcb68
CC		 869 FUNCTION(sd_a),
870 FUNCTION(sdxc_a),
871 FUNCTION(pcm_a),
872 FUNCTION(uart_a),
873 FUNCTION(uart_b),
874 FUNCTION(iso7816),
875 FUNCTION(i2c_d),
876 FUNCTION(xtal),
877 FUNCTION(uart_c),
878 FUNCTION(i2c_c),
879 FUNCTION(hdmi),
880 FUNCTION(spi),
881 FUNCTION(ethernet),
882 FUNCTION(i2c_a),
883 FUNCTION(i2c_b),
884 FUNCTION(sd_c),
885 FUNCTION(sdxc_c),
886 FUNCTION(nand),
887 FUNCTION(nor),
888 FUNCTION(sd_b),
889 FUNCTION(sdxc_b),
ac1afc46 890 FUNCTION(spdif_0),
0fefcb68
CC		 891 FUNCTION(pwm_b),
892 FUNCTION(pwm_c),
893 FUNCTION(pwm_d),
894 FUNCTION(pwm_e),
895 FUNCTION(pwm_vs),
896 FUNCTION(tsin_a),
897 FUNCTION(tsin_b),
ac1afc46 898 FUNCTION(clk_24m),
0fefcb68
CC		 899};
900
9dab1868 901static struct meson_pmx_func meson8b_aobus_functions[] = {
2b745ac3 902 FUNCTION(gpio_aobus),
9dab1868
CC		 903 FUNCTION(uart_ao),
904 FUNCTION(uart_ao_b),
905 FUNCTION(i2c_slave_ao),
906 FUNCTION(i2c_mst_ao),
907 FUNCTION(i2s),
908 FUNCTION(remote),
909 FUNCTION(clk_32k),
910 FUNCTION(pwm_c_ao),
911 FUNCTION(spdif_1),
912 FUNCTION(hdmi_cec),
913};
914
915static struct meson_bank meson8b_cbus_banks[] = {
55af415b
MB		 916 /* name first last irq pullen pull dir out in */
917 BANK("X0..11", GPIOX_0, GPIOX_11, 97, 108, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
918 BANK("X16..21", GPIOX_16, GPIOX_21, 113, 118, 4, 16, 4, 16, 0, 16, 1, 16, 2, 16),
919 BANK("Y0..1", GPIOY_0, GPIOY_1, 80, 81, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
920 BANK("Y3", GPIOY_3, GPIOY_3, 83, 83, 3, 3, 3, 3, 3, 3, 4, 3, 5, 3),
921 BANK("Y6..14", GPIOY_6, GPIOY_14, 86, 94, 3, 6, 3, 6, 3, 6, 4, 6, 5, 6),
922 BANK("DV9", GPIODV_9, GPIODV_9, 59, 59, 0, 9, 0, 9, 7, 9, 8, 9, 9, 9),
923 BANK("DV24..29", GPIODV_24, GPIODV_29, 74, 79, 0, 24, 0, 24, 7, 24, 8, 24, 9, 24),
924 BANK("H", GPIOH_0, GPIOH_9, 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
925 BANK("CARD", CARD_0, CARD_6, 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
926 BANK("BOOT", BOOT_0, BOOT_18, 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
6c9dc843
JB		 927
928 /*
929 * The following bank is not mentionned in the public datasheet
930 * There is no information whether it can be used with the gpio
931 * interrupt controller
932 */
55af415b 933 BANK("DIF", DIF_0_P, DIF_4_N, -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
0fefcb68
CC		 934};
935
9dab1868 936static struct meson_bank meson8b_aobus_banks[] = {
634e40b0 937 /* name first lastc irq pullen pull dir out in */
a1705f02 938 BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
0fefcb68
CC		 939};
940
277d14eb 941static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
9dab1868 942 .name = "cbus-banks",
9dab1868
CC		 943 .pins = meson8b_cbus_pins,
944 .groups = meson8b_cbus_groups,
945 .funcs = meson8b_cbus_functions,
db80f0e1 946 .banks = meson8b_cbus_banks,
9dab1868
CC		 947 .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
948 .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
949 .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
db80f0e1 950 .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
ce385aa2 951 .pmx_ops = &meson8_pmx_ops,
9dab1868
CC		 952};
953
277d14eb 954static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
db80f0e1 955 .name = "aobus-banks",
9dab1868
CC		 956 .pins = meson8b_aobus_pins,
957 .groups = meson8b_aobus_groups,
958 .funcs = meson8b_aobus_functions,
db80f0e1 959 .banks = meson8b_aobus_banks,
9dab1868
CC		 960 .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
961 .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
962 .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
db80f0e1 963 .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
ce385aa2 964 .pmx_ops = &meson8_pmx_ops,
0fefcb68 965};
277d14eb
JB		 966
967static const struct of_device_id meson8b_pinctrl_dt_match[] = {
968 {
969 .compatible = "amlogic,meson8b-cbus-pinctrl",
970 .data = &meson8b_cbus_pinctrl_data,
971 },
972 {
973 .compatible = "amlogic,meson8b-aobus-pinctrl",
974 .data = &meson8b_aobus_pinctrl_data,
975 },
976 { },
977};
978
979static struct platform_driver meson8b_pinctrl_driver = {
980 .probe = meson_pinctrl_probe,
981 .driver = {
982 .name = "meson8b-pinctrl",
983 .of_match_table = meson8b_pinctrl_dt_match,
984 },
985};
986builtin_platform_driver(meson8b_pinctrl_driver);
Linux 6.x block layer and io_uring tree(s)