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3c910ecb | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
6ac73095 BG |
2 | /* |
3 | * Pin controller and GPIO driver for Amlogic Meson SoCs | |
4 | * | |
5 | * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> | |
6ac73095 BG |
6 | */ |
7 | ||
1c5fb66a | 8 | #include <linux/gpio/driver.h> |
6ac73095 | 9 | #include <linux/pinctrl/pinctrl.h> |
277d14eb | 10 | #include <linux/platform_device.h> |
6ac73095 BG |
11 | #include <linux/regmap.h> |
12 | #include <linux/types.h> | |
9c65441e | 13 | #include <linux/module.h> |
6ac73095 | 14 | |
827eb27e AS |
15 | struct fwnode_handle; |
16 | ||
fd422964 QS |
17 | struct meson_pinctrl; |
18 | ||
6ac73095 BG |
19 | /** |
20 | * struct meson_pmx_group - a pinmux group | |
21 | * | |
22 | * @name: group name | |
23 | * @pins: pins in the group | |
24 | * @num_pins: number of pins in the group | |
25 | * @is_gpio: whether the group is a single GPIO group | |
26 | * @reg: register offset for the group in the domain mux registers | |
27 | * @bit bit index enabling the group | |
28 | * @domain: index of the domain this group belongs to | |
29 | */ | |
30 | struct meson_pmx_group { | |
31 | const char *name; | |
32 | const unsigned int *pins; | |
33 | unsigned int num_pins; | |
ce385aa2 | 34 | const void *data; |
6ac73095 BG |
35 | }; |
36 | ||
37 | /** | |
38 | * struct meson_pmx_func - a pinmux function | |
39 | * | |
40 | * @name: function name | |
41 | * @groups: groups in the function | |
42 | * @num_groups: number of groups in the function | |
43 | */ | |
44 | struct meson_pmx_func { | |
45 | const char *name; | |
46 | const char * const *groups; | |
47 | unsigned int num_groups; | |
48 | }; | |
49 | ||
50 | /** | |
51 | * struct meson_reg_desc - a register descriptor | |
52 | * | |
53 | * @reg: register offset in the regmap | |
54 | * @bit: bit index in register | |
55 | * | |
56 | * The structure describes the information needed to control pull, | |
57 | * pull-enable, direction, etc. for a single pin | |
58 | */ | |
59 | struct meson_reg_desc { | |
60 | unsigned int reg; | |
61 | unsigned int bit; | |
62 | }; | |
63 | ||
64 | /** | |
65 | * enum meson_reg_type - type of registers encoded in @meson_reg_desc | |
66 | */ | |
67 | enum meson_reg_type { | |
2b2dce80 AS |
68 | MESON_REG_PULLEN, |
69 | MESON_REG_PULL, | |
70 | MESON_REG_DIR, | |
71 | MESON_REG_OUT, | |
72 | MESON_REG_IN, | |
73 | MESON_REG_DS, | |
74 | MESON_NUM_REG, | |
6ac73095 BG |
75 | }; |
76 | ||
6ea3e3bb GLR |
77 | /** |
78 | * enum meson_pinconf_drv - value of drive-strength supported | |
79 | */ | |
80 | enum meson_pinconf_drv { | |
81 | MESON_PINCONF_DRV_500UA, | |
82 | MESON_PINCONF_DRV_2500UA, | |
83 | MESON_PINCONF_DRV_3000UA, | |
84 | MESON_PINCONF_DRV_4000UA, | |
85 | }; | |
86 | ||
6ac73095 BG |
87 | /** |
88 | * struct meson bank | |
89 | * | |
90 | * @name: bank name | |
91 | * @first: first pin of the bank | |
92 | * @last: last pin of the bank | |
6c9dc843 | 93 | * @irq: hwirq base number of the bank |
6ac73095 BG |
94 | * @regs: array of register descriptors |
95 | * | |
96 | * A bank represents a set of pins controlled by a contiguous set of | |
97 | * bits in the domain registers. The structure specifies which bits in | |
98 | * the regmap control the different functionalities. Each member of | |
99 | * the @regs array refers to the first pin of the bank. | |
100 | */ | |
101 | struct meson_bank { | |
102 | const char *name; | |
103 | unsigned int first; | |
104 | unsigned int last; | |
6c9dc843 JB |
105 | int irq_first; |
106 | int irq_last; | |
2b2dce80 | 107 | struct meson_reg_desc regs[MESON_NUM_REG]; |
6ac73095 BG |
108 | }; |
109 | ||
6ac73095 | 110 | struct meson_pinctrl_data { |
db80f0e1 | 111 | const char *name; |
6ac73095 | 112 | const struct pinctrl_pin_desc *pins; |
8a74a53e CJ |
113 | const struct meson_pmx_group *groups; |
114 | const struct meson_pmx_func *funcs; | |
6ac73095 BG |
115 | unsigned int num_pins; |
116 | unsigned int num_groups; | |
117 | unsigned int num_funcs; | |
8a74a53e | 118 | const struct meson_bank *banks; |
db80f0e1 | 119 | unsigned int num_banks; |
ce385aa2 | 120 | const struct pinmux_ops *pmx_ops; |
8a74a53e | 121 | const void *pmx_data; |
fd422964 | 122 | int (*parse_dt)(struct meson_pinctrl *pc); |
6ac73095 BG |
123 | }; |
124 | ||
125 | struct meson_pinctrl { | |
126 | struct device *dev; | |
127 | struct pinctrl_dev *pcdev; | |
128 | struct pinctrl_desc desc; | |
129 | struct meson_pinctrl_data *data; | |
db80f0e1 BG |
130 | struct regmap *reg_mux; |
131 | struct regmap *reg_pullen; | |
132 | struct regmap *reg_pull; | |
133 | struct regmap *reg_gpio; | |
64856974 | 134 | struct regmap *reg_ds; |
db80f0e1 | 135 | struct gpio_chip chip; |
827eb27e | 136 | struct fwnode_handle *fwnode; |
6ac73095 BG |
137 | }; |
138 | ||
6ac73095 BG |
139 | #define FUNCTION(fn) \ |
140 | { \ | |
141 | .name = #fn, \ | |
142 | .groups = fn ## _groups, \ | |
143 | .num_groups = ARRAY_SIZE(fn ## _groups), \ | |
144 | } | |
145 | ||
6ea3e3bb GLR |
146 | #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \ |
147 | dsr, dsb) \ | |
6ac73095 | 148 | { \ |
6c9dc843 JB |
149 | .name = n, \ |
150 | .first = f, \ | |
151 | .last = l, \ | |
152 | .irq_first = fi, \ | |
153 | .irq_last = li, \ | |
154 | .regs = { \ | |
2b2dce80 AS |
155 | [MESON_REG_PULLEN] = { per, peb }, \ |
156 | [MESON_REG_PULL] = { pr, pb }, \ | |
157 | [MESON_REG_DIR] = { dr, db }, \ | |
158 | [MESON_REG_OUT] = { or, ob }, \ | |
159 | [MESON_REG_IN] = { ir, ib }, \ | |
160 | [MESON_REG_DS] = { dsr, dsb }, \ | |
6ac73095 BG |
161 | }, \ |
162 | } | |
163 | ||
6ea3e3bb GLR |
164 | #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ |
165 | BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0) | |
166 | ||
634e40b0 | 167 | #define MESON_PIN(x) PINCTRL_PIN(x, #x) |
6ac73095 | 168 | |
ce385aa2 JB |
169 | /* Common pmx functions */ |
170 | int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev); | |
171 | const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev, | |
172 | unsigned selector); | |
173 | int meson_pmx_get_groups(struct pinctrl_dev *pcdev, | |
174 | unsigned selector, | |
175 | const char * const **groups, | |
176 | unsigned * const num_groups); | |
177 | ||
277d14eb JB |
178 | /* Common probe function */ |
179 | int meson_pinctrl_probe(struct platform_device *pdev); | |
fd422964 QS |
180 | /* Common ao groups extra dt parse function for SoCs before g12a */ |
181 | int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc); | |
dabad1ff QS |
182 | /* Common extra dt parse function for SoCs like A1 */ |
183 | int meson_a1_parse_dt_extra(struct meson_pinctrl *pc); |